Lines Matching refs:sdhci_writel
520 sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS); in esdhc_of_adma_workaround()
543 sdhci_writel(host, value, ESDHC_DMA_SYSCTL); in esdhc_of_enable_dma()
595 sdhci_writel(host, val, ESDHC_SYSTEM_CONTROL); in esdhc_clock_enable()
623 sdhci_writel(host, val, ESDHC_DMA_SYSCTL); in esdhc_flush_async_fifo()
716 sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL); in esdhc_of_set_clock()
740 sdhci_writel(host, temp | ESDHC_HS400_MODE, ESDHC_TBCTL); in esdhc_of_set_clock()
742 sdhci_writel(host, temp | ESDHC_CMD_CLK_CTL, ESDHC_SDCLKCTL); in esdhc_of_set_clock()
749 sdhci_writel(host, temp, ESDHC_DLLCFG0); in esdhc_of_set_clock()
752 sdhci_writel(host, temp, ESDHC_DLLCFG0); in esdhc_of_set_clock()
755 sdhci_writel(host, temp, ESDHC_DLLCFG0); in esdhc_of_set_clock()
766 sdhci_writel(host, temp | ESDHC_HS400_WNDW_ADJUST, ESDHC_TBCTL); in esdhc_of_set_clock()
793 sdhci_writel(host, ctrl, ESDHC_PROCTL); in esdhc_pltfm_set_bus_width()
832 sdhci_writel(host, val, ESDHC_PROCTL); in esdhc_reset()
834 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in esdhc_reset()
835 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in esdhc_reset()
846 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_reset()
855 sdhci_writel(host, val, ESDHC_DLLCFG1); in esdhc_reset()
899 sdhci_writel(host, val, ESDHC_PROCTL); in esdhc_signal_voltage_switch()
913 sdhci_writel(host, val, ESDHC_PROCTL); in esdhc_signal_voltage_switch()
923 sdhci_writel(host, val, ESDHC_PROCTL); in esdhc_signal_voltage_switch()
961 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_tuning_block_enable()
975 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_tuning_window_ptr()
981 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_tuning_window_ptr()
1011 sdhci_writel(host, 0xFFFFFFFF, SDHCI_INT_STATUS); in esdhc_prepare_sw_tuning()
1041 sdhci_writel(host, val, ESDHC_TBPTR); in esdhc_execute_sw_tuning()
1047 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_execute_sw_tuning()
1097 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_execute_tuning()
1161 sdhci_writel(host, val, ESDHC_SDTIMNGCTL); in esdhc_execute_tuning()
1181 sdhci_writel(host, val, ESDHC_SDTIMNGCTL); in esdhc_set_uhs_signaling()
1185 sdhci_writel(host, val, ESDHC_SDCLKCTL); in esdhc_set_uhs_signaling()
1190 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_set_uhs_signaling()
1195 sdhci_writel(host, val, ESDHC_DLLCFG0); in esdhc_set_uhs_signaling()
1199 sdhci_writel(host, val, ESDHC_TBCTL); in esdhc_set_uhs_signaling()
1223 sdhci_writel(host, SDHCI_INT_DATA_END, in esdhc_irq()
1252 sdhci_writel(host, esdhc_proctl, SDHCI_HOST_CONTROL); in esdhc_of_resume()
1407 sdhci_writel(host, val, ESDHC_DMA_SYSCTL); in esdhc_init()