Lines Matching refs:XLGMAC_SET_REG_BITS
41 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_IPC_POS, in xlgmac_disable_rx_csum()
53 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_IPC_POS, in xlgmac_enable_rx_csum()
98 mac_addr_hi = XLGMAC_SET_REG_BITS(mac_addr_hi, in xlgmac_set_mac_reg()
116 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_EVLRXS_POS, in xlgmac_enable_rx_vlan_stripping()
119 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_DOVLTC_POS, in xlgmac_enable_rx_vlan_stripping()
122 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_ERSVLM_POS, in xlgmac_enable_rx_vlan_stripping()
125 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_ESVL_POS, in xlgmac_enable_rx_vlan_stripping()
128 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_EVLS_POS, in xlgmac_enable_rx_vlan_stripping()
140 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_EVLS_POS, in xlgmac_disable_rx_vlan_stripping()
153 regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_VTFE_POS, in xlgmac_enable_rx_vlan_filtering()
159 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_VTHM_POS, in xlgmac_enable_rx_vlan_filtering()
162 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_VTIM_POS, in xlgmac_enable_rx_vlan_filtering()
165 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_ETV_POS, in xlgmac_enable_rx_vlan_filtering()
173 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANTR_VL_POS, in xlgmac_enable_rx_vlan_filtering()
186 regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_VTFE_POS, in xlgmac_disable_rx_vlan_filtering()
236 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANHTR_VLHT_POS, in xlgmac_update_vlan_hash_table()
258 regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_PR_POS, in xlgmac_set_promiscuous_mode()
288 regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_PM_POS, in xlgmac_set_all_multicast_mode()
382 regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_HPF_POS, in xlgmac_config_mac_address()
384 regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_HUC_POS, in xlgmac_config_mac_address()
386 regval = XLGMAC_SET_REG_BITS(regval, MAC_PFR_HMC_POS, in xlgmac_config_mac_address()
400 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_JE_POS, in xlgmac_config_jumbo_enable()
419 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANIR_CSVL_POS, in xlgmac_config_vlan_support()
421 regval = XLGMAC_SET_REG_BITS(regval, MAC_VLANIR_VLTI_POS, in xlgmac_config_vlan_support()
510 regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_TCR_ST_POS, in xlgmac_enable_tx()
518 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_TQOMR_TXQEN_POS, in xlgmac_enable_tx()
526 regval = XLGMAC_SET_REG_BITS(regval, MAC_TCR_TE_POS, in xlgmac_enable_tx()
548 regval = XLGMAC_SET_REG_BITS(regval, MAC_TCR_TE_POS, in xlgmac_disable_tx()
555 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_TQOMR_TXQEN_POS, in xlgmac_disable_tx()
567 regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_TCR_ST_POS, in xlgmac_disable_tx()
614 regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_RCR_SR_POS, in xlgmac_enable_rx()
627 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_DCRCC_POS, in xlgmac_enable_rx()
629 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_CST_POS, in xlgmac_enable_rx()
631 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_ACS_POS, in xlgmac_enable_rx()
633 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_RE_POS, in xlgmac_enable_rx()
646 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_DCRCC_POS, in xlgmac_disable_rx()
648 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_CST_POS, in xlgmac_disable_rx()
650 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_ACS_POS, in xlgmac_disable_rx()
652 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_RE_POS, in xlgmac_disable_rx()
670 regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_RCR_SR_POS, in xlgmac_disable_rx()
1028 pkt_info->attributes = XLGMAC_SET_REG_BITS( in xlgmac_get_rx_tstamp()
1197 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_EHFC_POS, in xlgmac_disable_tx_flow_control()
1208 regval = XLGMAC_SET_REG_BITS(regval, in xlgmac_disable_tx_flow_control()
1229 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_EHFC_POS, in xlgmac_enable_tx_flow_control()
1242 regval = XLGMAC_SET_REG_BITS(regval, MAC_Q0TFCR_TFE_POS, in xlgmac_enable_tx_flow_control()
1245 regval = XLGMAC_SET_REG_BITS(regval, MAC_Q0TFCR_PT_POS, in xlgmac_enable_tx_flow_control()
1261 regval = XLGMAC_SET_REG_BITS(regval, MAC_RFCR_RFE_POS, in xlgmac_disable_rx_flow_control()
1273 regval = XLGMAC_SET_REG_BITS(regval, MAC_RFCR_RFE_POS, in xlgmac_enable_rx_flow_control()
1312 regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_RIWT_RWT_POS, in xlgmac_config_rx_coalesce()
1334 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_FEP_POS, in xlgmac_config_rx_fep_enable()
1347 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_FUP_POS, in xlgmac_config_rx_fup_enable()
1370 regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_RCR_RBSZ_POS, in xlgmac_config_rx_buffer_size()
1390 regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_TCR_TSE_POS, in xlgmac_config_tso_mode()
1409 regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_CR_SPH_POS, in xlgmac_config_sph_mode()
1415 regval = XLGMAC_SET_REG_BITS(regval, MAC_RCR_HDSMS_POS, in xlgmac_config_sph_mode()
1465 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_RTC_POS, in xlgmac_config_rx_threshold()
1480 regval = XLGMAC_SET_REG_BITS(regval, MTL_OMR_ETSALG_POS, in xlgmac_config_mtl_mode()
1487 regval = XLGMAC_SET_REG_BITS(regval, MTL_TC_ETSCR_TSA_POS, in xlgmac_config_mtl_mode()
1492 regval = XLGMAC_SET_REG_BITS(regval, MTL_TC_QWR_QW_POS, in xlgmac_config_mtl_mode()
1499 regval = XLGMAC_SET_REG_BITS(regval, MTL_OMR_RAA_POS, in xlgmac_config_mtl_mode()
1524 regval = XLGMAC_SET_REG_BITS(regval, in xlgmac_config_queue_mapping()
1538 regval = XLGMAC_SET_REG_BITS(regval, in xlgmac_config_queue_mapping()
1642 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_TQOMR_TQS_POS, in xlgmac_config_tx_fifo_size()
1664 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_RQS_POS, in xlgmac_config_rx_fifo_size()
1682 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQFCR_RFA_POS, in xlgmac_config_flow_control_threshold()
1685 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQFCR_RFD_POS, in xlgmac_config_flow_control_threshold()
1699 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_TQOMR_TTC_POS, in xlgmac_config_tx_threshold()
1715 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_RQOMR_RSF_POS, in xlgmac_config_rsf_mode()
1731 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_TQOMR_TSF_POS, in xlgmac_config_tsf_mode()
1751 regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_TCR_OSP_POS, in xlgmac_config_osp_mode()
1769 regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_CR_PBLX8_POS, in xlgmac_config_pblx8()
1800 regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_TCR_PBL_POS, in xlgmac_config_tx_pbl_val()
1831 regval = XLGMAC_SET_REG_BITS(regval, DMA_CH_RCR_PBL_POS, in xlgmac_config_rx_pbl_val()
2131 regval = XLGMAC_SET_REG_BITS(regval, MMC_CR_MCF_POS, in xlgmac_read_mmc_stats()
2260 regval = XLGMAC_SET_REG_BITS(regval, MMC_CR_MCF_POS, in xlgmac_read_mmc_stats()
2271 regval = XLGMAC_SET_REG_BITS(regval, MMC_CR_ROR_POS, in xlgmac_config_mmc()
2274 regval = XLGMAC_SET_REG_BITS(regval, MMC_CR_CR_POS, in xlgmac_config_mmc()
2298 regval = XLGMAC_SET_REG_BITS(regval, MAC_RSSAR_RSSIA_POS, in xlgmac_write_rss_reg()
2300 regval = XLGMAC_SET_REG_BITS(regval, MAC_RSSAR_ADDRT_POS, in xlgmac_write_rss_reg()
2302 regval = XLGMAC_SET_REG_BITS(regval, MAC_RSSAR_CT_POS, in xlgmac_write_rss_reg()
2304 regval = XLGMAC_SET_REG_BITS(regval, MAC_RSSAR_OB_POS, in xlgmac_write_rss_reg()
2374 pdata->rss_table[i] = XLGMAC_SET_REG_BITS( in xlgmac_set_rss_lookup_table()
2407 regval = XLGMAC_SET_REG_BITS(regval, MAC_RSSCR_RSSE_POS, in xlgmac_enable_rss()
2422 regval = XLGMAC_SET_REG_BITS(regval, MAC_RSSCR_RSSE_POS, in xlgmac_disable_rss()
2466 dma_ch_ier = XLGMAC_SET_REG_BITS(dma_ch_ier, in xlgmac_enable_dma_interrupts()
2469 dma_ch_ier = XLGMAC_SET_REG_BITS(dma_ch_ier, in xlgmac_enable_dma_interrupts()
2472 dma_ch_ier = XLGMAC_SET_REG_BITS(dma_ch_ier, in xlgmac_enable_dma_interrupts()
2482 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_enable_dma_interrupts()
2494 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_enable_dma_interrupts()
2500 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_enable_dma_interrupts()
2533 mac_ier = XLGMAC_SET_REG_BITS(mac_ier, MAC_IER_TSIE_POS, in xlgmac_enable_mac_interrupts()
2540 regval = XLGMAC_SET_REG_BITS(regval, MMC_RIER_ALL_INTERRUPTS_POS, in xlgmac_enable_mac_interrupts()
2544 regval = XLGMAC_SET_REG_BITS(regval, MMC_TIER_ALL_INTERRUPTS_POS, in xlgmac_enable_mac_interrupts()
2559 regval = XLGMAC_SET_REG_BITS(regval, MAC_TCR_SS_POS, in xlgmac_set_xlgmii_25000_speed()
2576 regval = XLGMAC_SET_REG_BITS(regval, MAC_TCR_SS_POS, in xlgmac_set_xlgmii_40000_speed()
2593 regval = XLGMAC_SET_REG_BITS(regval, MAC_TCR_SS_POS, in xlgmac_set_xlgmii_50000_speed()
2610 regval = XLGMAC_SET_REG_BITS(regval, MAC_TCR_SS_POS, in xlgmac_set_xlgmii_100000_speed()
2670 pkt_info->attributes = XLGMAC_SET_REG_BITS( in xlgmac_dev_read()
2675 pkt_info->attributes = XLGMAC_SET_REG_BITS( in xlgmac_dev_read()
2684 pkt_info->attributes = XLGMAC_SET_REG_BITS( in xlgmac_dev_read()
2694 pkt_info->attributes = XLGMAC_SET_REG_BITS( in xlgmac_dev_read()
2715 pkt_info->attributes = XLGMAC_SET_REG_BITS( in xlgmac_dev_read()
2747 pkt_info->attributes = XLGMAC_SET_REG_BITS( in xlgmac_dev_read()
2756 pkt_info->attributes = XLGMAC_SET_REG_BITS( in xlgmac_dev_read()
2764 pkt_info->attributes = XLGMAC_SET_REG_BITS( in xlgmac_dev_read()
2783 pkt_info->attributes = XLGMAC_SET_REG_BITS( in xlgmac_dev_read()
2797 pkt_info->attributes = XLGMAC_SET_REG_BITS( in xlgmac_dev_read()
2803 pkt_info->errors = XLGMAC_SET_REG_BITS( in xlgmac_dev_read()
2825 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_enable_int()
2830 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_enable_int()
2835 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_enable_int()
2840 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_enable_int()
2845 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_enable_int()
2850 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_enable_int()
2855 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_enable_int()
2858 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_enable_int()
2863 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_enable_int()
2888 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_disable_int()
2893 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_disable_int()
2898 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_disable_int()
2903 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_disable_int()
2908 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_disable_int()
2913 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_disable_int()
2918 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_disable_int()
2921 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_disable_int()
2926 dma_ch_ier = XLGMAC_SET_REG_BITS( in xlgmac_disable_int()
2950 regval = XLGMAC_SET_REG_BITS(regval, MTL_Q_TQOMR_FTQ_POS, in xlgmac_flush_tx_queues()
2977 regval = XLGMAC_SET_REG_BITS(regval, DMA_SBMR_EAME_POS, in xlgmac_config_dma_bus()
2980 regval = XLGMAC_SET_REG_BITS(regval, DMA_SBMR_UNDEF_POS, in xlgmac_config_dma_bus()
2982 regval = XLGMAC_SET_REG_BITS(regval, DMA_SBMR_BLEN_256_POS, in xlgmac_config_dma_bus()
3048 regval = XLGMAC_SET_REG_BITS(regval, DMA_MR_SWR_POS, in xlgmac_hw_exit()