Lines Matching refs:opCapFlags
55 .opCapFlags = {
633 .opCapFlags = {
1212 .opCapFlags = {
1791 .opCapFlags = {
2369 .opCapFlags = {
2991 return pBase->opCapFlags.opFlags; in ath9k_hw_ar9300_get_eeprom()
3527 PR_EEP("Allow 5GHz", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3529 PR_EEP("Allow 2GHz", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3531 PR_EEP("Disable 2GHz HT20", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3533 PR_EEP("Disable 2GHz HT40", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3535 PR_EEP("Disable 5Ghz HT20", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3537 PR_EEP("Disable 5Ghz HT40", !!(pBase->opCapFlags.opFlags & in ath9k_hw_ar9003_dump_eeprom()
3539 PR_EEP("Big Endian", !!(pBase->opCapFlags.eepMisc & in ath9k_hw_ar9003_dump_eeprom()
5618 return ah->eeprom.ar9300_eep.baseEepHeader.opCapFlags.eepMisc; in ar9003_get_eepmisc()