Lines Matching refs:ci
240 static void brcmf_chip_sb_corerev(struct brcmf_chip_priv *ci, in brcmf_chip_sb_corerev() argument
245 regdata = ci->ops->read32(ci->ctx, CORE_SB(core->base, sbidhigh)); in brcmf_chip_sb_corerev()
251 struct brcmf_chip_priv *ci; in brcmf_chip_sb_iscoreup() local
255 ci = core->chip; in brcmf_chip_sb_iscoreup()
257 regdata = ci->ops->read32(ci->ctx, address); in brcmf_chip_sb_iscoreup()
265 struct brcmf_chip_priv *ci; in brcmf_chip_ai_iscoreup() local
269 ci = core->chip; in brcmf_chip_ai_iscoreup()
270 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_iscoreup()
273 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL); in brcmf_chip_ai_iscoreup()
282 struct brcmf_chip_priv *ci; in brcmf_chip_sb_coredisable() local
285 ci = core->chip; in brcmf_chip_sb_coredisable()
287 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
291 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
297 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
298 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_coredisable()
301 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
303 SPINWAIT((ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh)) in brcmf_chip_sb_coredisable()
306 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh)); in brcmf_chip_sb_coredisable()
310 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbidlow)); in brcmf_chip_sb_coredisable()
312 val = ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
315 ci->ops->write32(ci->ctx, in brcmf_chip_sb_coredisable()
317 val = ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
320 SPINWAIT((ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
328 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), val); in brcmf_chip_sb_coredisable()
329 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_coredisable()
333 val = ci->ops->read32(ci->ctx, CORE_SB(base, sbidlow)); in brcmf_chip_sb_coredisable()
335 val = ci->ops->read32(ci->ctx, in brcmf_chip_sb_coredisable()
338 ci->ops->write32(ci->ctx, in brcmf_chip_sb_coredisable()
344 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_coredisable()
352 struct brcmf_chip_priv *ci; in brcmf_chip_ai_coredisable() local
355 ci = core->chip; in brcmf_chip_ai_coredisable()
358 regdata = ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL); in brcmf_chip_ai_coredisable()
363 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_coredisable()
365 ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_coredisable()
368 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_RESET_CTL, in brcmf_chip_ai_coredisable()
373 SPINWAIT(ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL) != in brcmf_chip_ai_coredisable()
378 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_coredisable()
380 ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_coredisable()
386 struct brcmf_chip_priv *ci; in brcmf_chip_sb_resetcore() local
390 ci = core->chip; in brcmf_chip_sb_resetcore()
403 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_resetcore()
406 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_resetcore()
410 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatehigh)); in brcmf_chip_sb_resetcore()
412 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatehigh), 0); in brcmf_chip_sb_resetcore()
414 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbimstate)); in brcmf_chip_sb_resetcore()
417 ci->ops->write32(ci->ctx, CORE_SB(base, sbimstate), regdata); in brcmf_chip_sb_resetcore()
421 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_resetcore()
423 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_resetcore()
427 ci->ops->write32(ci->ctx, CORE_SB(base, sbtmstatelow), in brcmf_chip_sb_resetcore()
429 regdata = ci->ops->read32(ci->ctx, CORE_SB(base, sbtmstatelow)); in brcmf_chip_sb_resetcore()
436 struct brcmf_chip_priv *ci; in brcmf_chip_ai_resetcore() local
441 ci = core->chip; in brcmf_chip_ai_resetcore()
445 d11core2 = brcmf_chip_get_d11core(&ci->pub, 1); in brcmf_chip_ai_resetcore()
459 while (ci->ops->read32(ci->ctx, core->wrapbase + BCMA_RESET_CTL) & in brcmf_chip_ai_resetcore()
461 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_RESET_CTL, 0); in brcmf_chip_ai_resetcore()
470 while (ci->ops->read32(ci->ctx, in brcmf_chip_ai_resetcore()
473 ci->ops->write32(ci->ctx, in brcmf_chip_ai_resetcore()
483 ci->ops->write32(ci->ctx, core->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_resetcore()
485 ci->ops->read32(ci->ctx, core->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_resetcore()
488 ci->ops->write32(ci->ctx, d11priv2->wrapbase + BCMA_IOCTL, in brcmf_chip_ai_resetcore()
490 ci->ops->read32(ci->ctx, d11priv2->wrapbase + BCMA_IOCTL); in brcmf_chip_ai_resetcore()
503 static struct brcmf_core *brcmf_chip_add_core(struct brcmf_chip_priv *ci, in brcmf_chip_add_core() argument
515 core->chip = ci; in brcmf_chip_add_core()
518 list_add_tail(&core->list, &ci->cores); in brcmf_chip_add_core()
523 static int brcmf_chip_cores_check(struct brcmf_chip_priv *ci) in brcmf_chip_cores_check() argument
531 list_for_each_entry(core, &ci->cores, list) { in brcmf_chip_cores_check()
703 static u32 brcmf_chip_tcm_rambase(struct brcmf_chip_priv *ci) in brcmf_chip_tcm_rambase() argument
705 switch (ci->pub.chip) { in brcmf_chip_tcm_rambase()
728 return (ci->pub.chiprev < 9) ? 0x180000 : 0x160000; in brcmf_chip_tcm_rambase()
735 brcmf_err("unknown chip: %s\n", ci->pub.name); in brcmf_chip_tcm_rambase()
743 struct brcmf_chip_priv *ci = container_of(pub, struct brcmf_chip_priv, in brcmf_chip_get_raminfo() local
748 mem = brcmf_chip_get_core(&ci->pub, BCMA_CORE_ARM_CR4); in brcmf_chip_get_raminfo()
751 ci->pub.ramsize = brcmf_chip_tcm_ramsize(mem_core); in brcmf_chip_get_raminfo()
752 ci->pub.rambase = brcmf_chip_tcm_rambase(ci); in brcmf_chip_get_raminfo()
753 if (ci->pub.rambase == INVALID_RAMBASE) { in brcmf_chip_get_raminfo()
758 mem = brcmf_chip_get_core(&ci->pub, BCMA_CORE_SYS_MEM); in brcmf_chip_get_raminfo()
762 ci->pub.ramsize = brcmf_chip_sysmem_ramsize(mem_core); in brcmf_chip_get_raminfo()
763 ci->pub.rambase = brcmf_chip_tcm_rambase(ci); in brcmf_chip_get_raminfo()
764 if (ci->pub.rambase == INVALID_RAMBASE) { in brcmf_chip_get_raminfo()
769 mem = brcmf_chip_get_core(&ci->pub, in brcmf_chip_get_raminfo()
777 brcmf_chip_socram_ramsize(mem_core, &ci->pub.ramsize, in brcmf_chip_get_raminfo()
778 &ci->pub.srsize); in brcmf_chip_get_raminfo()
782 ci->pub.rambase, ci->pub.ramsize, ci->pub.ramsize, in brcmf_chip_get_raminfo()
783 ci->pub.srsize, ci->pub.srsize); in brcmf_chip_get_raminfo()
785 if (!ci->pub.ramsize) { in brcmf_chip_get_raminfo()
790 if (ci->pub.ramsize > BRCMF_CHIP_MAX_MEMSIZE) { in brcmf_chip_get_raminfo()
798 static u32 brcmf_chip_dmp_get_desc(struct brcmf_chip_priv *ci, u32 *eromaddr, in brcmf_chip_dmp_get_desc() argument
804 val = ci->ops->read32(ci->ctx, *eromaddr); in brcmf_chip_dmp_get_desc()
818 static int brcmf_chip_dmp_get_regaddr(struct brcmf_chip_priv *ci, u32 *eromaddr, in brcmf_chip_dmp_get_regaddr() argument
828 val = brcmf_chip_dmp_get_desc(ci, eromaddr, &desc); in brcmf_chip_dmp_get_regaddr()
843 val = brcmf_chip_dmp_get_desc(ci, eromaddr, &desc); in brcmf_chip_dmp_get_regaddr()
860 brcmf_chip_dmp_get_desc(ci, eromaddr, NULL); in brcmf_chip_dmp_get_regaddr()
866 szdesc = brcmf_chip_dmp_get_desc(ci, eromaddr, NULL); in brcmf_chip_dmp_get_regaddr()
869 brcmf_chip_dmp_get_desc(ci, eromaddr, NULL); in brcmf_chip_dmp_get_regaddr()
890 int brcmf_chip_dmp_erom_scan(struct brcmf_chip_priv *ci) in brcmf_chip_dmp_erom_scan() argument
901 eromaddr = ci->ops->read32(ci->ctx, in brcmf_chip_dmp_erom_scan()
902 CORE_CC_REG(ci->pub.enum_base, eromptr)); in brcmf_chip_dmp_erom_scan()
905 val = brcmf_chip_dmp_get_desc(ci, &eromaddr, &desc_type); in brcmf_chip_dmp_erom_scan()
919 val = brcmf_chip_dmp_get_desc(ci, &eromaddr, &desc_type); in brcmf_chip_dmp_erom_scan()
935 err = brcmf_chip_dmp_get_regaddr(ci, &eromaddr, &base, &wrap); in brcmf_chip_dmp_erom_scan()
940 core = brcmf_chip_add_core(ci, id, base, wrap); in brcmf_chip_dmp_erom_scan()
955 static int brcmf_chip_recognition(struct brcmf_chip_priv *ci) in brcmf_chip_recognition() argument
967 regdata = ci->ops->read32(ci->ctx, in brcmf_chip_recognition()
968 CORE_CC_REG(ci->pub.enum_base, chipid)); in brcmf_chip_recognition()
969 ci->pub.chip = regdata & CID_ID_MASK; in brcmf_chip_recognition()
970 ci->pub.chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT; in brcmf_chip_recognition()
973 brcmf_chip_name(ci->pub.chip, ci->pub.chiprev, in brcmf_chip_recognition()
974 ci->pub.name, sizeof(ci->pub.name)); in brcmf_chip_recognition()
976 socitype == SOCI_SB ? "SB" : "AXI", ci->pub.name); in brcmf_chip_recognition()
979 if (ci->pub.chip != BRCM_CC_4329_CHIP_ID) { in brcmf_chip_recognition()
983 ci->iscoreup = brcmf_chip_sb_iscoreup; in brcmf_chip_recognition()
984 ci->coredisable = brcmf_chip_sb_coredisable; in brcmf_chip_recognition()
985 ci->resetcore = brcmf_chip_sb_resetcore; in brcmf_chip_recognition()
987 core = brcmf_chip_add_core(ci, BCMA_CORE_CHIPCOMMON, in brcmf_chip_recognition()
989 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
990 core = brcmf_chip_add_core(ci, BCMA_CORE_SDIO_DEV, in brcmf_chip_recognition()
992 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
993 core = brcmf_chip_add_core(ci, BCMA_CORE_INTERNAL_MEM, in brcmf_chip_recognition()
995 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
996 core = brcmf_chip_add_core(ci, BCMA_CORE_ARM_CM3, in brcmf_chip_recognition()
998 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
1000 core = brcmf_chip_add_core(ci, BCMA_CORE_80211, 0x18001000, 0); in brcmf_chip_recognition()
1001 brcmf_chip_sb_corerev(ci, core); in brcmf_chip_recognition()
1003 ci->iscoreup = brcmf_chip_ai_iscoreup; in brcmf_chip_recognition()
1004 ci->coredisable = brcmf_chip_ai_coredisable; in brcmf_chip_recognition()
1005 ci->resetcore = brcmf_chip_ai_resetcore; in brcmf_chip_recognition()
1007 brcmf_chip_dmp_erom_scan(ci); in brcmf_chip_recognition()
1014 ret = brcmf_chip_cores_check(ci); in brcmf_chip_recognition()
1019 brcmf_chip_set_passive(&ci->pub); in brcmf_chip_recognition()
1024 if (ci->ops->reset) { in brcmf_chip_recognition()
1025 ci->ops->reset(ci->ctx, &ci->pub); in brcmf_chip_recognition()
1026 brcmf_chip_set_passive(&ci->pub); in brcmf_chip_recognition()
1029 return brcmf_chip_get_raminfo(&ci->pub); in brcmf_chip_recognition()