212 	iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_CTRL_REG,  in iwl_trans_pcie_read_shr()
219 	iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_DATA_REG, val);  in iwl_trans_pcie_write_shr()
220 	iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_CTRL_REG,  in iwl_trans_pcie_write_shr()
627 	iwl_write32(trans, FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),  in iwl_pcie_load_firmware_chunk_fh()
630 	iwl_write32(trans, FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL),  in iwl_pcie_load_firmware_chunk_fh()
633 	iwl_write32(trans, FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),  in iwl_pcie_load_firmware_chunk_fh()
636 	iwl_write32(trans, FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),  in iwl_pcie_load_firmware_chunk_fh()
640 	iwl_write32(trans, FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),  in iwl_pcie_load_firmware_chunk_fh()
645 	iwl_write32(trans, FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),  in iwl_pcie_load_firmware_chunk_fh()
908 			iwl_write32(trans, addr, val);  in iwl_pcie_apply_destination()
988 	iwl_write32(trans, CSR_RESET, 0);  in iwl_pcie_load_given_ucode()
1116 	iwl_write32(trans, CSR_MSIX_FH_INT_MASK_AD, ~val);  in iwl_pcie_map_rx_causes()
1285 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);  in iwl_trans_pcie_start_fw()
1315 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwl_trans_pcie_start_fw()
1316 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR,  in iwl_trans_pcie_start_fw()
1320 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);  in iwl_trans_pcie_start_fw()
1338 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwl_trans_pcie_start_fw()
1339 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwl_trans_pcie_start_fw()
2100 			iwl_write32(trans, CSR_RESET,  in __iwl_trans_pcie_grab_nic_access()
2171 			iwl_write32(trans, HBUS_TARG_MEM_RADDR,  in iwl_trans_pcie_read_mem()
2203 		iwl_write32(trans, HBUS_TARG_MEM_WADDR, addr);  in iwl_trans_pcie_write_mem()
2205 			iwl_write32(trans, HBUS_TARG_MEM_WDAT,  in iwl_trans_pcie_write_mem()
2236 				iwl_write32(trans, HBUS_TARG_WRPTR,  in iwl_trans_pcie_block_txq_ptrs()