67 	mt76_wr(dev, MT_TIMEOUT_CCK, cck + reg_offset);  in mt7603_mac_set_timing()
68 	mt76_wr(dev, MT_TIMEOUT_OFDM, ofdm + reg_offset);  in mt7603_mac_set_timing()
69 	mt76_wr(dev, MT_IFS,  in mt7603_mac_set_timing()
154 		mt76_wr(dev, addr + i, 0);  in mt7603_wtbl_init()
160 		mt76_wr(dev, addr + i, 0);  in mt7603_wtbl_init()
164 		mt76_wr(dev, addr + i, 0);  in mt7603_wtbl_init()
178 	mt76_wr(dev, addr + 3 * 4, val);  in mt7603_wtbl_set_skip_tx()
195 	mt76_wr(dev, MT_TX_ABORT, MT_TX_ABORT_EN |  in mt7603_filter_tx()
199 		mt76_wr(dev, MT_DMA_FQCR0, MT_DMA_FQCR0_BUSY |  in mt7603_filter_tx()
209 	mt76_wr(dev, MT_TX_ABORT, 0);  in mt7603_filter_tx()
237 	mt76_wr(dev, MT_PSE_RTA,  in mt7603_wtbl_set_ps()
281 	mt76_wr(dev, addr + 0 * 4,  in mt7603_wtbl_clear()
285 	mt76_wr(dev, addr + 1 * 4, 0);  in mt7603_wtbl_clear()
286 	mt76_wr(dev, addr + 2 * 4, 0);  in mt7603_wtbl_clear()
290 	mt76_wr(dev, addr + 3 * 4,  in mt7603_wtbl_clear()
295 	mt76_wr(dev, addr + 4 * 4,  in mt7603_wtbl_clear()
305 	mt76_wr(dev, addr + (15 * 4), 0);  in mt7603_wtbl_clear()
309 		mt76_wr(dev, addr + (i * 4), 0);  in mt7603_wtbl_clear()
343 	mt76_wr(dev, addr + 2 * 4, val);  in mt7603_wtbl_update_cap()
353 	mt76_wr(dev, addr + 9 * 4, val);  in mt7603_wtbl_update_cap()
358 	mt76_wr(dev, MT_BA_CONTROL_0, get_unaligned_le32(addr));  in mt7603_mac_rx_ba_reset()
359 	mt76_wr(dev, MT_BA_CONTROL_1,  in mt7603_mac_rx_ba_reset()
818 	mt76_wr(dev, MT_WTBL_RIUCR0, w9);  in mt7603_wtbl_set_rates()
820 	mt76_wr(dev, MT_WTBL_RIUCR1,  in mt7603_wtbl_set_rates()
825 	mt76_wr(dev, MT_WTBL_RIUCR2,  in mt7603_wtbl_set_rates()
831 	mt76_wr(dev, MT_WTBL_RIUCR3,  in mt7603_wtbl_set_rates()
839 	mt76_wr(dev, MT_WTBL_UPDATE,  in mt7603_wtbl_set_rates()
1363 	mt76_wr(dev, MT_WF_ARB_TX_START_0, ~0);  in mt7603_mac_start()
1371 	mt76_wr(dev, MT_WF_ARB_TX_START_0, 0);  in mt7603_mac_stop()
1501 	mt76_wr(dev, MT_WPDMA_DEBUG,  in mt7603_dma_debug()
1568 	mt76_wr(dev, addr, 3);  in mt7603_rx_pse_busy()
1646 	mt76_wr(dev, MT_RXTD(6), rxtd_6);  in mt7603_edcca_set_strict()
1760 	mt76_wr(dev, MT_AGC(0), agc0);  in mt7603_adjust_sensitivity()
1761 	mt76_wr(dev, MT_AGC1(0), agc0);  in mt7603_adjust_sensitivity()
1763 	mt76_wr(dev, MT_AGC(3), agc3);  in mt7603_adjust_sensitivity()
1764 	mt76_wr(dev, MT_AGC1(3), agc3);  in mt7603_adjust_sensitivity()