155 		mt76_wr(dev, reg + MT_DMASHDL_GROUP_QUOTA(i),  in mt7622_dma_sched_init()
159 	mt76_wr(dev, reg + MT_DMASHDL_Q_MAP(0), 0x42104210);  in mt7622_dma_sched_init()
160 	mt76_wr(dev, reg + MT_DMASHDL_Q_MAP(1), 0x42104210);  in mt7622_dma_sched_init()
161 	mt76_wr(dev, reg + MT_DMASHDL_Q_MAP(2), 0x5);  in mt7622_dma_sched_init()
162 	mt76_wr(dev, reg + MT_DMASHDL_Q_MAP(3), 0);  in mt7622_dma_sched_init()
164 	mt76_wr(dev, reg + MT_DMASHDL_SCHED_SET0, 0x6012345f);  in mt7622_dma_sched_init()
165 	mt76_wr(dev, reg + MT_DMASHDL_SCHED_SET1, 0xedcba987);  in mt7622_dma_sched_init()
178 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_REFILL), 0xffc80000);  in mt7663_dma_sched_init()
180 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_OPTIONAL), 0x70068037);  in mt7663_dma_sched_init()
184 		mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(i)),  in mt7663_dma_sched_init()
187 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(5)),  in mt7663_dma_sched_init()
190 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(15)),  in mt7663_dma_sched_init()
194 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(0)), 0x42104210);  in mt7663_dma_sched_init()
195 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(1)), 0x42104210);  in mt7663_dma_sched_init()
196 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(2)), 0x00050005);  in mt7663_dma_sched_init()
197 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(3)), 0);  in mt7663_dma_sched_init()
199 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET0), 0x6012345f);  in mt7663_dma_sched_init()
200 	mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET1), 0xedcba987);  in mt7663_dma_sched_init()
217 		mt76_wr(dev, MT_MCU2HOST_INT_ENABLE, MT7663_MCU_CMD_ERROR_MASK);  in mt7615_dma_start()
230 	mt76_wr(dev, MT_WPDMA_GLO_CFG,  in mt7615_dma_init()
251 		mt76_wr(dev, MT_WPDMA_GLO_CFG1, 0x1);  in mt7615_dma_init()
252 		mt76_wr(dev, MT_WPDMA_TX_PRE_CFG, 0xf0000);  in mt7615_dma_init()
253 		mt76_wr(dev, MT_WPDMA_RX_PRE_CFG, 0xf7f0000);  in mt7615_dma_init()
254 		mt76_wr(dev, MT_WPDMA_ABT_CFG, 0x4000026);  in mt7615_dma_init()
255 		mt76_wr(dev, MT_WPDMA_ABT_CFG1, 0x18811881);  in mt7615_dma_init()
260 	mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);  in mt7615_dma_init()
281 	mt76_wr(dev, MT_DELAY_INT_CFG, 0);  in mt7615_dma_init()