36 	mt76_wr(dev, 0x504, 0x06000000);  in mt76x2u_mac_fixup_xtal()
37 	mt76_wr(dev, 0x50c, 0x08800000);  in mt76x2u_mac_fixup_xtal()
39 	mt76_wr(dev, 0x504, 0x0);  in mt76x2u_mac_fixup_xtal()
52 		mt76_wr(dev, MT_XO_CTRL7, 0x5c1fee80);  in mt76x2u_mac_fixup_xtal()
55 		mt76_wr(dev, MT_XO_CTRL7, 0x5c1feed0);  in mt76x2u_mac_fixup_xtal()
64 	mt76_wr(dev, MT_WPDMA_GLO_CFG, BIT(4) | BIT(5));  in mt76x2u_mac_reset()
67 	mt76_wr(dev, MT_PBF_TX_MAX_PCNT, 0xefef3f1f);  in mt76x2u_mac_reset()
68 	mt76_wr(dev, MT_PBF_RX_MAX_PCNT, 0xfebf);  in mt76x2u_mac_reset()
72 	mt76_wr(dev, MT_TX_LINK_CFG, 0x1020);  in mt76x2u_mac_reset()
73 	mt76_wr(dev, MT_AUTO_RSP_CFG, 0x13);  in mt76x2u_mac_reset()
74 	mt76_wr(dev, MT_MAX_LEN_CFG, 0x2f00);  in mt76x2u_mac_reset()
76 	mt76_wr(dev, MT_WMM_AIFSN, 0x2273);  in mt76x2u_mac_reset()
77 	mt76_wr(dev, MT_WMM_CWMIN, 0x2344);  in mt76x2u_mac_reset()
78 	mt76_wr(dev, MT_WMM_CWMAX, 0x34aa);  in mt76x2u_mac_reset()
105 	mt76_wr(dev, MT_TX_RTS_CFG, rts_cfg & ~MT_TX_RTS_CFG_RETRY_LIMIT);  in mt76x2u_mac_stop()
171 	mt76_wr(dev, MT_TX_RTS_CFG, rts_cfg);  in mt76x2u_mac_stop()