145 				       struct perf_event *event, int idx);
150 	unsigned int idx;  in smmu_pmu_enable_quirk_hip08_09()  local
152 	for_each_set_bit(idx, smmu_pmu->used_counters, smmu_pmu->num_counters)  in smmu_pmu_enable_quirk_hip08_09()
153 		smmu_pmu_apply_event_filter(smmu_pmu, smmu_pmu->events[idx], idx);  in smmu_pmu_enable_quirk_hip08_09()
169 	unsigned int idx;  in smmu_pmu_disable_quirk_hip08_09()  local
176 	for_each_set_bit(idx, smmu_pmu->used_counters, smmu_pmu->num_counters)  in smmu_pmu_disable_quirk_hip08_09()
177 		writel(0xffff, smmu_pmu->reg_base + SMMU_PMCG_EVTYPER(idx));  in smmu_pmu_disable_quirk_hip08_09()
183 					      u32 idx, u64 value)  in smmu_pmu_counter_set_value()  argument
186 		writeq(value, smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx, 8));  in smmu_pmu_counter_set_value()
188 		writel(value, smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx, 4));  in smmu_pmu_counter_set_value()
191 static inline u64 smmu_pmu_counter_get_value(struct smmu_pmu *smmu_pmu, u32 idx)  in smmu_pmu_counter_get_value()  argument
196 		value = readq(smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx, 8));  in smmu_pmu_counter_get_value()
198 		value = readl(smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx, 4));  in smmu_pmu_counter_get_value()
203 static inline void smmu_pmu_counter_enable(struct smmu_pmu *smmu_pmu, u32 idx)  in smmu_pmu_counter_enable()  argument
205 	writeq(BIT(idx), smmu_pmu->reg_base + SMMU_PMCG_CNTENSET0);  in smmu_pmu_counter_enable()
208 static inline void smmu_pmu_counter_disable(struct smmu_pmu *smmu_pmu, u32 idx)  in smmu_pmu_counter_disable()  argument
210 	writeq(BIT(idx), smmu_pmu->reg_base + SMMU_PMCG_CNTENCLR0);  in smmu_pmu_counter_disable()
213 static inline void smmu_pmu_interrupt_enable(struct smmu_pmu *smmu_pmu, u32 idx)  in smmu_pmu_interrupt_enable()  argument
215 	writeq(BIT(idx), smmu_pmu->reg_base + SMMU_PMCG_INTENSET0);  in smmu_pmu_interrupt_enable()
219 					      u32 idx)  in smmu_pmu_interrupt_disable()  argument
221 	writeq(BIT(idx), smmu_pmu->reg_base + SMMU_PMCG_INTENCLR0);  in smmu_pmu_interrupt_disable()
224 static inline void smmu_pmu_set_evtyper(struct smmu_pmu *smmu_pmu, u32 idx,  in smmu_pmu_set_evtyper()  argument
227 	writel(val, smmu_pmu->reg_base + SMMU_PMCG_EVTYPER(idx));  in smmu_pmu_set_evtyper()
230 static inline void smmu_pmu_set_smr(struct smmu_pmu *smmu_pmu, u32 idx, u32 val)  in smmu_pmu_set_smr()  argument
232 	writel(val, smmu_pmu->reg_base + SMMU_PMCG_SMR(idx));  in smmu_pmu_set_smr()
240 	u32 idx = hwc->idx;  in smmu_pmu_event_update()  local
244 		now = smmu_pmu_counter_get_value(smmu_pmu, idx);  in smmu_pmu_event_update()
257 	u32 idx = hwc->idx;  in smmu_pmu_set_period()  local
268 		new = smmu_pmu_counter_get_value(smmu_pmu, idx);  in smmu_pmu_set_period()
277 		smmu_pmu_counter_set_value(smmu_pmu, idx, new);  in smmu_pmu_set_period()
284 				      int idx, u32 span, u32 sid)  in smmu_pmu_set_event_filter()  argument
290 	smmu_pmu_set_evtyper(smmu_pmu, idx, evtyper);  in smmu_pmu_set_event_filter()
291 	smmu_pmu_set_smr(smmu_pmu, idx, sid);  in smmu_pmu_set_event_filter()
308 				       struct perf_event *event, int idx)  in smmu_pmu_apply_event_filter()  argument
325 		smmu_pmu_set_event_filter(event, idx, span, sid);  in smmu_pmu_apply_event_filter()
331 		smmu_pmu_set_evtyper(smmu_pmu, idx, get_event(event));  in smmu_pmu_apply_event_filter()
341 	int idx, err;  in smmu_pmu_get_event_idx()  local
344 	idx = find_first_zero_bit(smmu_pmu->used_counters, num_ctrs);  in smmu_pmu_get_event_idx()
345 	if (idx == num_ctrs)  in smmu_pmu_get_event_idx()
349 	err = smmu_pmu_apply_event_filter(smmu_pmu, event, idx);  in smmu_pmu_get_event_idx()
353 	set_bit(idx, smmu_pmu->used_counters);  in smmu_pmu_get_event_idx()
355 	return idx;  in smmu_pmu_get_event_idx()
426 	hwc->idx = -1;  in smmu_pmu_event_init()
441 	int idx = hwc->idx;  in smmu_pmu_event_start()  local
447 	smmu_pmu_counter_enable(smmu_pmu, idx);  in smmu_pmu_event_start()
454 	int idx = hwc->idx;  in smmu_pmu_event_stop()  local
459 	smmu_pmu_counter_disable(smmu_pmu, idx);  in smmu_pmu_event_stop()
468 	int idx;  in smmu_pmu_event_add()  local
471 	idx = smmu_pmu_get_event_idx(smmu_pmu, event);  in smmu_pmu_event_add()
472 	if (idx < 0)  in smmu_pmu_event_add()
473 		return idx;  in smmu_pmu_event_add()
475 	hwc->idx = idx;  in smmu_pmu_event_add()
477 	smmu_pmu->events[idx] = event;  in smmu_pmu_event_add()
480 	smmu_pmu_interrupt_enable(smmu_pmu, idx);  in smmu_pmu_event_add()
495 	int idx = hwc->idx;  in smmu_pmu_event_del()  local
498 	smmu_pmu_interrupt_disable(smmu_pmu, idx);  in smmu_pmu_event_del()
499 	smmu_pmu->events[idx] = NULL;  in smmu_pmu_event_del()
500 	clear_bit(idx, smmu_pmu->used_counters);  in smmu_pmu_event_del()
670 	unsigned int idx;  in smmu_pmu_handle_irq()  local
678 	for_each_set_bit(idx, (unsigned long *)&ovsr, smmu_pmu->num_counters) {  in smmu_pmu_handle_irq()
679 		struct perf_event *event = smmu_pmu->events[idx];  in smmu_pmu_handle_irq()