Lines Matching refs:instance
386 struct mtk_phy_instance *instance) in hs_slew_rate_calibrate() argument
388 struct u2phy_banks *u2_banks = &instance->u2_banks; in hs_slew_rate_calibrate()
400 if (instance->eye_src) in hs_slew_rate_calibrate()
419 tmp |= P2F_RG_MONCLK_SEL_VAL(instance->index >> 1); in hs_slew_rate_calibrate()
454 instance->index, fm_out, calibration_val, in hs_slew_rate_calibrate()
470 struct mtk_phy_instance *instance) in u3_phy_instance_init() argument
472 struct u3phy_banks *u3_banks = &instance->u3_banks; in u3_phy_instance_init()
516 dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index); in u3_phy_instance_init()
520 struct mtk_phy_instance *instance) in u2_phy_pll_26m_set() argument
522 struct u2phy_banks *u2_banks = &instance->u2_banks; in u2_phy_pll_26m_set()
547 struct mtk_phy_instance *instance) in u2_phy_instance_init() argument
549 struct u2phy_banks *u2_banks = &instance->u2_banks; in u2_phy_instance_init()
551 u32 index = instance->index; in u2_phy_instance_init()
606 u2_phy_pll_26m_set(tphy, instance); in u2_phy_instance_init()
612 struct mtk_phy_instance *instance) in u2_phy_instance_power_on() argument
614 struct u2phy_banks *u2_banks = &instance->u2_banks; in u2_phy_instance_power_on()
616 u32 index = instance->index; in u2_phy_instance_power_on()
646 struct mtk_phy_instance *instance) in u2_phy_instance_power_off() argument
648 struct u2phy_banks *u2_banks = &instance->u2_banks; in u2_phy_instance_power_off()
650 u32 index = instance->index; in u2_phy_instance_power_off()
681 struct mtk_phy_instance *instance) in u2_phy_instance_exit() argument
683 struct u2phy_banks *u2_banks = &instance->u2_banks; in u2_phy_instance_exit()
685 u32 index = instance->index; in u2_phy_instance_exit()
700 struct mtk_phy_instance *instance, in u2_phy_instance_set_mode() argument
703 struct u2phy_banks *u2_banks = &instance->u2_banks; in u2_phy_instance_set_mode()
725 struct mtk_phy_instance *instance) in pcie_phy_instance_init() argument
727 struct u3phy_banks *u3_banks = &instance->u3_banks; in pcie_phy_instance_init()
794 dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index); in pcie_phy_instance_init()
798 struct mtk_phy_instance *instance) in pcie_phy_instance_power_on() argument
800 struct u3phy_banks *bank = &instance->u3_banks; in pcie_phy_instance_power_on()
813 struct mtk_phy_instance *instance) in pcie_phy_instance_power_off() argument
816 struct u3phy_banks *bank = &instance->u3_banks; in pcie_phy_instance_power_off()
829 struct mtk_phy_instance *instance) in sata_phy_instance_init() argument
831 struct u3phy_banks *u3_banks = &instance->u3_banks; in sata_phy_instance_init()
883 dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index); in sata_phy_instance_init()
887 struct mtk_phy_instance *instance) in phy_v1_banks_init() argument
889 struct u2phy_banks *u2_banks = &instance->u2_banks; in phy_v1_banks_init()
890 struct u3phy_banks *u3_banks = &instance->u3_banks; in phy_v1_banks_init()
892 switch (instance->type) { in phy_v1_banks_init()
896 u2_banks->com = instance->port_base + SSUSB_SIFSLV_V1_U2PHY_COM; in phy_v1_banks_init()
902 u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD; in phy_v1_banks_init()
903 u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA; in phy_v1_banks_init()
906 u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD; in phy_v1_banks_init()
915 struct mtk_phy_instance *instance) in phy_v2_banks_init() argument
917 struct u2phy_banks *u2_banks = &instance->u2_banks; in phy_v2_banks_init()
918 struct u3phy_banks *u3_banks = &instance->u3_banks; in phy_v2_banks_init()
920 switch (instance->type) { in phy_v2_banks_init()
922 u2_banks->misc = instance->port_base + SSUSB_SIFSLV_V2_MISC; in phy_v2_banks_init()
923 u2_banks->fmreg = instance->port_base + SSUSB_SIFSLV_V2_U2FREQ; in phy_v2_banks_init()
924 u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM; in phy_v2_banks_init()
928 u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V2_SPLLC; in phy_v2_banks_init()
929 u3_banks->chip = instance->port_base + SSUSB_SIFSLV_V2_CHIP; in phy_v2_banks_init()
930 u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V2_U3PHYD; in phy_v2_banks_init()
931 u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V2_U3PHYA; in phy_v2_banks_init()
940 struct mtk_phy_instance *instance) in phy_parse_property() argument
942 struct device *dev = &instance->phy->dev; in phy_parse_property()
944 if (instance->type != PHY_TYPE_USB2) in phy_parse_property()
947 instance->bc12_en = device_property_read_bool(dev, "mediatek,bc12"); in phy_parse_property()
949 &instance->eye_src); in phy_parse_property()
951 &instance->eye_vrt); in phy_parse_property()
953 &instance->eye_term); in phy_parse_property()
955 &instance->intr); in phy_parse_property()
957 &instance->discth); in phy_parse_property()
959 instance->bc12_en, instance->eye_src, in phy_parse_property()
960 instance->eye_vrt, instance->eye_term, in phy_parse_property()
961 instance->intr, instance->discth); in phy_parse_property()
965 struct mtk_phy_instance *instance) in u2_phy_props_set() argument
967 struct u2phy_banks *u2_banks = &instance->u2_banks; in u2_phy_props_set()
971 if (instance->bc12_en) { in u2_phy_props_set()
977 if (tphy->pdata->version < MTK_PHY_V3 && instance->eye_src) { in u2_phy_props_set()
980 tmp |= PA5_RG_U2_HSTX_SRCTRL_VAL(instance->eye_src); in u2_phy_props_set()
984 if (instance->eye_vrt) { in u2_phy_props_set()
987 tmp |= PA1_RG_VRT_SEL_VAL(instance->eye_vrt); in u2_phy_props_set()
991 if (instance->eye_term) { in u2_phy_props_set()
994 tmp |= PA1_RG_TERM_SEL_VAL(instance->eye_term); in u2_phy_props_set()
998 if (instance->intr) { in u2_phy_props_set()
1001 tmp |= PA1_RG_INTR_CAL_VAL(instance->intr); in u2_phy_props_set()
1005 if (instance->discth) { in u2_phy_props_set()
1008 tmp |= PA6_RG_U2_DISCTH_VAL(instance->discth); in u2_phy_props_set()
1014 static int phy_type_syscon_get(struct mtk_phy_instance *instance, in phy_type_syscon_get() argument
1029 instance->type_sw_reg = args.args[0]; in phy_type_syscon_get()
1030 instance->type_sw_index = args.args[1] & 0x3; /* <=3 */ in phy_type_syscon_get()
1031 instance->type_sw = syscon_node_to_regmap(args.np); in phy_type_syscon_get()
1033 dev_info(&instance->phy->dev, "type_sw - reg %#x, index %d\n", in phy_type_syscon_get()
1034 instance->type_sw_reg, instance->type_sw_index); in phy_type_syscon_get()
1036 return PTR_ERR_OR_ZERO(instance->type_sw); in phy_type_syscon_get()
1039 static int phy_type_set(struct mtk_phy_instance *instance) in phy_type_set() argument
1044 if (!instance->type_sw) in phy_type_set()
1047 switch (instance->type) { in phy_type_set()
1065 offset = instance->type_sw_index * BITS_PER_BYTE; in phy_type_set()
1066 regmap_update_bits(instance->type_sw, instance->type_sw_reg, in phy_type_set()
1072 static int phy_efuse_get(struct mtk_tphy *tphy, struct mtk_phy_instance *instance) in phy_efuse_get() argument
1074 struct device *dev = &instance->phy->dev; in phy_efuse_get()
1079 instance->efuse_sw_en = 0; in phy_efuse_get()
1084 instance->efuse_sw_en = device_property_read_bool(dev, "nvmem-cells"); in phy_efuse_get()
1085 if (!instance->efuse_sw_en) in phy_efuse_get()
1088 switch (instance->type) { in phy_efuse_get()
1090 ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr); in phy_efuse_get()
1097 if (!instance->efuse_intr) { in phy_efuse_get()
1099 instance->efuse_sw_en = 0; in phy_efuse_get()
1103 dev_dbg(dev, "u2 efuse - intr %x\n", instance->efuse_intr); in phy_efuse_get()
1108 ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr); in phy_efuse_get()
1114 ret = nvmem_cell_read_variable_le_u32(dev, "rx_imp", &instance->efuse_rx_imp); in phy_efuse_get()
1120 ret = nvmem_cell_read_variable_le_u32(dev, "tx_imp", &instance->efuse_tx_imp); in phy_efuse_get()
1127 if (!instance->efuse_intr && in phy_efuse_get()
1128 !instance->efuse_rx_imp && in phy_efuse_get()
1129 !instance->efuse_tx_imp) { in phy_efuse_get()
1131 instance->efuse_sw_en = 0; in phy_efuse_get()
1136 instance->efuse_intr, instance->efuse_rx_imp,instance->efuse_tx_imp); in phy_efuse_get()
1139 dev_err(dev, "no sw efuse for type %d\n", instance->type); in phy_efuse_get()
1146 static void phy_efuse_set(struct mtk_phy_instance *instance) in phy_efuse_set() argument
1148 struct device *dev = &instance->phy->dev; in phy_efuse_set()
1149 struct u2phy_banks *u2_banks = &instance->u2_banks; in phy_efuse_set()
1150 struct u3phy_banks *u3_banks = &instance->u3_banks; in phy_efuse_set()
1153 if (!instance->efuse_sw_en) in phy_efuse_set()
1156 switch (instance->type) { in phy_efuse_set()
1164 tmp |= PA1_RG_INTR_CAL_VAL(instance->efuse_intr); in phy_efuse_set()
1175 tmp |= P3D_RG_TX_IMPEL_VAL(instance->efuse_tx_imp); in phy_efuse_set()
1181 tmp |= P3D_RG_RX_IMPEL_VAL(instance->efuse_rx_imp); in phy_efuse_set()
1187 tmp |= P3A_RG_IEXT_INTR_VAL(instance->efuse_intr); in phy_efuse_set()
1191 dev_warn(dev, "no sw efuse for type %d\n", instance->type); in phy_efuse_set()
1198 struct mtk_phy_instance *instance = phy_get_drvdata(phy); in mtk_phy_init() local
1202 ret = clk_bulk_prepare_enable(TPHY_CLKS_CNT, instance->clks); in mtk_phy_init()
1206 phy_efuse_set(instance); in mtk_phy_init()
1208 switch (instance->type) { in mtk_phy_init()
1210 u2_phy_instance_init(tphy, instance); in mtk_phy_init()
1211 u2_phy_props_set(tphy, instance); in mtk_phy_init()
1214 u3_phy_instance_init(tphy, instance); in mtk_phy_init()
1217 pcie_phy_instance_init(tphy, instance); in mtk_phy_init()
1220 sata_phy_instance_init(tphy, instance); in mtk_phy_init()
1227 clk_bulk_disable_unprepare(TPHY_CLKS_CNT, instance->clks); in mtk_phy_init()
1236 struct mtk_phy_instance *instance = phy_get_drvdata(phy); in mtk_phy_power_on() local
1239 if (instance->type == PHY_TYPE_USB2) { in mtk_phy_power_on()
1240 u2_phy_instance_power_on(tphy, instance); in mtk_phy_power_on()
1241 hs_slew_rate_calibrate(tphy, instance); in mtk_phy_power_on()
1242 } else if (instance->type == PHY_TYPE_PCIE) { in mtk_phy_power_on()
1243 pcie_phy_instance_power_on(tphy, instance); in mtk_phy_power_on()
1251 struct mtk_phy_instance *instance = phy_get_drvdata(phy); in mtk_phy_power_off() local
1254 if (instance->type == PHY_TYPE_USB2) in mtk_phy_power_off()
1255 u2_phy_instance_power_off(tphy, instance); in mtk_phy_power_off()
1256 else if (instance->type == PHY_TYPE_PCIE) in mtk_phy_power_off()
1257 pcie_phy_instance_power_off(tphy, instance); in mtk_phy_power_off()
1264 struct mtk_phy_instance *instance = phy_get_drvdata(phy); in mtk_phy_exit() local
1267 if (instance->type == PHY_TYPE_USB2) in mtk_phy_exit()
1268 u2_phy_instance_exit(tphy, instance); in mtk_phy_exit()
1270 clk_bulk_disable_unprepare(TPHY_CLKS_CNT, instance->clks); in mtk_phy_exit()
1276 struct mtk_phy_instance *instance = phy_get_drvdata(phy); in mtk_phy_set_mode() local
1279 if (instance->type == PHY_TYPE_USB2) in mtk_phy_set_mode()
1280 u2_phy_instance_set_mode(tphy, instance, mode); in mtk_phy_set_mode()
1289 struct mtk_phy_instance *instance = NULL; in mtk_phy_xlate() local
1301 instance = tphy->phys[index]; in mtk_phy_xlate()
1305 if (!instance) { in mtk_phy_xlate()
1310 instance->type = args->args[0]; in mtk_phy_xlate()
1311 if (!(instance->type == PHY_TYPE_USB2 || in mtk_phy_xlate()
1312 instance->type == PHY_TYPE_USB3 || in mtk_phy_xlate()
1313 instance->type == PHY_TYPE_PCIE || in mtk_phy_xlate()
1314 instance->type == PHY_TYPE_SATA || in mtk_phy_xlate()
1315 instance->type == PHY_TYPE_SGMII)) { in mtk_phy_xlate()
1316 dev_err(dev, "unsupported device type: %d\n", instance->type); in mtk_phy_xlate()
1322 phy_v1_banks_init(tphy, instance); in mtk_phy_xlate()
1326 phy_v2_banks_init(tphy, instance); in mtk_phy_xlate()
1333 ret = phy_efuse_get(tphy, instance); in mtk_phy_xlate()
1337 phy_parse_property(tphy, instance); in mtk_phy_xlate()
1338 phy_type_set(instance); in mtk_phy_xlate()
1340 return instance->phy; in mtk_phy_xlate()
1442 struct mtk_phy_instance *instance; in mtk_tphy_probe() local
1447 instance = devm_kzalloc(dev, sizeof(*instance), GFP_KERNEL); in mtk_tphy_probe()
1448 if (!instance) { in mtk_tphy_probe()
1453 tphy->phys[port] = instance; in mtk_tphy_probe()
1470 instance->port_base = devm_ioremap_resource(subdev, &res); in mtk_tphy_probe()
1471 if (IS_ERR(instance->port_base)) { in mtk_tphy_probe()
1472 retval = PTR_ERR(instance->port_base); in mtk_tphy_probe()
1476 instance->phy = phy; in mtk_tphy_probe()
1477 instance->index = port; in mtk_tphy_probe()
1478 phy_set_drvdata(phy, instance); in mtk_tphy_probe()
1481 clks = instance->clks; in mtk_tphy_probe()
1488 retval = phy_type_syscon_get(instance, child_np); in mtk_tphy_probe()