Lines Matching refs:pcs
2878 void __iomem *pcs; member
4080 qphy->pcs + QSERDES_DP_PHY_PD_CTL); in qcom_qmp_v3_phy_dp_aux_init()
4087 writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->pcs + QSERDES_DP_PHY_PD_CTL); in qcom_qmp_v3_phy_dp_aux_init()
4093 qphy->pcs + QSERDES_DP_PHY_PD_CTL); in qcom_qmp_v3_phy_dp_aux_init()
4101 writel(0x00, qphy->pcs + QSERDES_DP_PHY_AUX_CFG0); in qcom_qmp_v3_phy_dp_aux_init()
4102 writel(0x13, qphy->pcs + QSERDES_DP_PHY_AUX_CFG1); in qcom_qmp_v3_phy_dp_aux_init()
4103 writel(0x24, qphy->pcs + QSERDES_DP_PHY_AUX_CFG2); in qcom_qmp_v3_phy_dp_aux_init()
4104 writel(0x00, qphy->pcs + QSERDES_DP_PHY_AUX_CFG3); in qcom_qmp_v3_phy_dp_aux_init()
4105 writel(0x0a, qphy->pcs + QSERDES_DP_PHY_AUX_CFG4); in qcom_qmp_v3_phy_dp_aux_init()
4106 writel(0x26, qphy->pcs + QSERDES_DP_PHY_AUX_CFG5); in qcom_qmp_v3_phy_dp_aux_init()
4107 writel(0x0a, qphy->pcs + QSERDES_DP_PHY_AUX_CFG6); in qcom_qmp_v3_phy_dp_aux_init()
4108 writel(0x03, qphy->pcs + QSERDES_DP_PHY_AUX_CFG7); in qcom_qmp_v3_phy_dp_aux_init()
4109 writel(0xbb, qphy->pcs + QSERDES_DP_PHY_AUX_CFG8); in qcom_qmp_v3_phy_dp_aux_init()
4110 writel(0x03, qphy->pcs + QSERDES_DP_PHY_AUX_CFG9); in qcom_qmp_v3_phy_dp_aux_init()
4116 qphy->pcs + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK); in qcom_qmp_v3_phy_dp_aux_init()
4231 writel(val, qphy->pcs + QSERDES_DP_PHY_PD_CTL); in qcom_qmp_phy_configure_dp_mode()
4233 writel(0x5c, qphy->pcs + QSERDES_DP_PHY_MODE); in qcom_qmp_phy_configure_dp_mode()
4247 writel(0x05, qphy->pcs + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL); in qcom_qmp_v3_phy_configure_dp_phy()
4248 writel(0x05, qphy->pcs + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL); in qcom_qmp_v3_phy_configure_dp_phy()
4271 writel(phy_vco_div, qphy->pcs + QSERDES_V3_DP_PHY_VCO_DIV); in qcom_qmp_v3_phy_configure_dp_phy()
4276 writel(0x04, qphy->pcs + QSERDES_DP_PHY_AUX_CFG2); in qcom_qmp_v3_phy_configure_dp_phy()
4277 writel(0x01, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v3_phy_configure_dp_phy()
4278 writel(0x05, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v3_phy_configure_dp_phy()
4279 writel(0x01, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v3_phy_configure_dp_phy()
4280 writel(0x09, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v3_phy_configure_dp_phy()
4291 writel(0x19, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v3_phy_configure_dp_phy()
4293 if (readl_poll_timeout(qphy->pcs + QSERDES_V3_DP_PHY_STATUS, in qcom_qmp_v3_phy_configure_dp_phy()
4300 writel(0x18, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v3_phy_configure_dp_phy()
4302 writel(0x19, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v3_phy_configure_dp_phy()
4304 return readl_poll_timeout(qphy->pcs + QSERDES_V3_DP_PHY_STATUS, in qcom_qmp_v3_phy_configure_dp_phy()
4324 writel(val, qphy->pcs + QSERDES_DP_PHY_AUX_CFG1); in qcom_qmp_v3_dp_phy_calibrate()
4333 qphy->pcs + QSERDES_DP_PHY_PD_CTL); in qcom_qmp_v4_phy_dp_aux_init()
4338 writel(0x00, qphy->pcs + QSERDES_DP_PHY_AUX_CFG0); in qcom_qmp_v4_phy_dp_aux_init()
4339 writel(0x13, qphy->pcs + QSERDES_DP_PHY_AUX_CFG1); in qcom_qmp_v4_phy_dp_aux_init()
4340 writel(0xa4, qphy->pcs + QSERDES_DP_PHY_AUX_CFG2); in qcom_qmp_v4_phy_dp_aux_init()
4341 writel(0x00, qphy->pcs + QSERDES_DP_PHY_AUX_CFG3); in qcom_qmp_v4_phy_dp_aux_init()
4342 writel(0x0a, qphy->pcs + QSERDES_DP_PHY_AUX_CFG4); in qcom_qmp_v4_phy_dp_aux_init()
4343 writel(0x26, qphy->pcs + QSERDES_DP_PHY_AUX_CFG5); in qcom_qmp_v4_phy_dp_aux_init()
4344 writel(0x0a, qphy->pcs + QSERDES_DP_PHY_AUX_CFG6); in qcom_qmp_v4_phy_dp_aux_init()
4345 writel(0x03, qphy->pcs + QSERDES_DP_PHY_AUX_CFG7); in qcom_qmp_v4_phy_dp_aux_init()
4346 writel(0xb7, qphy->pcs + QSERDES_DP_PHY_AUX_CFG8); in qcom_qmp_v4_phy_dp_aux_init()
4347 writel(0x03, qphy->pcs + QSERDES_DP_PHY_AUX_CFG9); in qcom_qmp_v4_phy_dp_aux_init()
4353 qphy->pcs + QSERDES_V4_DP_PHY_AUX_INTERRUPT_MASK); in qcom_qmp_v4_phy_dp_aux_init()
4379 writel(0x0f, qphy->pcs + QSERDES_V4_DP_PHY_CFG_1); in qcom_qmp_v4_phy_configure_dp_phy()
4383 writel(0x13, qphy->pcs + QSERDES_DP_PHY_AUX_CFG1); in qcom_qmp_v4_phy_configure_dp_phy()
4384 writel(0xa4, qphy->pcs + QSERDES_DP_PHY_AUX_CFG2); in qcom_qmp_v4_phy_configure_dp_phy()
4386 writel(0x05, qphy->pcs + QSERDES_V4_DP_PHY_TX0_TX1_LANE_CTL); in qcom_qmp_v4_phy_configure_dp_phy()
4387 writel(0x05, qphy->pcs + QSERDES_V4_DP_PHY_TX2_TX3_LANE_CTL); in qcom_qmp_v4_phy_configure_dp_phy()
4410 writel(phy_vco_div, qphy->pcs + QSERDES_V4_DP_PHY_VCO_DIV); in qcom_qmp_v4_phy_configure_dp_phy()
4415 writel(0x01, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v4_phy_configure_dp_phy()
4416 writel(0x05, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v4_phy_configure_dp_phy()
4417 writel(0x01, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v4_phy_configure_dp_phy()
4418 writel(0x09, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v4_phy_configure_dp_phy()
4443 writel(0x19, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v4_phy_configure_dp_phy()
4445 if (readl_poll_timeout(qphy->pcs + QSERDES_V4_DP_PHY_STATUS, in qcom_qmp_v4_phy_configure_dp_phy()
4452 if (readl_poll_timeout(qphy->pcs + QSERDES_V4_DP_PHY_STATUS, in qcom_qmp_v4_phy_configure_dp_phy()
4486 writel(0x18, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v4_phy_configure_dp_phy()
4488 writel(0x19, qphy->pcs + QSERDES_DP_PHY_CFG); in qcom_qmp_v4_phy_configure_dp_phy()
4490 if (readl_poll_timeout(qphy->pcs + QSERDES_V4_DP_PHY_STATUS, in qcom_qmp_v4_phy_configure_dp_phy()
4522 writel(val, qphy->pcs + QSERDES_DP_PHY_AUX_CFG1); in qcom_qmp_v4_dp_phy_calibrate()
4625 qphy_setbits(usb_phy->pcs, in qcom_qmp_phy_com_init()
4629 qphy_setbits(usb_phy->pcs, QPHY_POWER_DOWN_CONTROL, in qcom_qmp_phy_com_init()
4735 void __iomem *pcs = qphy->pcs; in qcom_qmp_phy_power_on() local
4798 qcom_qmp_phy_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num); in qcom_qmp_phy_power_on()
4800 qcom_qmp_phy_configure(pcs, cfg->regs, cfg->pcs_tbl_sec, in qcom_qmp_phy_power_on()
4819 qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl); in qcom_qmp_phy_power_on()
4827 qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qcom_qmp_phy_power_on()
4829 qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl); in qcom_qmp_phy_power_on()
4832 status = pcs + cfg->regs[QPHY_PCS_READY_STATUS]; in qcom_qmp_phy_power_on()
4836 status = pcs + cfg->regs[QPHY_PCS_STATUS]; in qcom_qmp_phy_power_on()
4868 writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->pcs + QSERDES_DP_PHY_PD_CTL); in qcom_qmp_phy_power_off()
4872 qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qcom_qmp_phy_power_off()
4875 qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl); in qcom_qmp_phy_power_off()
4879 qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL], in qcom_qmp_phy_power_off()
4882 qphy_clrbits(qphy->pcs, QPHY_POWER_DOWN_CONTROL, in qcom_qmp_phy_power_off()
4941 void __iomem *pcs = qphy->pcs; in qcom_qmp_phy_enable_autonomous_mode() local
4952 qphy_setbits(pcs, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR); in qcom_qmp_phy_enable_autonomous_mode()
4954 qphy_clrbits(pcs, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR); in qcom_qmp_phy_enable_autonomous_mode()
4956 qphy_clrbits(pcs, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], in qcom_qmp_phy_enable_autonomous_mode()
4960 qphy_setbits(pcs, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], intr_mask); in qcom_qmp_phy_enable_autonomous_mode()
4970 void __iomem *pcs = qphy->pcs; in qcom_qmp_phy_disable_autonomous_mode() local
4977 qphy_clrbits(pcs, cfg->regs[QPHY_PCS_AUTONOMOUS_MODE_CTRL], in qcom_qmp_phy_disable_autonomous_mode()
4980 qphy_setbits(pcs, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR); in qcom_qmp_phy_disable_autonomous_mode()
4982 qphy_clrbits(pcs, cfg->regs[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR], IRQ_CLEAR); in qcom_qmp_phy_disable_autonomous_mode()
5447 qphy->pcs = qmp_usb_iomap(dev, np, 2, exclusive); in qcom_qmp_phy_create()
5448 if (IS_ERR(qphy->pcs)) in qcom_qmp_phy_create()
5449 return PTR_ERR(qphy->pcs); in qcom_qmp_phy_create()