Lines Matching refs:phy_no
557 static void hisi_sas_phy_write32(struct hisi_hba *hisi_hba, int phy_no, in hisi_sas_phy_write32() argument
560 void __iomem *regs = hisi_hba->regs + (0x400 * phy_no) + off; in hisi_sas_phy_write32()
566 int phy_no, u32 off) in hisi_sas_phy_read32() argument
568 void __iomem *regs = hisi_hba->regs + (0x400 * phy_no) + off; in hisi_sas_phy_read32()
741 static void config_phy_opt_mode_v3_hw(struct hisi_hba *hisi_hba, int phy_no) in config_phy_opt_mode_v3_hw() argument
743 u32 cfg = hisi_sas_phy_read32(hisi_hba, phy_no, PHY_CFG); in config_phy_opt_mode_v3_hw()
747 hisi_sas_phy_write32(hisi_hba, phy_no, PHY_CFG, cfg); in config_phy_opt_mode_v3_hw()
750 static void config_id_frame_v3_hw(struct hisi_hba *hisi_hba, int phy_no) in config_id_frame_v3_hw() argument
763 identify_frame.phy_id = phy_no; in config_id_frame_v3_hw()
766 hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD0, in config_id_frame_v3_hw()
768 hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD1, in config_id_frame_v3_hw()
770 hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD2, in config_id_frame_v3_hw()
772 hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD3, in config_id_frame_v3_hw()
774 hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD4, in config_id_frame_v3_hw()
776 hisi_sas_phy_write32(hisi_hba, phy_no, TX_ID_DWORD5, in config_id_frame_v3_hw()
961 static void enable_phy_v3_hw(struct hisi_hba *hisi_hba, int phy_no) in enable_phy_v3_hw() argument
963 u32 cfg = hisi_sas_phy_read32(hisi_hba, phy_no, PHY_CFG); in enable_phy_v3_hw()
967 hisi_sas_phy_write32(hisi_hba, phy_no, PHY_CFG, cfg); in enable_phy_v3_hw()
970 static void disable_phy_v3_hw(struct hisi_hba *hisi_hba, int phy_no) in disable_phy_v3_hw() argument
972 u32 cfg = hisi_sas_phy_read32(hisi_hba, phy_no, PHY_CFG); in disable_phy_v3_hw()
973 u32 irq_msk = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT2_MSK); in disable_phy_v3_hw()
979 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2_MSK, msk | irq_msk); in disable_phy_v3_hw()
982 hisi_sas_phy_write32(hisi_hba, phy_no, PHY_CFG, cfg); in disable_phy_v3_hw()
987 if (state & BIT(phy_no)) { in disable_phy_v3_hw()
989 hisi_sas_phy_write32(hisi_hba, phy_no, PHY_CFG, cfg); in disable_phy_v3_hw()
994 hisi_sas_phy_read32(hisi_hba, phy_no, ERR_CNT_INVLD_DW); in disable_phy_v3_hw()
995 hisi_sas_phy_read32(hisi_hba, phy_no, ERR_CNT_DISP_ERR); in disable_phy_v3_hw()
996 hisi_sas_phy_read32(hisi_hba, phy_no, ERR_CNT_CODE_ERR); in disable_phy_v3_hw()
998 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2, msk); in disable_phy_v3_hw()
999 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2_MSK, irq_msk); in disable_phy_v3_hw()
1002 static void start_phy_v3_hw(struct hisi_hba *hisi_hba, int phy_no) in start_phy_v3_hw() argument
1004 config_id_frame_v3_hw(hisi_hba, phy_no); in start_phy_v3_hw()
1005 config_phy_opt_mode_v3_hw(hisi_hba, phy_no); in start_phy_v3_hw()
1006 enable_phy_v3_hw(hisi_hba, phy_no); in start_phy_v3_hw()
1009 static void phy_hard_reset_v3_hw(struct hisi_hba *hisi_hba, int phy_no) in phy_hard_reset_v3_hw() argument
1011 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; in phy_hard_reset_v3_hw()
1014 hisi_sas_phy_enable(hisi_hba, phy_no, 0); in phy_hard_reset_v3_hw()
1016 txid_auto = hisi_sas_phy_read32(hisi_hba, phy_no, TXID_AUTO); in phy_hard_reset_v3_hw()
1017 hisi_sas_phy_write32(hisi_hba, phy_no, TXID_AUTO, in phy_hard_reset_v3_hw()
1021 hisi_sas_phy_enable(hisi_hba, phy_no, 1); in phy_hard_reset_v3_hw()
1044 static void sl_notify_ssp_v3_hw(struct hisi_hba *hisi_hba, int phy_no) in sl_notify_ssp_v3_hw() argument
1048 sl_control = hisi_sas_phy_read32(hisi_hba, phy_no, SL_CONTROL); in sl_notify_ssp_v3_hw()
1050 hisi_sas_phy_write32(hisi_hba, phy_no, SL_CONTROL, sl_control); in sl_notify_ssp_v3_hw()
1052 sl_control = hisi_sas_phy_read32(hisi_hba, phy_no, SL_CONTROL); in sl_notify_ssp_v3_hw()
1054 hisi_sas_phy_write32(hisi_hba, phy_no, SL_CONTROL, sl_control); in sl_notify_ssp_v3_hw()
1482 static irqreturn_t phy_up_v3_hw(int phy_no, struct hisi_hba *hisi_hba) in phy_up_v3_hw() argument
1487 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; in phy_up_v3_hw()
1493 hisi_sas_phy_write32(hisi_hba, phy_no, PHYCTRL_PHY_ENA_MSK, 1); in phy_up_v3_hw()
1496 port_id = (port_id >> (4 * phy_no)) & 0xf; in phy_up_v3_hw()
1498 link_rate = (link_rate >> (phy_no * 4)) & 0xf; in phy_up_v3_hw()
1501 dev_err(dev, "phyup: phy%d invalid portid\n", phy_no); in phy_up_v3_hw()
1510 if (context & (1 << phy_no)) { in phy_up_v3_hw()
1516 dev_info(dev, "phyup: phy%d link_rate=%d(sata)\n", phy_no, link_rate); in phy_up_v3_hw()
1517 initial_fis = &hisi_hba->initial_fis[phy_no]; in phy_up_v3_hw()
1523 phy_no, fis->status); in phy_up_v3_hw()
1532 attached_sas_addr[7] = phy_no; in phy_up_v3_hw()
1547 dev_info(dev, "phyup: phy%d link_rate=%d\n", phy_no, link_rate); in phy_up_v3_hw()
1549 u32 idaf = hisi_sas_phy_read32(hisi_hba, phy_no, in phy_up_v3_hw()
1579 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0, in phy_up_v3_hw()
1581 hisi_sas_phy_write32(hisi_hba, phy_no, PHYCTRL_PHY_ENA_MSK, 0); in phy_up_v3_hw()
1586 static irqreturn_t phy_down_v3_hw(int phy_no, struct hisi_hba *hisi_hba) in phy_down_v3_hw() argument
1588 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; in phy_down_v3_hw()
1595 hisi_sas_phy_write32(hisi_hba, phy_no, PHYCTRL_NOT_RDY_MSK, 1); in phy_down_v3_hw()
1598 dev_info(dev, "phydown: phy%d phy_state=0x%x\n", phy_no, phy_state); in phy_down_v3_hw()
1599 hisi_sas_phy_down(hisi_hba, phy_no, (phy_state & 1 << phy_no) ? 1 : 0, in phy_down_v3_hw()
1602 sl_ctrl = hisi_sas_phy_read32(hisi_hba, phy_no, SL_CONTROL); in phy_down_v3_hw()
1603 hisi_sas_phy_write32(hisi_hba, phy_no, SL_CONTROL, in phy_down_v3_hw()
1606 txid_auto = hisi_sas_phy_read32(hisi_hba, phy_no, TXID_AUTO); in phy_down_v3_hw()
1607 hisi_sas_phy_write32(hisi_hba, phy_no, TXID_AUTO, in phy_down_v3_hw()
1610 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0, CHL_INT0_NOT_RDY_MSK); in phy_down_v3_hw()
1611 hisi_sas_phy_write32(hisi_hba, phy_no, PHYCTRL_NOT_RDY_MSK, 0); in phy_down_v3_hw()
1616 static irqreturn_t phy_bcast_v3_hw(int phy_no, struct hisi_hba *hisi_hba) in phy_bcast_v3_hw() argument
1618 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; in phy_bcast_v3_hw()
1622 hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 1); in phy_bcast_v3_hw()
1623 bcast_status = hisi_sas_phy_read32(hisi_hba, phy_no, RX_PRIMS_STATUS); in phy_bcast_v3_hw()
1628 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0, in phy_bcast_v3_hw()
1630 hisi_sas_phy_write32(hisi_hba, phy_no, SL_RX_BCAST_CHK_MSK, 0); in phy_bcast_v3_hw()
1639 int phy_no = 0; in int_phy_up_down_bcast_v3_hw() local
1646 u32 irq_value = hisi_sas_phy_read32(hisi_hba, phy_no, in int_phy_up_down_bcast_v3_hw()
1649 int rdy = phy_state & (1 << phy_no); in int_phy_up_down_bcast_v3_hw()
1654 if (phy_up_v3_hw(phy_no, hisi_hba) in int_phy_up_down_bcast_v3_hw()
1659 if (phy_bcast_v3_hw(phy_no, hisi_hba) in int_phy_up_down_bcast_v3_hw()
1665 if (phy_down_v3_hw(phy_no, hisi_hba) in int_phy_up_down_bcast_v3_hw()
1671 phy_no++; in int_phy_up_down_bcast_v3_hw()
1720 static void handle_chl_int1_v3_hw(struct hisi_hba *hisi_hba, int phy_no) in handle_chl_int1_v3_hw() argument
1722 u32 irq_value = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT1); in handle_chl_int1_v3_hw()
1723 u32 irq_msk = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT1_MSK); in handle_chl_int1_v3_hw()
1730 phy_no); in handle_chl_int1_v3_hw()
1741 error->msg, phy_no, irq_value); in handle_chl_int1_v3_hw()
1745 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT1, irq_value); in handle_chl_int1_v3_hw()
1748 static void phy_get_events_v3_hw(struct hisi_hba *hisi_hba, int phy_no) in phy_get_events_v3_hw() argument
1750 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; in phy_get_events_v3_hw()
1759 reg_value = hisi_sas_phy_read32(hisi_hba, phy_no, ERR_CNT_DWS_LOST); in phy_get_events_v3_hw()
1763 reg_value = hisi_sas_phy_read32(hisi_hba, phy_no, ERR_CNT_RESET_PROB); in phy_get_events_v3_hw()
1767 reg_value = hisi_sas_phy_read32(hisi_hba, phy_no, ERR_CNT_INVLD_DW); in phy_get_events_v3_hw()
1771 reg_value = hisi_sas_phy_read32(hisi_hba, phy_no, ERR_CNT_DISP_ERR); in phy_get_events_v3_hw()
1775 reg_value = hisi_sas_phy_read32(hisi_hba, phy_no, ERR_CNT_CODE_ERR); in phy_get_events_v3_hw()
1781 static void handle_chl_int2_v3_hw(struct hisi_hba *hisi_hba, int phy_no) in handle_chl_int2_v3_hw() argument
1783 u32 irq_msk = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT2_MSK); in handle_chl_int2_v3_hw()
1784 u32 irq_value = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT2); in handle_chl_int2_v3_hw()
1785 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; in handle_chl_int2_v3_hw()
1795 phy_no); in handle_chl_int2_v3_hw()
1800 dev_warn(dev, "phy%d identify timeout\n", phy_no); in handle_chl_int2_v3_hw()
1805 u32 reg_value = hisi_sas_phy_read32(hisi_hba, phy_no, in handle_chl_int2_v3_hw()
1809 phy_no, reg_value); in handle_chl_int2_v3_hw()
1818 phy_get_events_v3_hw(hisi_hba, phy_no); in handle_chl_int2_v3_hw()
1821 dev_info(dev, "phy%d invalid dword cnt: %u\n", phy_no, in handle_chl_int2_v3_hw()
1825 dev_info(dev, "phy%d code violation cnt: %u\n", phy_no, in handle_chl_int2_v3_hw()
1829 dev_info(dev, "phy%d disparity error cnt: %u\n", phy_no, in handle_chl_int2_v3_hw()
1840 !((reg_value >> 8) & BIT(phy_no)), in handle_chl_int2_v3_hw()
1846 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2, irq_value); in handle_chl_int2_v3_hw()
1849 static void handle_chl_int0_v3_hw(struct hisi_hba *hisi_hba, int phy_no) in handle_chl_int0_v3_hw() argument
1851 u32 irq_value0 = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT0); in handle_chl_int0_v3_hw()
1854 hisi_sas_phy_oob_ready(hisi_hba, phy_no); in handle_chl_int0_v3_hw()
1856 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT0, in handle_chl_int0_v3_hw()
1866 int phy_no = 0; in int_chnl_int_v3_hw() local
1872 if (irq_msk & (CHNL_INT_STS_INT0_MSK << (phy_no * CHNL_WIDTH))) in int_chnl_int_v3_hw()
1873 handle_chl_int0_v3_hw(hisi_hba, phy_no); in int_chnl_int_v3_hw()
1875 if (irq_msk & (CHNL_INT_STS_INT1_MSK << (phy_no * CHNL_WIDTH))) in int_chnl_int_v3_hw()
1876 handle_chl_int1_v3_hw(hisi_hba, phy_no); in int_chnl_int_v3_hw()
1878 if (irq_msk & (CHNL_INT_STS_INT2_MSK << (phy_no * CHNL_WIDTH))) in int_chnl_int_v3_hw()
1879 handle_chl_int2_v3_hw(hisi_hba, phy_no); in int_chnl_int_v3_hw()
1881 irq_msk &= ~(CHNL_INT_STS_PHY_MSK << (phy_no * CHNL_WIDTH)); in int_chnl_int_v3_hw()
1882 phy_no++; in int_chnl_int_v3_hw()
2528 static void phy_set_linkrate_v3_hw(struct hisi_hba *hisi_hba, int phy_no, in phy_set_linkrate_v3_hw() argument
2532 u32 prog_phy_link_rate = hisi_sas_phy_read32(hisi_hba, phy_no, in phy_set_linkrate_v3_hw()
2537 hisi_sas_phy_write32(hisi_hba, phy_no, PROG_PHY_LINK_RATE, in phy_set_linkrate_v3_hw()
3045 int phy_no = hisi_hba->debugfs_bist_phy_no; in hisi_sas_bist_test_prep_v3_hw() local
3049 hisi_sas_phy_enable(hisi_hba, phy_no, 0); in hisi_sas_bist_test_prep_v3_hw()
3053 hisi_sas_phy_write32(hisi_hba, phy_no, TXDEEMPH_G1 + (i * 0x4), in hisi_sas_bist_test_prep_v3_hw()
3054 hisi_hba->debugfs_bist_ffe[phy_no][i]); in hisi_sas_bist_test_prep_v3_hw()
3057 reg_val = hisi_sas_phy_read32(hisi_hba, phy_no, SERDES_CFG); in hisi_sas_bist_test_prep_v3_hw()
3059 hisi_sas_phy_write32(hisi_hba, phy_no, SERDES_CFG, reg_val); in hisi_sas_bist_test_prep_v3_hw()
3065 int phy_no = hisi_hba->debugfs_bist_phy_no; in hisi_sas_bist_test_restore_v3_hw() local
3068 reg_val = hisi_sas_phy_read32(hisi_hba, phy_no, SAS_PHY_BIST_CTRL); in hisi_sas_bist_test_restore_v3_hw()
3071 hisi_sas_phy_write32(hisi_hba, phy_no, SAS_PHY_BIST_CTRL, reg_val); in hisi_sas_bist_test_restore_v3_hw()
3074 reg_val = hisi_sas_phy_read32(hisi_hba, phy_no, SERDES_CFG); in hisi_sas_bist_test_restore_v3_hw()
3076 hisi_sas_phy_write32(hisi_hba, phy_no, SERDES_CFG, reg_val); in hisi_sas_bist_test_restore_v3_hw()
3079 reg_val = hisi_sas_phy_read32(hisi_hba, phy_no, PROG_PHY_LINK_RATE); in hisi_sas_bist_test_restore_v3_hw()
3083 hisi_sas_phy_write32(hisi_hba, phy_no, PROG_PHY_LINK_RATE, reg_val); in hisi_sas_bist_test_restore_v3_hw()
3086 hisi_sas_phy_enable(hisi_hba, phy_no, 1); in hisi_sas_bist_test_restore_v3_hw()
3095 u32 phy_no = hisi_hba->debugfs_bist_phy_no; in debugfs_set_bist_v3_hw() local
3096 u32 *ffe = hisi_hba->debugfs_bist_ffe[phy_no]; in debugfs_set_bist_v3_hw()
3103 phy_no, linkrate, code_mode, path_mode, in debugfs_set_bist_v3_hw()
3115 reg_val = hisi_sas_phy_read32(hisi_hba, phy_no, in debugfs_set_bist_v3_hw()
3119 hisi_sas_phy_write32(hisi_hba, phy_no, PROG_PHY_LINK_RATE, in debugfs_set_bist_v3_hw()
3123 reg_val = hisi_sas_phy_read32(hisi_hba, phy_no, in debugfs_set_bist_v3_hw()
3131 hisi_sas_phy_write32(hisi_hba, phy_no, SAS_PHY_BIST_CTRL, in debugfs_set_bist_v3_hw()
3137 hisi_sas_phy_write32(hisi_hba, phy_no, in debugfs_set_bist_v3_hw()
3141 hisi_sas_phy_write32(hisi_hba, phy_no, in debugfs_set_bist_v3_hw()
3144 hisi_sas_phy_write32(hisi_hba, phy_no, in debugfs_set_bist_v3_hw()
3147 hisi_sas_phy_write32(hisi_hba, phy_no, in debugfs_set_bist_v3_hw()
3154 hisi_sas_phy_write32(hisi_hba, phy_no, SAS_PHY_BIST_CTRL, in debugfs_set_bist_v3_hw()
3159 hisi_sas_phy_read32(hisi_hba, phy_no, SAS_BIST_ERR_CNT); in debugfs_set_bist_v3_hw()
3163 phy_no, SAS_BIST_ERR_CNT); in debugfs_set_bist_v3_hw()
3959 unsigned int phy_no; in debugfs_bist_phy_v3_hw_write() local
3965 val = kstrtouint_from_user(buf, count, 0, &phy_no); in debugfs_bist_phy_v3_hw_write()
3969 if (phy_no >= hisi_hba->n_phy) in debugfs_bist_phy_v3_hw_write()
3972 hisi_hba->debugfs_bist_phy_no = phy_no; in debugfs_bist_phy_v3_hw_write()
4336 int phy_no = phy->sas_phy.id; in debugfs_update_fifo_config_v3_hw() local
4345 reg_val = hisi_sas_phy_read32(hisi_hba, phy_no, DFX_FIFO_CTRL); in debugfs_update_fifo_config_v3_hw()
4357 hisi_sas_phy_write32(hisi_hba, phy_no, DFX_FIFO_CTRL, reg_val); in debugfs_update_fifo_config_v3_hw()
4359 hisi_sas_phy_write32(hisi_hba, phy_no, DFX_FIFO_DUMP_MSK, in debugfs_update_fifo_config_v3_hw()
4362 hisi_sas_phy_write32(hisi_hba, phy_no, DFX_FIFO_TRIGGER, in debugfs_update_fifo_config_v3_hw()
4365 hisi_sas_phy_write32(hisi_hba, phy_no, DFX_FIFO_TRIGGER_MSK, in debugfs_update_fifo_config_v3_hw()
4369 reg_val = hisi_sas_phy_read32(hisi_hba, phy_no, DFX_FIFO_CTRL); in debugfs_update_fifo_config_v3_hw()
4371 hisi_sas_phy_write32(hisi_hba, phy_no, DFX_FIFO_CTRL, reg_val); in debugfs_update_fifo_config_v3_hw()
4408 int phy_no = phy->sas_phy.id; in debugfs_read_fifo_data_v3_hw() local
4415 val = hisi_sas_phy_read32(hisi_hba, phy_no, DFX_FIFO_CTRL); in debugfs_read_fifo_data_v3_hw()
4417 hisi_sas_phy_write32(hisi_hba, phy_no, DFX_FIFO_CTRL, val); in debugfs_read_fifo_data_v3_hw()
4420 val = hisi_sas_phy_read32(hisi_hba, phy_no, in debugfs_read_fifo_data_v3_hw()
4426 val = hisi_sas_phy_read32(hisi_hba, phy_no, DFX_FIFO_CTRL); in debugfs_read_fifo_data_v3_hw()
4428 hisi_sas_phy_write32(hisi_hba, phy_no, DFX_FIFO_CTRL, val); in debugfs_read_fifo_data_v3_hw()
4446 int phy_no; in debugfs_fifo_init_v3_hw() local
4451 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { in debugfs_fifo_init_v3_hw()
4452 struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; in debugfs_fifo_init_v3_hw()
4458 val = hisi_sas_phy_read32(hisi_hba, phy_no, DFX_FIFO_CTRL); in debugfs_fifo_init_v3_hw()
4463 val = hisi_sas_phy_read32(hisi_hba, phy_no, DFX_FIFO_CTRL); in debugfs_fifo_init_v3_hw()
4468 val = hisi_sas_phy_read32(hisi_hba, phy_no, DFX_FIFO_CTRL); in debugfs_fifo_init_v3_hw()
4473 val = hisi_sas_phy_read32(hisi_hba, phy_no, DFX_FIFO_DUMP_MSK); in debugfs_fifo_init_v3_hw()
4476 val = hisi_sas_phy_read32(hisi_hba, phy_no, DFX_FIFO_TRIGGER); in debugfs_fifo_init_v3_hw()
4478 val = hisi_sas_phy_read32(hisi_hba, phy_no, DFX_FIFO_TRIGGER_MSK); in debugfs_fifo_init_v3_hw()
4481 snprintf(name, 256, "%d", phy_no); in debugfs_fifo_init_v3_hw()
4649 int phy_no; in debugfs_phy_down_cnt_init_v3_hw() local
4651 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { in debugfs_phy_down_cnt_init_v3_hw()
4652 snprintf(name, 16, "%d", phy_no); in debugfs_phy_down_cnt_init_v3_hw()
4654 &hisi_hba->phy[phy_no], in debugfs_phy_down_cnt_init_v3_hw()
4662 int phy_no; in debugfs_bist_init_v3_hw() local
4699 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { in debugfs_bist_init_v3_hw()
4705 snprintf(name, 256, "%d", phy_no); in debugfs_bist_init_v3_hw()
4713 &hisi_hba->debugfs_bist_ffe[phy_no][i], in debugfs_bist_init_v3_hw()