Lines Matching refs:par
80 static void vgaHWSeqReset(struct savagefb_par *par, int start) in vgaHWSeqReset() argument
83 VGAwSEQ(0x00, 0x01, par); /* Synchronous Reset */ in vgaHWSeqReset()
85 VGAwSEQ(0x00, 0x03, par); /* End Reset */ in vgaHWSeqReset()
88 static void vgaHWProtect(struct savagefb_par *par, int on) in vgaHWProtect() argument
96 tmp = VGArSEQ(0x01, par); in vgaHWProtect()
98 vgaHWSeqReset(par, 1); /* start synchronous reset */ in vgaHWProtect()
99 VGAwSEQ(0x01, tmp | 0x20, par);/* disable the display */ in vgaHWProtect()
101 VGAenablePalette(par); in vgaHWProtect()
107 tmp = VGArSEQ(0x01, par); in vgaHWProtect()
109 VGAwSEQ(0x01, tmp & ~0x20, par);/* reenable display */ in vgaHWProtect()
110 vgaHWSeqReset(par, 0); /* clear synchronous reset */ in vgaHWProtect()
112 VGAdisablePalette(par); in vgaHWProtect()
116 static void vgaHWRestore(struct savagefb_par *par, struct savage_reg *reg) in vgaHWRestore() argument
120 VGAwMISC(reg->MiscOutReg, par); in vgaHWRestore()
123 VGAwSEQ(i, reg->Sequencer[i], par); in vgaHWRestore()
127 VGAwCR(17, reg->CRTC[17] & ~0x80, par); in vgaHWRestore()
130 VGAwCR(i, reg->CRTC[i], par); in vgaHWRestore()
133 VGAwGR(i, reg->Graphics[i], par); in vgaHWRestore()
135 VGAenablePalette(par); in vgaHWRestore()
138 VGAwATTR(i, reg->Attribute[i], par); in vgaHWRestore()
140 VGAdisablePalette(par); in vgaHWRestore()
144 struct savagefb_par *par, in vgaHWInit() argument
257 savage3D_waitfifo(struct savagefb_par *par, int space) in savage3D_waitfifo() argument
261 while ((savage_in32(0x48C00, par) & 0x0000ffff) > slots); in savage3D_waitfifo()
265 savage4_waitfifo(struct savagefb_par *par, int space) in savage4_waitfifo() argument
269 while ((savage_in32(0x48C60, par) & 0x001fffff) > slots); in savage4_waitfifo()
273 savage2000_waitfifo(struct savagefb_par *par, int space) in savage2000_waitfifo() argument
277 while ((savage_in32(0x48C60, par) & 0x0000ffff) > slots); in savage2000_waitfifo()
282 savage3D_waitidle(struct savagefb_par *par) in savage3D_waitidle() argument
284 while ((savage_in32(0x48C00, par) & 0x0008ffff) != 0x80000); in savage3D_waitidle()
288 savage4_waitidle(struct savagefb_par *par) in savage4_waitidle() argument
290 while ((savage_in32(0x48C60, par) & 0x00a00000) != 0x00a00000); in savage4_waitidle()
294 savage2000_waitidle(struct savagefb_par *par) in savage2000_waitidle() argument
296 while ((savage_in32(0x48C60, par) & 0x009fffff)); in savage2000_waitidle()
301 SavageSetup2DEngine(struct savagefb_par *par) in SavageSetup2DEngine() argument
306 BCI_BD_SET_BPP(GlobalBitmapDescriptor, par->depth); in SavageSetup2DEngine()
307 BCI_BD_SET_STRIDE(GlobalBitmapDescriptor, par->vwidth); in SavageSetup2DEngine()
309 switch(par->chip) { in SavageSetup2DEngine()
313 savage_out32(0x48C18, savage_in32(0x48C18, par) & 0x3FF0, par); in SavageSetup2DEngine()
316 (par->cob_offset >> 11) | (par->cob_index << 29), in SavageSetup2DEngine()
317 par); in SavageSetup2DEngine()
319 savage_out32(0x48C10, 0x78207220, par); in SavageSetup2DEngine()
320 savage_out32(0x48C0C, 0, par); in SavageSetup2DEngine()
322 savage_out32(0x48C18, savage_in32(0x48C18, par) | 0x0C, par); in SavageSetup2DEngine()
330 savage_out32(0x48C18, savage_in32(0x48C18, par) & 0x3FF0, par); in SavageSetup2DEngine()
332 savage_out32(0x48C10, 0x00700040, par); in SavageSetup2DEngine()
333 savage_out32(0x48C0C, 0, par); in SavageSetup2DEngine()
335 savage_out32(0x48C18, savage_in32(0x48C18, par) | 0x08, par); in SavageSetup2DEngine()
339 savage_out32(0x48C18, 0, par); in SavageSetup2DEngine()
342 (par->cob_offset >> 7) | (par->cob_index), in SavageSetup2DEngine()
343 par); in SavageSetup2DEngine()
345 savage_out32(0x48A30, 0, par); in SavageSetup2DEngine()
347 savage_out32(0x48C18, savage_in32(0x48C18, par) | 0x00280000, in SavageSetup2DEngine()
348 par); in SavageSetup2DEngine()
354 vga_out8(0x3d4, 0x31, par); in SavageSetup2DEngine()
355 vga_out8(0x3d5, 0x0c, par); in SavageSetup2DEngine()
358 vga_out8(0x3d4, 0x50, par); in SavageSetup2DEngine()
359 vga_out8(0x3d5, vga_in8(0x3d5, par) | 0xC1, par); in SavageSetup2DEngine()
362 vga_out8(0x3d4, 0x40, par); in SavageSetup2DEngine()
363 vga_out8(0x3d5, 0x01, par); in SavageSetup2DEngine()
365 savage_out32(MONO_PAT_0, ~0, par); in SavageSetup2DEngine()
366 savage_out32(MONO_PAT_1, ~0, par); in SavageSetup2DEngine()
369 savage_out32(0x8128, ~0, par); /* enable all write planes */ in SavageSetup2DEngine()
370 savage_out32(0x812C, ~0, par); /* enable all read planes */ in SavageSetup2DEngine()
371 savage_out16(0x8134, 0x27, par); in SavageSetup2DEngine()
372 savage_out16(0x8136, 0x07, par); in SavageSetup2DEngine()
375 par->bci_ptr = 0; in SavageSetup2DEngine()
376 par->SavageWaitFifo(par, 4); in SavageSetup2DEngine()
388 par->bci_ptr = 0; in SavageSetup2DEngine()
389 par->SavageWaitFifo(par, 4); in SavageSetup2DEngine()
399 struct savagefb_par *par = info->par; in savagefb_set_clip() local
403 par->bci_ptr = 0; in savagefb_set_clip()
404 par->SavageWaitFifo(par,3); in savagefb_set_clip()
410 static void SavageSetup2DEngine(struct savagefb_par *par) {} in SavageSetup2DEngine() argument
507 static void SavagePrintRegs(struct savagefb_par *par) in SavagePrintRegs() argument
519 vga_out8(0x3c4, i, par); in SavagePrintRegs()
520 printk(KERN_DEBUG " %02x", vga_in8(0x3c5, par)); in SavagePrintRegs()
529 vga_out8(vgaCRIndex, i, par); in SavagePrintRegs()
530 printk(KERN_DEBUG " %02x", vga_in8(vgaCRReg, par)); in SavagePrintRegs()
539 static void savage_get_default_par(struct savagefb_par *par, struct savage_reg *reg) in savage_get_default_par() argument
543 vga_out16(0x3d4, 0x4838, par); in savage_get_default_par()
544 vga_out16(0x3d4, 0xa039, par); in savage_get_default_par()
545 vga_out16(0x3c4, 0x0608, par); in savage_get_default_par()
547 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
548 cr66 = vga_in8(0x3d5, par); in savage_get_default_par()
549 vga_out8(0x3d5, cr66 | 0x80, par); in savage_get_default_par()
550 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
551 cr3a = vga_in8(0x3d5, par); in savage_get_default_par()
552 vga_out8(0x3d5, cr3a | 0x80, par); in savage_get_default_par()
553 vga_out8(0x3d4, 0x53, par); in savage_get_default_par()
554 cr53 = vga_in8(0x3d5, par); in savage_get_default_par()
555 vga_out8(0x3d5, cr53 & 0x7f, par); in savage_get_default_par()
557 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
558 vga_out8(0x3d5, cr66, par); in savage_get_default_par()
559 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
560 vga_out8(0x3d5, cr3a, par); in savage_get_default_par()
562 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
563 vga_out8(0x3d5, cr66, par); in savage_get_default_par()
564 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
565 vga_out8(0x3d5, cr3a, par); in savage_get_default_par()
568 vga_out8(0x3c4, 0x08, par); in savage_get_default_par()
569 reg->SR08 = vga_in8(0x3c5, par); in savage_get_default_par()
570 vga_out8(0x3c5, 0x06, par); in savage_get_default_par()
573 vga_out8(0x3d4, 0x31, par); in savage_get_default_par()
574 reg->CR31 = vga_in8(0x3d5, par); in savage_get_default_par()
575 vga_out8(0x3d4, 0x32, par); in savage_get_default_par()
576 reg->CR32 = vga_in8(0x3d5, par); in savage_get_default_par()
577 vga_out8(0x3d4, 0x34, par); in savage_get_default_par()
578 reg->CR34 = vga_in8(0x3d5, par); in savage_get_default_par()
579 vga_out8(0x3d4, 0x36, par); in savage_get_default_par()
580 reg->CR36 = vga_in8(0x3d5, par); in savage_get_default_par()
581 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
582 reg->CR3A = vga_in8(0x3d5, par); in savage_get_default_par()
583 vga_out8(0x3d4, 0x40, par); in savage_get_default_par()
584 reg->CR40 = vga_in8(0x3d5, par); in savage_get_default_par()
585 vga_out8(0x3d4, 0x42, par); in savage_get_default_par()
586 reg->CR42 = vga_in8(0x3d5, par); in savage_get_default_par()
587 vga_out8(0x3d4, 0x45, par); in savage_get_default_par()
588 reg->CR45 = vga_in8(0x3d5, par); in savage_get_default_par()
589 vga_out8(0x3d4, 0x50, par); in savage_get_default_par()
590 reg->CR50 = vga_in8(0x3d5, par); in savage_get_default_par()
591 vga_out8(0x3d4, 0x51, par); in savage_get_default_par()
592 reg->CR51 = vga_in8(0x3d5, par); in savage_get_default_par()
593 vga_out8(0x3d4, 0x53, par); in savage_get_default_par()
594 reg->CR53 = vga_in8(0x3d5, par); in savage_get_default_par()
595 vga_out8(0x3d4, 0x58, par); in savage_get_default_par()
596 reg->CR58 = vga_in8(0x3d5, par); in savage_get_default_par()
597 vga_out8(0x3d4, 0x60, par); in savage_get_default_par()
598 reg->CR60 = vga_in8(0x3d5, par); in savage_get_default_par()
599 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
600 reg->CR66 = vga_in8(0x3d5, par); in savage_get_default_par()
601 vga_out8(0x3d4, 0x67, par); in savage_get_default_par()
602 reg->CR67 = vga_in8(0x3d5, par); in savage_get_default_par()
603 vga_out8(0x3d4, 0x68, par); in savage_get_default_par()
604 reg->CR68 = vga_in8(0x3d5, par); in savage_get_default_par()
605 vga_out8(0x3d4, 0x69, par); in savage_get_default_par()
606 reg->CR69 = vga_in8(0x3d5, par); in savage_get_default_par()
607 vga_out8(0x3d4, 0x6f, par); in savage_get_default_par()
608 reg->CR6F = vga_in8(0x3d5, par); in savage_get_default_par()
610 vga_out8(0x3d4, 0x33, par); in savage_get_default_par()
611 reg->CR33 = vga_in8(0x3d5, par); in savage_get_default_par()
612 vga_out8(0x3d4, 0x86, par); in savage_get_default_par()
613 reg->CR86 = vga_in8(0x3d5, par); in savage_get_default_par()
614 vga_out8(0x3d4, 0x88, par); in savage_get_default_par()
615 reg->CR88 = vga_in8(0x3d5, par); in savage_get_default_par()
616 vga_out8(0x3d4, 0x90, par); in savage_get_default_par()
617 reg->CR90 = vga_in8(0x3d5, par); in savage_get_default_par()
618 vga_out8(0x3d4, 0x91, par); in savage_get_default_par()
619 reg->CR91 = vga_in8(0x3d5, par); in savage_get_default_par()
620 vga_out8(0x3d4, 0xb0, par); in savage_get_default_par()
621 reg->CRB0 = vga_in8(0x3d5, par) | 0x80; in savage_get_default_par()
624 vga_out8(0x3d4, 0x3b, par); in savage_get_default_par()
625 reg->CR3B = vga_in8(0x3d5, par); in savage_get_default_par()
626 vga_out8(0x3d4, 0x3c, par); in savage_get_default_par()
627 reg->CR3C = vga_in8(0x3d5, par); in savage_get_default_par()
628 vga_out8(0x3d4, 0x43, par); in savage_get_default_par()
629 reg->CR43 = vga_in8(0x3d5, par); in savage_get_default_par()
630 vga_out8(0x3d4, 0x5d, par); in savage_get_default_par()
631 reg->CR5D = vga_in8(0x3d5, par); in savage_get_default_par()
632 vga_out8(0x3d4, 0x5e, par); in savage_get_default_par()
633 reg->CR5E = vga_in8(0x3d5, par); in savage_get_default_par()
634 vga_out8(0x3d4, 0x65, par); in savage_get_default_par()
635 reg->CR65 = vga_in8(0x3d5, par); in savage_get_default_par()
638 vga_out8(0x3c4, 0x0e, par); in savage_get_default_par()
639 reg->SR0E = vga_in8(0x3c5, par); in savage_get_default_par()
640 vga_out8(0x3c4, 0x0f, par); in savage_get_default_par()
641 reg->SR0F = vga_in8(0x3c5, par); in savage_get_default_par()
642 vga_out8(0x3c4, 0x10, par); in savage_get_default_par()
643 reg->SR10 = vga_in8(0x3c5, par); in savage_get_default_par()
644 vga_out8(0x3c4, 0x11, par); in savage_get_default_par()
645 reg->SR11 = vga_in8(0x3c5, par); in savage_get_default_par()
646 vga_out8(0x3c4, 0x12, par); in savage_get_default_par()
647 reg->SR12 = vga_in8(0x3c5, par); in savage_get_default_par()
648 vga_out8(0x3c4, 0x13, par); in savage_get_default_par()
649 reg->SR13 = vga_in8(0x3c5, par); in savage_get_default_par()
650 vga_out8(0x3c4, 0x29, par); in savage_get_default_par()
651 reg->SR29 = vga_in8(0x3c5, par); in savage_get_default_par()
653 vga_out8(0x3c4, 0x15, par); in savage_get_default_par()
654 reg->SR15 = vga_in8(0x3c5, par); in savage_get_default_par()
655 vga_out8(0x3c4, 0x30, par); in savage_get_default_par()
656 reg->SR30 = vga_in8(0x3c5, par); in savage_get_default_par()
657 vga_out8(0x3c4, 0x18, par); in savage_get_default_par()
658 reg->SR18 = vga_in8(0x3c5, par); in savage_get_default_par()
661 if (par->chip == S3_SAVAGE_MX) { in savage_get_default_par()
665 vga_out8(0x3c4, 0x54+i, par); in savage_get_default_par()
666 reg->SR54[i] = vga_in8(0x3c5, par); in savage_get_default_par()
670 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
671 cr66 = vga_in8(0x3d5, par); in savage_get_default_par()
672 vga_out8(0x3d5, cr66 | 0x80, par); in savage_get_default_par()
673 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
674 cr3a = vga_in8(0x3d5, par); in savage_get_default_par()
675 vga_out8(0x3d5, cr3a | 0x80, par); in savage_get_default_par()
678 if (par->chip != S3_SAVAGE_MX) { in savage_get_default_par()
679 reg->MMPR0 = savage_in32(FIFO_CONTROL_REG, par); in savage_get_default_par()
680 reg->MMPR1 = savage_in32(MIU_CONTROL_REG, par); in savage_get_default_par()
681 reg->MMPR2 = savage_in32(STREAMS_TIMEOUT_REG, par); in savage_get_default_par()
682 reg->MMPR3 = savage_in32(MISC_TIMEOUT_REG, par); in savage_get_default_par()
685 vga_out8(0x3d4, 0x3a, par); in savage_get_default_par()
686 vga_out8(0x3d5, cr3a, par); in savage_get_default_par()
687 vga_out8(0x3d4, 0x66, par); in savage_get_default_par()
688 vga_out8(0x3d5, cr66, par); in savage_get_default_par()
691 static void savage_set_default_par(struct savagefb_par *par, in savage_set_default_par() argument
696 vga_out16(0x3d4, 0x4838, par); in savage_set_default_par()
697 vga_out16(0x3d4, 0xa039, par); in savage_set_default_par()
698 vga_out16(0x3c4, 0x0608, par); in savage_set_default_par()
700 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
701 cr66 = vga_in8(0x3d5, par); in savage_set_default_par()
702 vga_out8(0x3d5, cr66 | 0x80, par); in savage_set_default_par()
703 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
704 cr3a = vga_in8(0x3d5, par); in savage_set_default_par()
705 vga_out8(0x3d5, cr3a | 0x80, par); in savage_set_default_par()
706 vga_out8(0x3d4, 0x53, par); in savage_set_default_par()
707 cr53 = vga_in8(0x3d5, par); in savage_set_default_par()
708 vga_out8(0x3d5, cr53 & 0x7f, par); in savage_set_default_par()
710 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
711 vga_out8(0x3d5, cr66, par); in savage_set_default_par()
712 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
713 vga_out8(0x3d5, cr3a, par); in savage_set_default_par()
715 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
716 vga_out8(0x3d5, cr66, par); in savage_set_default_par()
717 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
718 vga_out8(0x3d5, cr3a, par); in savage_set_default_par()
721 vga_out8(0x3c4, 0x08, par); in savage_set_default_par()
722 vga_out8(0x3c5, reg->SR08, par); in savage_set_default_par()
723 vga_out8(0x3c5, 0x06, par); in savage_set_default_par()
726 vga_out8(0x3d4, 0x31, par); in savage_set_default_par()
727 vga_out8(0x3d5, reg->CR31, par); in savage_set_default_par()
728 vga_out8(0x3d4, 0x32, par); in savage_set_default_par()
729 vga_out8(0x3d5, reg->CR32, par); in savage_set_default_par()
730 vga_out8(0x3d4, 0x34, par); in savage_set_default_par()
731 vga_out8(0x3d5, reg->CR34, par); in savage_set_default_par()
732 vga_out8(0x3d4, 0x36, par); in savage_set_default_par()
733 vga_out8(0x3d5,reg->CR36, par); in savage_set_default_par()
734 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
735 vga_out8(0x3d5, reg->CR3A, par); in savage_set_default_par()
736 vga_out8(0x3d4, 0x40, par); in savage_set_default_par()
737 vga_out8(0x3d5, reg->CR40, par); in savage_set_default_par()
738 vga_out8(0x3d4, 0x42, par); in savage_set_default_par()
739 vga_out8(0x3d5, reg->CR42, par); in savage_set_default_par()
740 vga_out8(0x3d4, 0x45, par); in savage_set_default_par()
741 vga_out8(0x3d5, reg->CR45, par); in savage_set_default_par()
742 vga_out8(0x3d4, 0x50, par); in savage_set_default_par()
743 vga_out8(0x3d5, reg->CR50, par); in savage_set_default_par()
744 vga_out8(0x3d4, 0x51, par); in savage_set_default_par()
745 vga_out8(0x3d5, reg->CR51, par); in savage_set_default_par()
746 vga_out8(0x3d4, 0x53, par); in savage_set_default_par()
747 vga_out8(0x3d5, reg->CR53, par); in savage_set_default_par()
748 vga_out8(0x3d4, 0x58, par); in savage_set_default_par()
749 vga_out8(0x3d5, reg->CR58, par); in savage_set_default_par()
750 vga_out8(0x3d4, 0x60, par); in savage_set_default_par()
751 vga_out8(0x3d5, reg->CR60, par); in savage_set_default_par()
752 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
753 vga_out8(0x3d5, reg->CR66, par); in savage_set_default_par()
754 vga_out8(0x3d4, 0x67, par); in savage_set_default_par()
755 vga_out8(0x3d5, reg->CR67, par); in savage_set_default_par()
756 vga_out8(0x3d4, 0x68, par); in savage_set_default_par()
757 vga_out8(0x3d5, reg->CR68, par); in savage_set_default_par()
758 vga_out8(0x3d4, 0x69, par); in savage_set_default_par()
759 vga_out8(0x3d5, reg->CR69, par); in savage_set_default_par()
760 vga_out8(0x3d4, 0x6f, par); in savage_set_default_par()
761 vga_out8(0x3d5, reg->CR6F, par); in savage_set_default_par()
763 vga_out8(0x3d4, 0x33, par); in savage_set_default_par()
764 vga_out8(0x3d5, reg->CR33, par); in savage_set_default_par()
765 vga_out8(0x3d4, 0x86, par); in savage_set_default_par()
766 vga_out8(0x3d5, reg->CR86, par); in savage_set_default_par()
767 vga_out8(0x3d4, 0x88, par); in savage_set_default_par()
768 vga_out8(0x3d5, reg->CR88, par); in savage_set_default_par()
769 vga_out8(0x3d4, 0x90, par); in savage_set_default_par()
770 vga_out8(0x3d5, reg->CR90, par); in savage_set_default_par()
771 vga_out8(0x3d4, 0x91, par); in savage_set_default_par()
772 vga_out8(0x3d5, reg->CR91, par); in savage_set_default_par()
773 vga_out8(0x3d4, 0xb0, par); in savage_set_default_par()
774 vga_out8(0x3d5, reg->CRB0, par); in savage_set_default_par()
777 vga_out8(0x3d4, 0x3b, par); in savage_set_default_par()
778 vga_out8(0x3d5, reg->CR3B, par); in savage_set_default_par()
779 vga_out8(0x3d4, 0x3c, par); in savage_set_default_par()
780 vga_out8(0x3d5, reg->CR3C, par); in savage_set_default_par()
781 vga_out8(0x3d4, 0x43, par); in savage_set_default_par()
782 vga_out8(0x3d5, reg->CR43, par); in savage_set_default_par()
783 vga_out8(0x3d4, 0x5d, par); in savage_set_default_par()
784 vga_out8(0x3d5, reg->CR5D, par); in savage_set_default_par()
785 vga_out8(0x3d4, 0x5e, par); in savage_set_default_par()
786 vga_out8(0x3d5, reg->CR5E, par); in savage_set_default_par()
787 vga_out8(0x3d4, 0x65, par); in savage_set_default_par()
788 vga_out8(0x3d5, reg->CR65, par); in savage_set_default_par()
791 vga_out8(0x3c4, 0x0e, par); in savage_set_default_par()
792 vga_out8(0x3c5, reg->SR0E, par); in savage_set_default_par()
793 vga_out8(0x3c4, 0x0f, par); in savage_set_default_par()
794 vga_out8(0x3c5, reg->SR0F, par); in savage_set_default_par()
795 vga_out8(0x3c4, 0x10, par); in savage_set_default_par()
796 vga_out8(0x3c5, reg->SR10, par); in savage_set_default_par()
797 vga_out8(0x3c4, 0x11, par); in savage_set_default_par()
798 vga_out8(0x3c5, reg->SR11, par); in savage_set_default_par()
799 vga_out8(0x3c4, 0x12, par); in savage_set_default_par()
800 vga_out8(0x3c5, reg->SR12, par); in savage_set_default_par()
801 vga_out8(0x3c4, 0x13, par); in savage_set_default_par()
802 vga_out8(0x3c5, reg->SR13, par); in savage_set_default_par()
803 vga_out8(0x3c4, 0x29, par); in savage_set_default_par()
804 vga_out8(0x3c5, reg->SR29, par); in savage_set_default_par()
806 vga_out8(0x3c4, 0x15, par); in savage_set_default_par()
807 vga_out8(0x3c5, reg->SR15, par); in savage_set_default_par()
808 vga_out8(0x3c4, 0x30, par); in savage_set_default_par()
809 vga_out8(0x3c5, reg->SR30, par); in savage_set_default_par()
810 vga_out8(0x3c4, 0x18, par); in savage_set_default_par()
811 vga_out8(0x3c5, reg->SR18, par); in savage_set_default_par()
814 if (par->chip == S3_SAVAGE_MX) { in savage_set_default_par()
818 vga_out8(0x3c4, 0x54+i, par); in savage_set_default_par()
819 vga_out8(0x3c5, reg->SR54[i], par); in savage_set_default_par()
823 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
824 cr66 = vga_in8(0x3d5, par); in savage_set_default_par()
825 vga_out8(0x3d5, cr66 | 0x80, par); in savage_set_default_par()
826 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
827 cr3a = vga_in8(0x3d5, par); in savage_set_default_par()
828 vga_out8(0x3d5, cr3a | 0x80, par); in savage_set_default_par()
831 if (par->chip != S3_SAVAGE_MX) { in savage_set_default_par()
832 savage_out32(FIFO_CONTROL_REG, reg->MMPR0, par); in savage_set_default_par()
833 savage_out32(MIU_CONTROL_REG, reg->MMPR1, par); in savage_set_default_par()
834 savage_out32(STREAMS_TIMEOUT_REG, reg->MMPR2, par); in savage_set_default_par()
835 savage_out32(MISC_TIMEOUT_REG, reg->MMPR3, par); in savage_set_default_par()
838 vga_out8(0x3d4, 0x3a, par); in savage_set_default_par()
839 vga_out8(0x3d5, cr3a, par); in savage_set_default_par()
840 vga_out8(0x3d4, 0x66, par); in savage_set_default_par()
841 vga_out8(0x3d5, cr66, par); in savage_set_default_par()
866 struct savagefb_par *par = info->par; in savagefb_check_var() local
927 if (par->SavagePanelWidth && in savagefb_check_var()
928 (var->xres > par->SavagePanelWidth || in savagefb_check_var()
929 var->yres > par->SavagePanelHeight)) { in savagefb_check_var()
932 par->SavagePanelWidth, in savagefb_check_var()
933 par->SavagePanelHeight); in savagefb_check_var()
969 struct savagefb_par *par, in savagefb_decode_var() argument
998 par->depth = var->bits_per_pixel; in savagefb_decode_var()
999 par->vwidth = var->xres_virtual; in savagefb_decode_var()
1001 if (var->bits_per_pixel == 16 && par->chip == S3_SAVAGE3D) { in savagefb_decode_var()
1012 vgaHWInit(var, par, &timings, reg); in savagefb_decode_var()
1021 if ((par->chip == S3_SAVAGE2000) && (dclk >= 230000)) in savagefb_decode_var()
1027 if (S3_SAVAGE_MOBILE_SERIES(par->chip) || in savagefb_decode_var()
1028 ((par->chip == S3_SAVAGE2000) && (dclk >= 230000))) in savagefb_decode_var()
1034 if (S3_SAVAGE_MOBILE_SERIES(par->chip) || in savagefb_decode_var()
1035 ((par->chip == S3_SAVAGE2000) && (dclk >= 230000))) in savagefb_decode_var()
1053 vga_out8(0x3d4, 0x3a, par); in savagefb_decode_var()
1054 tmp = vga_in8(0x3d5, par); in savagefb_decode_var()
1064 vga_out8(0x3d4, 0x58, par); in savagefb_decode_var()
1065 reg->CR58 = vga_in8(0x3d5, par) & 0x80; in savagefb_decode_var()
1072 vga_out8(0x3d4, 0x40, par); in savagefb_decode_var()
1073 reg->CR40 = vga_in8(0x3d5, par) & ~0x01; in savagefb_decode_var()
1083 if (par->MCLK <= 0) { in savagefb_decode_var()
1087 common_calc_clock(par->MCLK, 1, 1, 31, 0, 3, 135000, 270000, in savagefb_decode_var()
1168 if (par->chip == S3_SAVAGE2000) in savagefb_decode_var()
1177 vga_out8(0x3d4, 0x36, par); in savagefb_decode_var()
1178 reg->CR36 = vga_in8(0x3d5, par); in savagefb_decode_var()
1179 vga_out8(0x3d4, 0x68, par); in savagefb_decode_var()
1180 reg->CR68 = vga_in8(0x3d5, par); in savagefb_decode_var()
1182 vga_out8(0x3d4, 0x6f, par); in savagefb_decode_var()
1183 reg->CR6F = vga_in8(0x3d5, par); in savagefb_decode_var()
1184 vga_out8(0x3d4, 0x86, par); in savagefb_decode_var()
1185 reg->CR86 = vga_in8(0x3d5, par); in savagefb_decode_var()
1186 vga_out8(0x3d4, 0x88, par); in savagefb_decode_var()
1187 reg->CR88 = vga_in8(0x3d5, par) | 0x08; in savagefb_decode_var()
1188 vga_out8(0x3d4, 0xb0, par); in savagefb_decode_var()
1189 reg->CRB0 = vga_in8(0x3d5, par) | 0x80; in savagefb_decode_var()
1206 struct savagefb_par *par = info->par; in savagefb_setcolreg() local
1211 par->palette[regno].red = red; in savagefb_setcolreg()
1212 par->palette[regno].green = green; in savagefb_setcolreg()
1213 par->palette[regno].blue = blue; in savagefb_setcolreg()
1214 par->palette[regno].transp = transp; in savagefb_setcolreg()
1218 vga_out8(0x3c8, regno, par); in savagefb_setcolreg()
1220 vga_out8(0x3c9, red >> 10, par); in savagefb_setcolreg()
1221 vga_out8(0x3c9, green >> 10, par); in savagefb_setcolreg()
1222 vga_out8(0x3c9, blue >> 10, par); in savagefb_setcolreg()
1256 static void savagefb_set_par_int(struct savagefb_par *par, struct savage_reg *reg) in savagefb_set_par_int() argument
1262 par->SavageWaitIdle(par); in savagefb_set_par_int()
1264 vga_out8(0x3c2, 0x23, par); in savagefb_set_par_int()
1266 vga_out16(0x3d4, 0x4838, par); in savagefb_set_par_int()
1267 vga_out16(0x3d4, 0xa539, par); in savagefb_set_par_int()
1268 vga_out16(0x3c4, 0x0608, par); in savagefb_set_par_int()
1270 vgaHWProtect(par, 1); in savagefb_set_par_int()
1279 VerticalRetraceWait(par); in savagefb_set_par_int()
1280 vga_out8(0x3d4, 0x67, par); in savagefb_set_par_int()
1281 cr67 = vga_in8(0x3d5, par); in savagefb_set_par_int()
1282 vga_out8(0x3d5, cr67/*par->CR67*/ & ~0x0c, par); /* no STREAMS yet */ in savagefb_set_par_int()
1284 vga_out8(0x3d4, 0x23, par); in savagefb_set_par_int()
1285 vga_out8(0x3d5, 0x00, par); in savagefb_set_par_int()
1286 vga_out8(0x3d4, 0x26, par); in savagefb_set_par_int()
1287 vga_out8(0x3d5, 0x00, par); in savagefb_set_par_int()
1290 vga_out8(0x3d4, 0x66, par); in savagefb_set_par_int()
1291 vga_out8(0x3d5, reg->CR66, par); in savagefb_set_par_int()
1292 vga_out8(0x3d4, 0x3a, par); in savagefb_set_par_int()
1293 vga_out8(0x3d5, reg->CR3A, par); in savagefb_set_par_int()
1294 vga_out8(0x3d4, 0x31, par); in savagefb_set_par_int()
1295 vga_out8(0x3d5, reg->CR31, par); in savagefb_set_par_int()
1296 vga_out8(0x3d4, 0x32, par); in savagefb_set_par_int()
1297 vga_out8(0x3d5, reg->CR32, par); in savagefb_set_par_int()
1298 vga_out8(0x3d4, 0x58, par); in savagefb_set_par_int()
1299 vga_out8(0x3d5, reg->CR58, par); in savagefb_set_par_int()
1300 vga_out8(0x3d4, 0x53, par); in savagefb_set_par_int()
1301 vga_out8(0x3d5, reg->CR53 & 0x7f, par); in savagefb_set_par_int()
1303 vga_out16(0x3c4, 0x0608, par); in savagefb_set_par_int()
1307 vga_out8(0x3c4, 0x0e, par); in savagefb_set_par_int()
1308 vga_out8(0x3c5, reg->SR0E, par); in savagefb_set_par_int()
1309 vga_out8(0x3c4, 0x0f, par); in savagefb_set_par_int()
1310 vga_out8(0x3c5, reg->SR0F, par); in savagefb_set_par_int()
1311 vga_out8(0x3c4, 0x29, par); in savagefb_set_par_int()
1312 vga_out8(0x3c5, reg->SR29, par); in savagefb_set_par_int()
1313 vga_out8(0x3c4, 0x15, par); in savagefb_set_par_int()
1314 vga_out8(0x3c5, reg->SR15, par); in savagefb_set_par_int()
1317 if (par->chip == S3_SAVAGE_MX) { in savagefb_set_par_int()
1321 vga_out8(0x3c4, 0x54+i, par); in savagefb_set_par_int()
1322 vga_out8(0x3c5, reg->SR54[i], par); in savagefb_set_par_int()
1326 vgaHWRestore (par, reg); in savagefb_set_par_int()
1329 vga_out8(0x3d4, 0x53, par); in savagefb_set_par_int()
1330 vga_out8(0x3d5, reg->CR53, par); in savagefb_set_par_int()
1331 vga_out8(0x3d4, 0x5d, par); in savagefb_set_par_int()
1332 vga_out8(0x3d5, reg->CR5D, par); in savagefb_set_par_int()
1333 vga_out8(0x3d4, 0x5e, par); in savagefb_set_par_int()
1334 vga_out8(0x3d5, reg->CR5E, par); in savagefb_set_par_int()
1335 vga_out8(0x3d4, 0x3b, par); in savagefb_set_par_int()
1336 vga_out8(0x3d5, reg->CR3B, par); in savagefb_set_par_int()
1337 vga_out8(0x3d4, 0x3c, par); in savagefb_set_par_int()
1338 vga_out8(0x3d5, reg->CR3C, par); in savagefb_set_par_int()
1339 vga_out8(0x3d4, 0x43, par); in savagefb_set_par_int()
1340 vga_out8(0x3d5, reg->CR43, par); in savagefb_set_par_int()
1341 vga_out8(0x3d4, 0x65, par); in savagefb_set_par_int()
1342 vga_out8(0x3d5, reg->CR65, par); in savagefb_set_par_int()
1345 vga_out8(0x3d4, 0x67, par); in savagefb_set_par_int()
1347 cr67 = vga_in8(0x3d5, par) & 0xf; in savagefb_set_par_int()
1348 vga_out8(0x3d5, 0x50 | cr67, par); in savagefb_set_par_int()
1350 vga_out8(0x3d4, 0x67, par); in savagefb_set_par_int()
1352 vga_out8(0x3d5, reg->CR67 & ~0x0c, par); in savagefb_set_par_int()
1355 vga_out8(0x3d4, 0x34, par); in savagefb_set_par_int()
1356 vga_out8(0x3d5, reg->CR34, par); in savagefb_set_par_int()
1357 vga_out8(0x3d4, 0x40, par); in savagefb_set_par_int()
1358 vga_out8(0x3d5, reg->CR40, par); in savagefb_set_par_int()
1359 vga_out8(0x3d4, 0x42, par); in savagefb_set_par_int()
1360 vga_out8(0x3d5, reg->CR42, par); in savagefb_set_par_int()
1361 vga_out8(0x3d4, 0x45, par); in savagefb_set_par_int()
1362 vga_out8(0x3d5, reg->CR45, par); in savagefb_set_par_int()
1363 vga_out8(0x3d4, 0x50, par); in savagefb_set_par_int()
1364 vga_out8(0x3d5, reg->CR50, par); in savagefb_set_par_int()
1365 vga_out8(0x3d4, 0x51, par); in savagefb_set_par_int()
1366 vga_out8(0x3d5, reg->CR51, par); in savagefb_set_par_int()
1369 vga_out8(0x3d4, 0x36, par); in savagefb_set_par_int()
1370 vga_out8(0x3d5, reg->CR36, par); in savagefb_set_par_int()
1371 vga_out8(0x3d4, 0x60, par); in savagefb_set_par_int()
1372 vga_out8(0x3d5, reg->CR60, par); in savagefb_set_par_int()
1373 vga_out8(0x3d4, 0x68, par); in savagefb_set_par_int()
1374 vga_out8(0x3d5, reg->CR68, par); in savagefb_set_par_int()
1375 vga_out8(0x3d4, 0x69, par); in savagefb_set_par_int()
1376 vga_out8(0x3d5, reg->CR69, par); in savagefb_set_par_int()
1377 vga_out8(0x3d4, 0x6f, par); in savagefb_set_par_int()
1378 vga_out8(0x3d5, reg->CR6F, par); in savagefb_set_par_int()
1380 vga_out8(0x3d4, 0x33, par); in savagefb_set_par_int()
1381 vga_out8(0x3d5, reg->CR33, par); in savagefb_set_par_int()
1382 vga_out8(0x3d4, 0x86, par); in savagefb_set_par_int()
1383 vga_out8(0x3d5, reg->CR86, par); in savagefb_set_par_int()
1384 vga_out8(0x3d4, 0x88, par); in savagefb_set_par_int()
1385 vga_out8(0x3d5, reg->CR88, par); in savagefb_set_par_int()
1386 vga_out8(0x3d4, 0x90, par); in savagefb_set_par_int()
1387 vga_out8(0x3d5, reg->CR90, par); in savagefb_set_par_int()
1388 vga_out8(0x3d4, 0x91, par); in savagefb_set_par_int()
1389 vga_out8(0x3d5, reg->CR91, par); in savagefb_set_par_int()
1391 if (par->chip == S3_SAVAGE4) { in savagefb_set_par_int()
1392 vga_out8(0x3d4, 0xb0, par); in savagefb_set_par_int()
1393 vga_out8(0x3d5, reg->CRB0, par); in savagefb_set_par_int()
1396 vga_out8(0x3d4, 0x32, par); in savagefb_set_par_int()
1397 vga_out8(0x3d5, reg->CR32, par); in savagefb_set_par_int()
1400 vga_out8(0x3c4, 0x08, par); in savagefb_set_par_int()
1401 vga_out8(0x3c5, 0x06, par); in savagefb_set_par_int()
1407 vga_out8(0x3c4, 0x10, par); in savagefb_set_par_int()
1408 vga_out8(0x3c5, reg->SR10, par); in savagefb_set_par_int()
1409 vga_out8(0x3c4, 0x11, par); in savagefb_set_par_int()
1410 vga_out8(0x3c5, reg->SR11, par); in savagefb_set_par_int()
1414 vga_out8(0x3c4, 0x0e, par); in savagefb_set_par_int()
1415 vga_out8(0x3c5, reg->SR0E, par); in savagefb_set_par_int()
1416 vga_out8(0x3c4, 0x0f, par); in savagefb_set_par_int()
1417 vga_out8(0x3c5, reg->SR0F, par); in savagefb_set_par_int()
1418 vga_out8(0x3c4, 0x12, par); in savagefb_set_par_int()
1419 vga_out8(0x3c5, reg->SR12, par); in savagefb_set_par_int()
1420 vga_out8(0x3c4, 0x13, par); in savagefb_set_par_int()
1421 vga_out8(0x3c5, reg->SR13, par); in savagefb_set_par_int()
1422 vga_out8(0x3c4, 0x29, par); in savagefb_set_par_int()
1423 vga_out8(0x3c5, reg->SR29, par); in savagefb_set_par_int()
1424 vga_out8(0x3c4, 0x18, par); in savagefb_set_par_int()
1425 vga_out8(0x3c5, reg->SR18, par); in savagefb_set_par_int()
1428 vga_out8(0x3c4, 0x15, par); in savagefb_set_par_int()
1429 tmp = vga_in8(0x3c5, par) & ~0x21; in savagefb_set_par_int()
1431 vga_out8(0x3c5, tmp | 0x03, par); in savagefb_set_par_int()
1432 vga_out8(0x3c5, tmp | 0x23, par); in savagefb_set_par_int()
1433 vga_out8(0x3c5, tmp | 0x03, par); in savagefb_set_par_int()
1434 vga_out8(0x3c5, reg->SR15, par); in savagefb_set_par_int()
1437 vga_out8(0x3c4, 0x30, par); in savagefb_set_par_int()
1438 vga_out8(0x3c5, reg->SR30, par); in savagefb_set_par_int()
1439 vga_out8(0x3c4, 0x08, par); in savagefb_set_par_int()
1440 vga_out8(0x3c5, reg->SR08, par); in savagefb_set_par_int()
1443 VerticalRetraceWait(par); in savagefb_set_par_int()
1444 vga_out8(0x3d4, 0x67, par); in savagefb_set_par_int()
1445 vga_out8(0x3d5, reg->CR67, par); in savagefb_set_par_int()
1447 vga_out8(0x3d4, 0x66, par); in savagefb_set_par_int()
1448 cr66 = vga_in8(0x3d5, par); in savagefb_set_par_int()
1449 vga_out8(0x3d5, cr66 | 0x80, par); in savagefb_set_par_int()
1450 vga_out8(0x3d4, 0x3a, par); in savagefb_set_par_int()
1451 cr3a = vga_in8(0x3d5, par); in savagefb_set_par_int()
1452 vga_out8(0x3d5, cr3a | 0x80, par); in savagefb_set_par_int()
1454 if (par->chip != S3_SAVAGE_MX) { in savagefb_set_par_int()
1455 VerticalRetraceWait(par); in savagefb_set_par_int()
1456 savage_out32(FIFO_CONTROL_REG, reg->MMPR0, par); in savagefb_set_par_int()
1457 par->SavageWaitIdle(par); in savagefb_set_par_int()
1458 savage_out32(MIU_CONTROL_REG, reg->MMPR1, par); in savagefb_set_par_int()
1459 par->SavageWaitIdle(par); in savagefb_set_par_int()
1460 savage_out32(STREAMS_TIMEOUT_REG, reg->MMPR2, par); in savagefb_set_par_int()
1461 par->SavageWaitIdle(par); in savagefb_set_par_int()
1462 savage_out32(MISC_TIMEOUT_REG, reg->MMPR3, par); in savagefb_set_par_int()
1465 vga_out8(0x3d4, 0x66, par); in savagefb_set_par_int()
1466 vga_out8(0x3d5, cr66, par); in savagefb_set_par_int()
1467 vga_out8(0x3d4, 0x3a, par); in savagefb_set_par_int()
1468 vga_out8(0x3d5, cr3a, par); in savagefb_set_par_int()
1470 SavageSetup2DEngine(par); in savagefb_set_par_int()
1471 vgaHWProtect(par, 0); in savagefb_set_par_int()
1474 static void savagefb_update_start(struct savagefb_par *par, int base) in savagefb_update_start() argument
1477 vga_out16(0x3d4, (base & 0x00ff00) | 0x0c, par); in savagefb_update_start()
1478 vga_out16(0x3d4, ((base & 0x00ff) << 8) | 0x0d, par); in savagefb_update_start()
1479 vga_out8(0x3d4, 0x69, par); in savagefb_update_start()
1480 vga_out8(0x3d5, (base & 0x7f0000) >> 16, par); in savagefb_update_start()
1501 struct savagefb_par *par = info->par; in savagefb_set_par() local
1506 err = savagefb_decode_var(var, par, &par->state); in savagefb_set_par()
1510 if (par->dacSpeedBpp <= 0) { in savagefb_set_par()
1512 par->dacSpeedBpp = par->clock[3]; in savagefb_set_par()
1514 par->dacSpeedBpp = par->clock[2]; in savagefb_set_par()
1516 par->dacSpeedBpp = par->clock[1]; in savagefb_set_par()
1518 par->dacSpeedBpp = par->clock[0]; in savagefb_set_par()
1522 par->maxClock = par->dacSpeedBpp; in savagefb_set_par()
1523 par->minClock = 10000; in savagefb_set_par()
1525 savagefb_set_par_int(par, &par->state); in savagefb_set_par()
1530 SavagePrintRegs(par); in savagefb_set_par()
1540 struct savagefb_par *par = info->par; in savagefb_pan_display() local
1546 savagefb_update_start(par, base); in savagefb_pan_display()
1552 struct savagefb_par *par = info->par; in savagefb_blank() local
1555 if (par->display_type == DISP_CRT) { in savagefb_blank()
1556 vga_out8(0x3c4, 0x08, par); in savagefb_blank()
1557 sr8 = vga_in8(0x3c5, par); in savagefb_blank()
1559 vga_out8(0x3c5, sr8, par); in savagefb_blank()
1560 vga_out8(0x3c4, 0x0d, par); in savagefb_blank()
1561 srd = vga_in8(0x3c5, par); in savagefb_blank()
1579 vga_out8(0x3c4, 0x0d, par); in savagefb_blank()
1580 vga_out8(0x3c5, srd, par); in savagefb_blank()
1583 if (par->display_type == DISP_LCD || in savagefb_blank()
1584 par->display_type == DISP_DFP) { in savagefb_blank()
1588 vga_out8(0x3c4, 0x31, par); /* SR31 bit 4 - FP enable */ in savagefb_blank()
1589 vga_out8(0x3c5, vga_in8(0x3c5, par) | 0x10, par); in savagefb_blank()
1594 vga_out8(0x3c4, 0x31, par); /* SR31 bit 4 - FP enable */ in savagefb_blank()
1595 vga_out8(0x3c5, vga_in8(0x3c5, par) & ~0x10, par); in savagefb_blank()
1605 struct savagefb_par *par = info->par; in savagefb_open() local
1607 mutex_lock(&par->open_lock); in savagefb_open()
1609 if (!par->open_count) { in savagefb_open()
1610 memset(&par->vgastate, 0, sizeof(par->vgastate)); in savagefb_open()
1611 par->vgastate.flags = VGA_SAVE_CMAP | VGA_SAVE_FONTS | in savagefb_open()
1613 par->vgastate.vgabase = par->mmio.vbase + 0x8000; in savagefb_open()
1614 save_vga(&par->vgastate); in savagefb_open()
1615 savage_get_default_par(par, &par->initial); in savagefb_open()
1618 par->open_count++; in savagefb_open()
1619 mutex_unlock(&par->open_lock); in savagefb_open()
1625 struct savagefb_par *par = info->par; in savagefb_release() local
1627 mutex_lock(&par->open_lock); in savagefb_release()
1629 if (par->open_count == 1) { in savagefb_release()
1630 savage_set_default_par(par, &par->initial); in savagefb_release()
1631 restore_vga(&par->vgastate); in savagefb_release()
1634 par->open_count--; in savagefb_release()
1635 mutex_unlock(&par->open_lock); in savagefb_release()
1680 static void savage_enable_mmio(struct savagefb_par *par) in savage_enable_mmio() argument
1686 val = vga_in8(0x3c3, par); in savage_enable_mmio()
1687 vga_out8(0x3c3, val | 0x01, par); in savage_enable_mmio()
1688 val = vga_in8(0x3cc, par); in savage_enable_mmio()
1689 vga_out8(0x3c2, val | 0x01, par); in savage_enable_mmio()
1691 if (par->chip >= S3_SAVAGE4) { in savage_enable_mmio()
1692 vga_out8(0x3d4, 0x40, par); in savage_enable_mmio()
1693 val = vga_in8(0x3d5, par); in savage_enable_mmio()
1694 vga_out8(0x3d5, val | 1, par); in savage_enable_mmio()
1699 static void savage_disable_mmio(struct savagefb_par *par) in savage_disable_mmio() argument
1705 if (par->chip >= S3_SAVAGE4) { in savage_disable_mmio()
1706 vga_out8(0x3d4, 0x40, par); in savage_disable_mmio()
1707 val = vga_in8(0x3d5, par); in savage_disable_mmio()
1708 vga_out8(0x3d5, val | 1, par); in savage_disable_mmio()
1715 struct savagefb_par *par = info->par; in savage_map_mmio() local
1718 if (S3_SAVAGE3D_SERIES(par->chip)) in savage_map_mmio()
1719 par->mmio.pbase = pci_resource_start(par->pcidev, 0) + in savage_map_mmio()
1722 par->mmio.pbase = pci_resource_start(par->pcidev, 0) + in savage_map_mmio()
1725 par->mmio.len = SAVAGE_NEWMMIO_REGSIZE; in savage_map_mmio()
1727 par->mmio.vbase = ioremap(par->mmio.pbase, par->mmio.len); in savage_map_mmio()
1728 if (!par->mmio.vbase) { in savage_map_mmio()
1733 par->mmio.vbase); in savage_map_mmio()
1735 info->fix.mmio_start = par->mmio.pbase; in savage_map_mmio()
1736 info->fix.mmio_len = par->mmio.len; in savage_map_mmio()
1738 par->bci_base = (u32 __iomem *)(par->mmio.vbase + BCI_BUFFER_OFFSET); in savage_map_mmio()
1739 par->bci_ptr = 0; in savage_map_mmio()
1741 savage_enable_mmio(par); in savage_map_mmio()
1748 struct savagefb_par *par = info->par; in savage_unmap_mmio() local
1751 savage_disable_mmio(par); in savage_unmap_mmio()
1753 if (par->mmio.vbase) { in savage_unmap_mmio()
1754 iounmap(par->mmio.vbase); in savage_unmap_mmio()
1755 par->mmio.vbase = NULL; in savage_unmap_mmio()
1761 struct savagefb_par *par = info->par; in savage_map_video() local
1766 if (S3_SAVAGE3D_SERIES(par->chip)) in savage_map_video()
1771 par->video.pbase = pci_resource_start(par->pcidev, resource); in savage_map_video()
1772 par->video.len = video_len; in savage_map_video()
1773 par->video.vbase = ioremap_wc(par->video.pbase, par->video.len); in savage_map_video()
1775 if (!par->video.vbase) { in savage_map_video()
1780 "pbase == %x\n", par->video.vbase, par->video.pbase); in savage_map_video()
1782 info->fix.smem_start = par->video.pbase; in savage_map_video()
1783 info->fix.smem_len = par->video.len - par->cob_size; in savage_map_video()
1784 info->screen_base = par->video.vbase; in savage_map_video()
1785 par->video.wc_cookie = arch_phys_wc_add(par->video.pbase, video_len); in savage_map_video()
1788 memset_io(par->video.vbase, 0, par->video.len); in savage_map_video()
1795 struct savagefb_par *par = info->par; in savage_unmap_video() local
1799 if (par->video.vbase) { in savage_unmap_video()
1800 arch_phys_wc_del(par->video.wc_cookie); in savage_unmap_video()
1801 iounmap(par->video.vbase); in savage_unmap_video()
1802 par->video.vbase = NULL; in savage_unmap_video()
1807 static int savage_init_hw(struct savagefb_par *par) in savage_init_hw() argument
1820 vga_out8(0x3d4, 0x11, par); in savage_init_hw()
1821 tmp = vga_in8(0x3d5, par); in savage_init_hw()
1822 vga_out8(0x3d5, tmp & 0x7f, par); in savage_init_hw()
1825 vga_out16(0x3d4, 0x4838, par); in savage_init_hw()
1826 vga_out16(0x3d4, 0xa039, par); in savage_init_hw()
1827 vga_out16(0x3c4, 0x0608, par); in savage_init_hw()
1829 vga_out8(0x3d4, 0x40, par); in savage_init_hw()
1830 tmp = vga_in8(0x3d5, par); in savage_init_hw()
1831 vga_out8(0x3d5, tmp & ~0x01, par); in savage_init_hw()
1834 vga_out8(0x3d4, 0x38, par); in savage_init_hw()
1835 vga_out8(0x3d5, 0x48, par); in savage_init_hw()
1838 vga_out16(0x3d4, 0x4838, par); in savage_init_hw()
1842 vga_out8(0x3d4, 0x36, par); /* for register CR36 (CONFG_REG1), */ in savage_init_hw()
1843 config1 = vga_in8(0x3d5, par); /* get amount of vram installed */ in savage_init_hw()
1847 switch (par->chip) { in savage_init_hw()
1859 vga_out8(0x3d4, 0x68, par); /* memory control 1 */ in savage_init_hw()
1860 if ((vga_in8(0x3d5, par) & 0xC0) == (0x01 << 6)) in savage_init_hw()
1890 vga_out8(0x3d4, 0x66, par); in savage_init_hw()
1891 cr66 = vga_in8(0x3d5, par); in savage_init_hw()
1892 vga_out8(0x3d5, cr66 | 0x02, par); in savage_init_hw()
1895 vga_out8(0x3d4, 0x66, par); in savage_init_hw()
1896 vga_out8(0x3d5, cr66 & ~0x02, par); /* clear reset flag */ in savage_init_hw()
1904 vga_out8(0x3d4, 0x3f, par); in savage_init_hw()
1905 cr3f = vga_in8(0x3d5, par); in savage_init_hw()
1906 vga_out8(0x3d5, cr3f | 0x08, par); in savage_init_hw()
1909 vga_out8(0x3d4, 0x3f, par); in savage_init_hw()
1910 vga_out8(0x3d5, cr3f & ~0x08, par); /* clear reset flags */ in savage_init_hw()
1914 par->numClocks = 4; in savage_init_hw()
1915 par->clock[0] = 250000; in savage_init_hw()
1916 par->clock[1] = 250000; in savage_init_hw()
1917 par->clock[2] = 220000; in savage_init_hw()
1918 par->clock[3] = 220000; in savage_init_hw()
1921 vga_out8(0x3c4, 0x08, par); in savage_init_hw()
1922 sr8 = vga_in8(0x3c5, par); in savage_init_hw()
1923 vga_out8(0x3c5, 0x06, par); in savage_init_hw()
1924 vga_out8(0x3c4, 0x10, par); in savage_init_hw()
1925 n = vga_in8(0x3c5, par); in savage_init_hw()
1926 vga_out8(0x3c4, 0x11, par); in savage_init_hw()
1927 m = vga_in8(0x3c5, par); in savage_init_hw()
1928 vga_out8(0x3c4, 0x08, par); in savage_init_hw()
1929 vga_out8(0x3c5, sr8, par); in savage_init_hw()
1933 par->MCLK = ((1431818 * (m+2)) / (n1+2) / (1 << n2) + 50) / 100; in savage_init_hw()
1935 par->MCLK); in savage_init_hw()
1940 if (par->chip == S3_SAVAGE4) { in savage_init_hw()
1943 vga_out8(0x3c4, 0x30, par); in savage_init_hw()
1945 vga_out8(0x3c5, vga_in8(0x3c5, par) & ~0x02, par); in savage_init_hw()
1946 sr30 = vga_in8(0x3c5, par); in savage_init_hw()
1953 if ((S3_SAVAGE_MOBILE_SERIES(par->chip) || in savage_init_hw()
1954 S3_MOBILE_TWISTER_SERIES(par->chip)) && !par->crtonly) in savage_init_hw()
1955 par->display_type = DISP_LCD; in savage_init_hw()
1956 else if (dvi || (par->chip == S3_SAVAGE4 && par->dvi)) in savage_init_hw()
1957 par->display_type = DISP_DFP; in savage_init_hw()
1959 par->display_type = DISP_CRT; in savage_init_hw()
1963 if (par->display_type == DISP_LCD) { in savage_init_hw()
1964 unsigned char cr6b = VGArCR(0x6b, par); in savage_init_hw()
1966 int panelX = (VGArSEQ(0x61, par) + in savage_init_hw()
1967 ((VGArSEQ(0x66, par) & 0x02) << 7) + 1) * 8; in savage_init_hw()
1968 int panelY = (VGArSEQ(0x69, par) + in savage_init_hw()
1969 ((VGArSEQ(0x6e, par) & 0x70) << 4) + 1); in savage_init_hw()
1991 if ((VGArSEQ(0x39, par) & 0x03) == 0) { in savage_init_hw()
1993 } else if ((VGArSEQ(0x30, par) & 0x01) == 0) { in savage_init_hw()
2012 par->SavagePanelWidth = panelX; in savage_init_hw()
2013 par->SavagePanelHeight = panelY; in savage_init_hw()
2016 par->display_type = DISP_CRT; in savage_init_hw()
2019 savage_get_default_par(par, &par->state); in savage_init_hw()
2020 par->save = par->state; in savage_init_hw()
2022 if (S3_SAVAGE4_SERIES(par->chip)) { in savage_init_hw()
2027 par->cob_index = 2; in savage_init_hw()
2028 par->cob_size = 0x8000 << par->cob_index; in savage_init_hw()
2029 par->cob_offset = videoRambytes; in savage_init_hw()
2033 par->cob_index = 7; in savage_init_hw()
2034 par->cob_size = 0x400 << par->cob_index; in savage_init_hw()
2035 par->cob_offset = videoRambytes - par->cob_size; in savage_init_hw()
2044 struct savagefb_par *par = info->par; in savage_init_fb_info() local
2047 par->pcidev = dev; in savage_init_fb_info()
2057 par->chip = S3_SUPERSAVAGE; in savage_init_fb_info()
2061 par->chip = S3_SAVAGE4; in savage_init_fb_info()
2065 par->chip = S3_SAVAGE3D; in savage_init_fb_info()
2069 par->chip = S3_SAVAGE3D; in savage_init_fb_info()
2073 par->chip = S3_SAVAGE2000; in savage_init_fb_info()
2077 par->chip = S3_SAVAGE_MX; in savage_init_fb_info()
2081 par->chip = S3_SAVAGE_MX; in savage_init_fb_info()
2085 par->chip = S3_SAVAGE_MX; in savage_init_fb_info()
2089 par->chip = S3_SAVAGE_MX; in savage_init_fb_info()
2093 par->chip = S3_PROSAVAGE; in savage_init_fb_info()
2097 par->chip = S3_PROSAVAGE; in savage_init_fb_info()
2101 par->chip = S3_TWISTER; in savage_init_fb_info()
2105 par->chip = S3_TWISTER; in savage_init_fb_info()
2109 par->chip = S3_PROSAVAGEDDR; in savage_init_fb_info()
2113 par->chip = S3_PROSAVAGEDDR; in savage_init_fb_info()
2118 if (S3_SAVAGE3D_SERIES(par->chip)) { in savage_init_fb_info()
2119 par->SavageWaitIdle = savage3D_waitidle; in savage_init_fb_info()
2120 par->SavageWaitFifo = savage3D_waitfifo; in savage_init_fb_info()
2121 } else if (S3_SAVAGE4_SERIES(par->chip) || in savage_init_fb_info()
2122 S3_SUPERSAVAGE == par->chip) { in savage_init_fb_info()
2123 par->SavageWaitIdle = savage4_waitidle; in savage_init_fb_info()
2124 par->SavageWaitFifo = savage4_waitfifo; in savage_init_fb_info()
2126 par->SavageWaitIdle = savage2000_waitidle; in savage_init_fb_info()
2127 par->SavageWaitFifo = savage2000_waitfifo; in savage_init_fb_info()
2141 info->pseudo_palette = par->pseudo_palette; in savage_init_fb_info()
2171 struct savagefb_par *par; in savagefb_probe() local
2181 par = info->par; in savagefb_probe()
2182 mutex_init(&par->open_lock); in savagefb_probe()
2201 video_len = savage_init_hw(par); in savagefb_probe()
2215 savagefb_probe_i2c_connector(info, &par->edid); in savagefb_probe()
2216 fb_edid_to_monspecs(par->edid, &info->monspecs); in savagefb_probe()
2217 kfree(par->edid); in savagefb_probe()
2224 if (par->SavagePanelWidth) { in savagefb_probe()
2228 cvt_mode.xres = par->SavagePanelWidth; in savagefb_probe()
2229 cvt_mode.yres = par->SavagePanelHeight; in savagefb_probe()
2353 struct savagefb_par *par = info->par; in savagefb_suspend_late() local
2359 par->pm_state = mesg.event; in savagefb_suspend_late()
2376 savage_set_default_par(par, &par->save); in savagefb_suspend_late()
2377 savage_disable_mmio(par); in savagefb_suspend_late()
2401 struct savagefb_par *par = info->par; in savagefb_resume() local
2402 int cur_state = par->pm_state; in savagefb_resume()
2406 par->pm_state = PM_EVENT_ON; in savagefb_resume()
2417 savage_enable_mmio(par); in savagefb_resume()
2418 savage_init_hw(par); in savagefb_resume()