Lines Matching refs:GENMASK

49 #define SSCR0_DSS	GENMASK(3, 0)	/* Data Size Select (mask) */
51 #define SSCR0_FRF	GENMASK(5, 4)	/* FRame Format (mask) */
64 #define SSCR0_FRDC	GENMASK(26, 24)	/* Frame rate divider control (mask) */
77 #define SSSR_ALT_FRM_MASK	GENMASK(1, 0)	/* Masks the SFRM signal number */
88 #define SSSR_TFL_MASK	GENMASK(11, 8)	/* Transmit FIFO Level mask */
89 #define SSSR_RFL_MASK	GENMASK(15, 12)	/* Receive FIFO Level mask */
91 #define SSCR1_TFT	GENMASK(9, 6)	/* Transmit FIFO Threshold (mask) */
93 #define SSCR1_RFT	GENMASK(13, 10)	/* Receive FIFO Threshold (mask) */
99 #define CE4100_SSSR_TFL_MASK	GENMASK(9, 8)	/* Transmit FIFO Level mask */
100 #define CE4100_SSSR_RFL_MASK	GENMASK(13, 12)	/* Receive FIFO Level mask */
102 #define CE4100_SSCR1_TFT	GENMASK(7, 6)	/* Transmit FIFO Threshold (mask) */
104 #define CE4100_SSCR1_RFT	GENMASK(11, 10)	/* Receive FIFO Threshold (mask) */
111 #define QUARK_X1000_SSCR0_DSS		GENMASK(4, 0)	/* Data Size Select (mask) */
113 #define QUARK_X1000_SSCR0_FRF		GENMASK(6, 5)	/* FRame Format (mask) */
119 #define QUARK_X1000_SSSR_TFL_MASK	GENMASK(12, 8)	/* Transmit FIFO Level mask */
120 #define QUARK_X1000_SSSR_RFL_MASK	GENMASK(17, 13)	/* Receive FIFO Level mask */
122 #define QUARK_X1000_SSCR1_TFT	GENMASK(10, 6)	/* Transmit FIFO Threshold (mask) */
124 #define QUARK_X1000_SSCR1_RFT	GENMASK(15, 11)	/* Receive FIFO Threshold (mask) */
193 #define SFIFOL_TFL_MASK		GENMASK(15, 0)	/* Transmit FIFO Level mask */
194 #define SFIFOL_RFL_MASK		GENMASK(31, 16)	/* Receive FIFO Level mask */
196 #define SFIFOTT_TFT		GENMASK(15, 0)	/* Transmit FIFO Threshold (mask) */
198 #define SFIFOTT_RFT		GENMASK(31, 16)	/* Receive FIFO Threshold (mask) */