Lines Matching refs:azx_dev
60 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev, in snd_hdac_stream_init() argument
63 azx_dev->bus = bus; in snd_hdac_stream_init()
65 azx_dev->sd_addr = bus->remap_addr + (0x20 * idx + 0x80); in snd_hdac_stream_init()
67 azx_dev->sd_int_sta_mask = 1 << idx; in snd_hdac_stream_init()
68 azx_dev->index = idx; in snd_hdac_stream_init()
69 azx_dev->direction = direction; in snd_hdac_stream_init()
70 azx_dev->stream_tag = tag; in snd_hdac_stream_init()
71 snd_hdac_dsp_lock_init(azx_dev); in snd_hdac_stream_init()
72 list_add_tail(&azx_dev->list, &bus->stream_list); in snd_hdac_stream_init()
83 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start) in snd_hdac_stream_start() argument
85 struct hdac_bus *bus = azx_dev->bus; in snd_hdac_stream_start()
88 trace_snd_hdac_stream_start(bus, azx_dev); in snd_hdac_stream_start()
90 azx_dev->start_wallclk = snd_hdac_chip_readl(bus, WALLCLK); in snd_hdac_stream_start()
92 azx_dev->start_wallclk -= azx_dev->period_wallclk; in snd_hdac_stream_start()
96 1 << azx_dev->index, in snd_hdac_stream_start()
97 1 << azx_dev->index); in snd_hdac_stream_start()
99 if (azx_dev->stripe) { in snd_hdac_stream_start()
100 if (azx_dev->substream) in snd_hdac_stream_start()
101 stripe_ctl = snd_hdac_get_stream_stripe_ctl(bus, azx_dev->substream); in snd_hdac_stream_start()
104 snd_hdac_stream_updateb(azx_dev, SD_CTL_3B, SD_CTL_STRIPE_MASK, in snd_hdac_stream_start()
108 snd_hdac_stream_updateb(azx_dev, SD_CTL, in snd_hdac_stream_start()
110 azx_dev->running = true; in snd_hdac_stream_start()
118 void snd_hdac_stream_clear(struct hdac_stream *azx_dev) in snd_hdac_stream_clear() argument
120 snd_hdac_stream_updateb(azx_dev, SD_CTL, in snd_hdac_stream_clear()
122 snd_hdac_stream_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */ in snd_hdac_stream_clear()
123 if (azx_dev->stripe) in snd_hdac_stream_clear()
124 snd_hdac_stream_updateb(azx_dev, SD_CTL_3B, SD_CTL_STRIPE_MASK, 0); in snd_hdac_stream_clear()
125 azx_dev->running = false; in snd_hdac_stream_clear()
135 void snd_hdac_stream_stop(struct hdac_stream *azx_dev) in snd_hdac_stream_stop() argument
137 trace_snd_hdac_stream_stop(azx_dev->bus, azx_dev); in snd_hdac_stream_stop()
139 snd_hdac_stream_clear(azx_dev); in snd_hdac_stream_stop()
141 snd_hdac_chip_updatel(azx_dev->bus, INTCTL, 1 << azx_dev->index, 0); in snd_hdac_stream_stop()
176 void snd_hdac_stream_reset(struct hdac_stream *azx_dev) in snd_hdac_stream_reset() argument
182 snd_hdac_stream_clear(azx_dev); in snd_hdac_stream_reset()
184 dma_run_state = snd_hdac_stream_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START; in snd_hdac_stream_reset()
186 snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET); in snd_hdac_stream_reset()
190 val = snd_hdac_stream_readb(azx_dev, SD_CTL) & in snd_hdac_stream_reset()
196 if (azx_dev->bus->dma_stop_delay && dma_run_state) in snd_hdac_stream_reset()
197 udelay(azx_dev->bus->dma_stop_delay); in snd_hdac_stream_reset()
200 snd_hdac_stream_writeb(azx_dev, SD_CTL, val); in snd_hdac_stream_reset()
206 val = snd_hdac_stream_readb(azx_dev, SD_CTL) & in snd_hdac_stream_reset()
213 if (azx_dev->posbuf) in snd_hdac_stream_reset()
214 *azx_dev->posbuf = 0; in snd_hdac_stream_reset()
222 int snd_hdac_stream_setup(struct hdac_stream *azx_dev) in snd_hdac_stream_setup() argument
224 struct hdac_bus *bus = azx_dev->bus; in snd_hdac_stream_setup()
228 if (azx_dev->substream) in snd_hdac_stream_setup()
229 runtime = azx_dev->substream->runtime; in snd_hdac_stream_setup()
233 snd_hdac_stream_clear(azx_dev); in snd_hdac_stream_setup()
235 val = snd_hdac_stream_readl(azx_dev, SD_CTL); in snd_hdac_stream_setup()
237 (azx_dev->stream_tag << SD_CTL_STREAM_TAG_SHIFT); in snd_hdac_stream_setup()
240 snd_hdac_stream_writel(azx_dev, SD_CTL, val); in snd_hdac_stream_setup()
243 snd_hdac_stream_writel(azx_dev, SD_CBL, azx_dev->bufsize); in snd_hdac_stream_setup()
247 snd_hdac_stream_writew(azx_dev, SD_FORMAT, azx_dev->format_val); in snd_hdac_stream_setup()
250 snd_hdac_stream_writew(azx_dev, SD_LVI, azx_dev->frags - 1); in snd_hdac_stream_setup()
254 snd_hdac_stream_writel(azx_dev, SD_BDLPL, (u32)azx_dev->bdl.addr); in snd_hdac_stream_setup()
256 snd_hdac_stream_writel(azx_dev, SD_BDLPU, in snd_hdac_stream_setup()
257 upper_32_bits(azx_dev->bdl.addr)); in snd_hdac_stream_setup()
267 snd_hdac_stream_updatel(azx_dev, SD_CTL, 0, SD_INT_MASK); in snd_hdac_stream_setup()
269 azx_dev->fifo_size = snd_hdac_stream_readw(azx_dev, SD_FIFOSIZE) + 1; in snd_hdac_stream_setup()
276 azx_dev->delay_negative_threshold = in snd_hdac_stream_setup()
279 azx_dev->delay_negative_threshold = 0; in snd_hdac_stream_setup()
283 azx_dev->period_wallclk = (((runtime->period_size * 24000) / in snd_hdac_stream_setup()
294 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev) in snd_hdac_stream_cleanup() argument
296 snd_hdac_stream_writel(azx_dev, SD_BDLPL, 0); in snd_hdac_stream_cleanup()
297 snd_hdac_stream_writel(azx_dev, SD_BDLPU, 0); in snd_hdac_stream_cleanup()
298 snd_hdac_stream_writel(azx_dev, SD_CTL, 0); in snd_hdac_stream_cleanup()
299 azx_dev->bufsize = 0; in snd_hdac_stream_cleanup()
300 azx_dev->period_bytes = 0; in snd_hdac_stream_cleanup()
301 azx_dev->format_val = 0; in snd_hdac_stream_cleanup()
319 struct hdac_stream *azx_dev; in snd_hdac_stream_assign() local
329 list_for_each_entry(azx_dev, &bus->stream_list, list) { in snd_hdac_stream_assign()
330 if (azx_dev->direction != substream->stream) in snd_hdac_stream_assign()
332 if (azx_dev->opened) in snd_hdac_stream_assign()
334 if (azx_dev->assigned_key == key) { in snd_hdac_stream_assign()
335 res = azx_dev; in snd_hdac_stream_assign()
339 res = azx_dev; in snd_hdac_stream_assign()
358 void snd_hdac_stream_release(struct hdac_stream *azx_dev) in snd_hdac_stream_release() argument
360 struct hdac_bus *bus = azx_dev->bus; in snd_hdac_stream_release()
363 azx_dev->opened = 0; in snd_hdac_stream_release()
364 azx_dev->running = 0; in snd_hdac_stream_release()
365 azx_dev->substream = NULL; in snd_hdac_stream_release()
397 struct hdac_stream *azx_dev, __le32 **bdlp, in setup_bdle() argument
406 if (azx_dev->frags >= AZX_MAX_BDL_ENTRIES) in setup_bdle()
429 azx_dev->frags++; in setup_bdle()
443 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev) in snd_hdac_stream_setup_periods() argument
445 struct hdac_bus *bus = azx_dev->bus; in snd_hdac_stream_setup_periods()
446 struct snd_pcm_substream *substream = azx_dev->substream; in snd_hdac_stream_setup_periods()
453 snd_hdac_stream_writel(azx_dev, SD_BDLPL, 0); in snd_hdac_stream_setup_periods()
454 snd_hdac_stream_writel(azx_dev, SD_BDLPU, 0); in snd_hdac_stream_setup_periods()
456 period_bytes = azx_dev->period_bytes; in snd_hdac_stream_setup_periods()
457 periods = azx_dev->bufsize / period_bytes; in snd_hdac_stream_setup_periods()
460 bdl = (__le32 *)azx_dev->bdl.area; in snd_hdac_stream_setup_periods()
462 azx_dev->frags = 0; in snd_hdac_stream_setup_periods()
465 if (!azx_dev->no_period_wakeup && pos_adj > 0) { in snd_hdac_stream_setup_periods()
479 azx_dev, in snd_hdac_stream_setup_periods()
490 azx_dev, &bdl, ofs, in snd_hdac_stream_setup_periods()
494 azx_dev, &bdl, ofs, in snd_hdac_stream_setup_periods()
496 !azx_dev->no_period_wakeup); in snd_hdac_stream_setup_periods()
504 azx_dev->bufsize, period_bytes); in snd_hdac_stream_setup_periods()
517 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev, in snd_hdac_stream_set_params() argument
522 struct snd_pcm_substream *substream = azx_dev->substream; in snd_hdac_stream_set_params()
532 if (bufsize != azx_dev->bufsize || in snd_hdac_stream_set_params()
533 period_bytes != azx_dev->period_bytes || in snd_hdac_stream_set_params()
534 format_val != azx_dev->format_val || in snd_hdac_stream_set_params()
535 runtime->no_period_wakeup != azx_dev->no_period_wakeup) { in snd_hdac_stream_set_params()
536 azx_dev->bufsize = bufsize; in snd_hdac_stream_set_params()
537 azx_dev->period_bytes = period_bytes; in snd_hdac_stream_set_params()
538 azx_dev->format_val = format_val; in snd_hdac_stream_set_params()
539 azx_dev->no_period_wakeup = runtime->no_period_wakeup; in snd_hdac_stream_set_params()
540 err = snd_hdac_stream_setup_periods(azx_dev); in snd_hdac_stream_set_params()
550 struct hdac_stream *azx_dev = container_of(cc, struct hdac_stream, cc); in azx_cc_read() local
552 return snd_hdac_chip_readl(azx_dev->bus, WALLCLK); in azx_cc_read()
555 static void azx_timecounter_init(struct hdac_stream *azx_dev, in azx_timecounter_init() argument
558 struct timecounter *tc = &azx_dev->tc; in azx_timecounter_init()
559 struct cyclecounter *cc = &azx_dev->cc; in azx_timecounter_init()
593 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev, in snd_hdac_stream_timecounter_init() argument
596 struct hdac_bus *bus = azx_dev->bus; in snd_hdac_stream_timecounter_init()
597 struct snd_pcm_runtime *runtime = azx_dev->substream->runtime; in snd_hdac_stream_timecounter_init()
624 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set, in snd_hdac_stream_sync_trigger() argument
627 struct hdac_bus *bus = azx_dev->bus; in snd_hdac_stream_sync_trigger()
650 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start, in snd_hdac_stream_sync() argument
653 struct hdac_bus *bus = azx_dev->bus; in snd_hdac_stream_sync()
700 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format, in snd_hdac_dsp_prepare() argument
703 struct hdac_bus *bus = azx_dev->bus; in snd_hdac_dsp_prepare()
707 snd_hdac_dsp_lock(azx_dev); in snd_hdac_dsp_prepare()
709 if (azx_dev->running || azx_dev->locked) { in snd_hdac_dsp_prepare()
714 azx_dev->locked = true; in snd_hdac_dsp_prepare()
722 azx_dev->substream = NULL; in snd_hdac_dsp_prepare()
723 azx_dev->bufsize = byte_size; in snd_hdac_dsp_prepare()
724 azx_dev->period_bytes = byte_size; in snd_hdac_dsp_prepare()
725 azx_dev->format_val = format; in snd_hdac_dsp_prepare()
727 snd_hdac_stream_reset(azx_dev); in snd_hdac_dsp_prepare()
730 snd_hdac_stream_writel(azx_dev, SD_BDLPL, 0); in snd_hdac_dsp_prepare()
731 snd_hdac_stream_writel(azx_dev, SD_BDLPU, 0); in snd_hdac_dsp_prepare()
733 azx_dev->frags = 0; in snd_hdac_dsp_prepare()
734 bdl = (__le32 *)azx_dev->bdl.area; in snd_hdac_dsp_prepare()
735 err = setup_bdle(bus, bufp, azx_dev, &bdl, 0, byte_size, 0); in snd_hdac_dsp_prepare()
739 snd_hdac_stream_setup(azx_dev); in snd_hdac_dsp_prepare()
740 snd_hdac_dsp_unlock(azx_dev); in snd_hdac_dsp_prepare()
741 return azx_dev->stream_tag; in snd_hdac_dsp_prepare()
747 azx_dev->locked = false; in snd_hdac_dsp_prepare()
750 snd_hdac_dsp_unlock(azx_dev); in snd_hdac_dsp_prepare()
760 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start) in snd_hdac_dsp_trigger() argument
763 snd_hdac_stream_start(azx_dev, true); in snd_hdac_dsp_trigger()
765 snd_hdac_stream_stop(azx_dev); in snd_hdac_dsp_trigger()
774 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev, in snd_hdac_dsp_cleanup() argument
777 struct hdac_bus *bus = azx_dev->bus; in snd_hdac_dsp_cleanup()
779 if (!dmab->area || !azx_dev->locked) in snd_hdac_dsp_cleanup()
782 snd_hdac_dsp_lock(azx_dev); in snd_hdac_dsp_cleanup()
784 snd_hdac_stream_writel(azx_dev, SD_BDLPL, 0); in snd_hdac_dsp_cleanup()
785 snd_hdac_stream_writel(azx_dev, SD_BDLPU, 0); in snd_hdac_dsp_cleanup()
786 snd_hdac_stream_writel(azx_dev, SD_CTL, 0); in snd_hdac_dsp_cleanup()
787 azx_dev->bufsize = 0; in snd_hdac_dsp_cleanup()
788 azx_dev->period_bytes = 0; in snd_hdac_dsp_cleanup()
789 azx_dev->format_val = 0; in snd_hdac_dsp_cleanup()
795 azx_dev->locked = false; in snd_hdac_dsp_cleanup()
797 snd_hdac_dsp_unlock(azx_dev); in snd_hdac_dsp_cleanup()