Lines Matching refs:hw
27 struct hw hw; member
32 static u32 hw_read_20kx(struct hw *hw, u32 reg);
33 static void hw_write_20kx(struct hw *hw, u32 reg, u32 data);
34 static u32 hw_read_pci(struct hw *hw, u32 reg);
35 static void hw_write_pci(struct hw *hw, u32 reg, u32 data);
359 static int src_commit_write(struct hw *hw, unsigned int idx, void *blk) in src_commit_write() argument
367 hw_write_20kx(hw, SRCUPZ+idx*0x100+i*0x4, 0); in src_commit_write()
370 hw_write_20kx(hw, SRCDN0Z+idx*0x100+i*0x4, 0); in src_commit_write()
373 hw_write_20kx(hw, SRCDN1Z+idx*0x100+i*0x4, 0); in src_commit_write()
383 hw_write_20kx(hw, PRING_LO_HI+4*pm_idx, ctl->mpr); in src_commit_write()
384 hw_write_20kx(hw, PMOPLO+8*pm_idx, 0x3); in src_commit_write()
385 hw_write_20kx(hw, PMOPHI+8*pm_idx, 0x0); in src_commit_write()
389 hw_write_20kx(hw, SRCSA+idx*0x100, ctl->sa); in src_commit_write()
393 hw_write_20kx(hw, SRCLA+idx*0x100, ctl->la); in src_commit_write()
397 hw_write_20kx(hw, SRCCA+idx*0x100, ctl->ca); in src_commit_write()
402 hw_write_20kx(hw, SRCCF+idx*0x100, 0x0); in src_commit_write()
405 hw_write_20kx(hw, SRCCCR+idx*0x100, ctl->ccr); in src_commit_write()
409 hw_write_20kx(hw, SRCCTL+idx*0x100, ctl->ctl); in src_commit_write()
416 static int src_get_ca(struct hw *hw, unsigned int idx, void *blk) in src_get_ca() argument
420 ctl->ca = hw_read_20kx(hw, SRCCA+idx*0x100); in src_get_ca()
458 static int src_mgr_commit_write(struct hw *hw, void *blk) in src_mgr_commit_write() argument
466 ret = hw_read_20kx(hw, SRCENBSTAT); in src_mgr_commit_write()
468 hw_write_20kx(hw, SRCENBS, ctl->enbsa); in src_mgr_commit_write()
473 hw_write_20kx(hw, SRCENB+(i*0x100), ctl->enb[i]); in src_mgr_commit_write()
559 static int srcimp_mgr_commit_write(struct hw *hw, void *blk) in srcimp_mgr_commit_write() argument
564 hw_write_20kx(hw, SRCIMAP+ctl->srcimap.idx*0x100, in srcimp_mgr_commit_write()
663 static int amixer_commit_write(struct hw *hw, unsigned int idx, void *blk) in amixer_commit_write() argument
668 hw_write_20kx(hw, AMOPLO+idx*8, ctl->amoplo); in amixer_commit_write()
670 hw_write_20kx(hw, AMOPHI+idx*8, ctl->amophi); in amixer_commit_write()
878 static int dai_commit_write(struct hw *hw, unsigned int idx, void *blk) in dai_commit_write() argument
885 hw_write_20kx(hw, SRTSCTL+0x4*idx, ctl->srtctl); in dai_commit_write()
888 hw_write_20kx(hw, SRTICTL, ctl->srtctl); in dai_commit_write()
924 static int dao_commit_write(struct hw *hw, unsigned int idx, void *blk) in dao_commit_write() argument
931 hw_write_20kx(hw, SPOS+0x4*idx, ctl->spos); in dao_commit_write()
1098 static int daio_mgr_commit_write(struct hw *hw, void *blk) in daio_mgr_commit_write() argument
1111 hw_write_20kx(hw, I2SCTL, ctl->i2sctl); in daio_mgr_commit_write()
1119 hw_write_20kx(hw, SPOCTL, ctl->spoctl); in daio_mgr_commit_write()
1127 hw_write_20kx(hw, SPICTL, ctl->spictl); in daio_mgr_commit_write()
1131 hw_write_20kx(hw, DAOIMAP+ctl->daoimap.idx*4, in daio_mgr_commit_write()
1139 static int daio_mgr_get_ctrl_blk(struct hw *hw, void **rblk) in daio_mgr_get_ctrl_blk() argument
1148 blk->i2sctl = hw_read_20kx(hw, I2SCTL); in daio_mgr_get_ctrl_blk()
1149 blk->spoctl = hw_read_20kx(hw, SPOCTL); in daio_mgr_get_ctrl_blk()
1150 blk->spictl = hw_read_20kx(hw, SPICTL); in daio_mgr_get_ctrl_blk()
1165 static int set_timer_irq(struct hw *hw, int enable) in set_timer_irq() argument
1167 hw_write_20kx(hw, GIE, enable ? IT_INT : 0); in set_timer_irq()
1171 static int set_timer_tick(struct hw *hw, unsigned int ticks) in set_timer_tick() argument
1175 hw_write_20kx(hw, TIMR, ticks); in set_timer_tick()
1179 static unsigned int get_wc(struct hw *hw) in get_wc() argument
1181 return hw_read_20kx(hw, WC); in get_wc()
1203 static int hw_daio_init(struct hw *hw, const struct daio_conf *info) in hw_daio_init() argument
1218 hw_write_20kx(hw, SPOCTL, 0x0); in hw_daio_init()
1239 hw_write_20kx(hw, I2SCTL, i2sorg); in hw_daio_init()
1240 hw_write_20kx(hw, SPOCTL, spdorg); in hw_daio_init()
1244 hw_write_20kx(hw, SPICTL, 0x0); in hw_daio_init()
1247 hw_write_20kx(hw, SPICTL, spdorg); in hw_daio_init()
1254 static int hw_trn_init(struct hw *hw, const struct trn_conf *info) in hw_trn_init() argument
1261 dev_err(hw->card->dev, in hw_trn_init()
1276 hw_write_20kx(hw, PTPALX, ptp_phys_low); in hw_trn_init()
1277 hw_write_20kx(hw, PTPAHX, ptp_phys_high); in hw_trn_init()
1278 hw_write_20kx(hw, TRNCTL, trnctl); in hw_trn_init()
1279 hw_write_20kx(hw, TRNIS, 0x200c01); /* really needed? */ in hw_trn_init()
1307 static int hw_pll_init(struct hw *hw, unsigned int rsr) in hw_pll_init() argument
1314 if (hw_read_20kx(hw, PLLCTL) == pllctl) in hw_pll_init()
1317 hw_write_20kx(hw, PLLCTL, pllctl); in hw_pll_init()
1321 dev_alert(hw->card->dev, "PLL initialization failed!!!\n"); in hw_pll_init()
1328 static int hw_auto_init(struct hw *hw) in hw_auto_init() argument
1333 gctl = hw_read_20kx(hw, GCTL); in hw_auto_init()
1335 hw_write_20kx(hw, GCTL, gctl); in hw_auto_init()
1337 hw_write_20kx(hw, GCTL, gctl); in hw_auto_init()
1340 gctl = hw_read_20kx(hw, GCTL); in hw_auto_init()
1345 dev_alert(hw->card->dev, "Card Auto-init failed!!!\n"); in hw_auto_init()
1352 static int i2c_unlock(struct hw *hw) in i2c_unlock() argument
1354 if ((hw_read_pci(hw, 0xcc) & 0xff) == 0xaa) in i2c_unlock()
1357 hw_write_pci(hw, 0xcc, 0x8c); in i2c_unlock()
1358 hw_write_pci(hw, 0xcc, 0x0e); in i2c_unlock()
1359 if ((hw_read_pci(hw, 0xcc) & 0xff) == 0xaa) in i2c_unlock()
1362 hw_write_pci(hw, 0xcc, 0xee); in i2c_unlock()
1363 hw_write_pci(hw, 0xcc, 0xaa); in i2c_unlock()
1364 if ((hw_read_pci(hw, 0xcc) & 0xff) == 0xaa) in i2c_unlock()
1370 static void i2c_lock(struct hw *hw) in i2c_lock() argument
1372 if ((hw_read_pci(hw, 0xcc) & 0xff) == 0xaa) in i2c_lock()
1373 hw_write_pci(hw, 0xcc, 0x00); in i2c_lock()
1376 static void i2c_write(struct hw *hw, u32 device, u32 addr, u32 data) in i2c_write() argument
1381 ret = hw_read_pci(hw, 0xEC); in i2c_write()
1383 hw_write_pci(hw, 0xE0, device); in i2c_write()
1384 hw_write_pci(hw, 0xE4, (data << 8) | (addr & 0xff)); in i2c_write()
1389 static int hw_reset_dac(struct hw *hw) in hw_reset_dac() argument
1395 if (i2c_unlock(hw)) in hw_reset_dac()
1399 ret = hw_read_pci(hw, 0xEC); in hw_reset_dac()
1401 hw_write_pci(hw, 0xEC, 0x05); /* write to i2c status control */ in hw_reset_dac()
1407 gpioorg = (u16)hw_read_20kx(hw, GPIO); in hw_reset_dac()
1409 hw_write_20kx(hw, GPIO, gpioorg); in hw_reset_dac()
1411 hw_write_20kx(hw, GPIO, gpioorg | 0x2); in hw_reset_dac()
1414 i2c_write(hw, 0x00180080, 0x01, 0x80); in hw_reset_dac()
1415 i2c_write(hw, 0x00180080, 0x02, 0x10); in hw_reset_dac()
1417 i2c_lock(hw); in hw_reset_dac()
1422 static int hw_dac_init(struct hw *hw, const struct dac_conf *info) in hw_dac_init() argument
1428 if (hw->model == CTSB055X) { in hw_dac_init()
1430 gpioorg = (u16)hw_read_20kx(hw, GPIO); in hw_dac_init()
1433 hw_write_20kx(hw, GPIO, gpioorg); in hw_dac_init()
1438 gpioorg = (u16)hw_read_20kx(hw, GPIO); in hw_dac_init()
1440 hw_write_20kx(hw, GPIO, gpioorg); in hw_dac_init()
1442 hw_reset_dac(hw); in hw_dac_init()
1444 if (i2c_unlock(hw)) in hw_dac_init()
1447 hw_write_pci(hw, 0xEC, 0x05); /* write to i2c status control */ in hw_dac_init()
1449 ret = hw_read_pci(hw, 0xEC); in hw_dac_init()
1467 i2c_write(hw, 0x00180080, 0x06, data); in hw_dac_init()
1468 i2c_write(hw, 0x00180080, 0x09, data); in hw_dac_init()
1469 i2c_write(hw, 0x00180080, 0x0c, data); in hw_dac_init()
1470 i2c_write(hw, 0x00180080, 0x0f, data); in hw_dac_init()
1472 i2c_lock(hw); in hw_dac_init()
1475 gpioorg = (u16)hw_read_20kx(hw, GPIO); in hw_dac_init()
1477 hw_write_20kx(hw, GPIO, gpioorg); in hw_dac_init()
1484 static int is_adc_input_selected_SB055x(struct hw *hw, enum ADCSRC type) in is_adc_input_selected_SB055x() argument
1489 static int is_adc_input_selected_SBx(struct hw *hw, enum ADCSRC type) in is_adc_input_selected_SBx() argument
1493 data = hw_read_20kx(hw, GPIO); in is_adc_input_selected_SBx()
1510 static int is_adc_input_selected_hendrix(struct hw *hw, enum ADCSRC type) in is_adc_input_selected_hendrix() argument
1514 data = hw_read_20kx(hw, GPIO); in is_adc_input_selected_hendrix()
1528 static int hw_is_adc_input_selected(struct hw *hw, enum ADCSRC type) in hw_is_adc_input_selected() argument
1530 switch (hw->model) { in hw_is_adc_input_selected()
1532 return is_adc_input_selected_SB055x(hw, type); in hw_is_adc_input_selected()
1534 return is_adc_input_selected_hendrix(hw, type); in hw_is_adc_input_selected()
1536 return is_adc_input_selected_hendrix(hw, type); in hw_is_adc_input_selected()
1538 return is_adc_input_selected_SBx(hw, type); in hw_is_adc_input_selected()
1543 adc_input_select_SB055x(struct hw *hw, enum ADCSRC type, unsigned char boost) in adc_input_select_SB055x() argument
1556 data = hw_read_20kx(hw, GPIO); in adc_input_select_SB055x()
1576 hw_write_20kx(hw, GPIO, data); in adc_input_select_SB055x()
1583 adc_input_select_SBx(struct hw *hw, enum ADCSRC type, unsigned char boost) in adc_input_select_SBx() argument
1589 if (i2c_unlock(hw)) in adc_input_select_SBx()
1593 ret = hw_read_pci(hw, 0xEC); in adc_input_select_SBx()
1596 hw_write_pci(hw, 0xEC, 0x05); in adc_input_select_SBx()
1598 data = hw_read_20kx(hw, GPIO); in adc_input_select_SBx()
1614 i2c_lock(hw); in adc_input_select_SBx()
1617 hw_write_20kx(hw, GPIO, data); in adc_input_select_SBx()
1618 i2c_write(hw, 0x001a0080, 0x2a, i2c_data); in adc_input_select_SBx()
1620 i2c_write(hw, 0x001a0080, 0x1c, 0xe7); /* +12dB boost */ in adc_input_select_SBx()
1621 i2c_write(hw, 0x001a0080, 0x1e, 0xe7); /* +12dB boost */ in adc_input_select_SBx()
1623 i2c_write(hw, 0x001a0080, 0x1c, 0xcf); /* No boost */ in adc_input_select_SBx()
1624 i2c_write(hw, 0x001a0080, 0x1e, 0xcf); /* No boost */ in adc_input_select_SBx()
1627 i2c_lock(hw); in adc_input_select_SBx()
1633 adc_input_select_hendrix(struct hw *hw, enum ADCSRC type, unsigned char boost) in adc_input_select_hendrix() argument
1639 if (i2c_unlock(hw)) in adc_input_select_hendrix()
1643 ret = hw_read_pci(hw, 0xEC); in adc_input_select_hendrix()
1646 hw_write_pci(hw, 0xEC, 0x05); in adc_input_select_hendrix()
1648 data = hw_read_20kx(hw, GPIO); in adc_input_select_hendrix()
1659 i2c_lock(hw); in adc_input_select_hendrix()
1662 hw_write_20kx(hw, GPIO, data); in adc_input_select_hendrix()
1663 i2c_write(hw, 0x001a0080, 0x2a, i2c_data); in adc_input_select_hendrix()
1665 i2c_write(hw, 0x001a0080, 0x1c, 0xe7); /* +12dB boost */ in adc_input_select_hendrix()
1666 i2c_write(hw, 0x001a0080, 0x1e, 0xe7); /* +12dB boost */ in adc_input_select_hendrix()
1668 i2c_write(hw, 0x001a0080, 0x1c, 0xcf); /* No boost */ in adc_input_select_hendrix()
1669 i2c_write(hw, 0x001a0080, 0x1e, 0xcf); /* No boost */ in adc_input_select_hendrix()
1672 i2c_lock(hw); in adc_input_select_hendrix()
1677 static int hw_adc_input_select(struct hw *hw, enum ADCSRC type) in hw_adc_input_select() argument
1681 switch (hw->model) { in hw_adc_input_select()
1683 return adc_input_select_SB055x(hw, type, state); in hw_adc_input_select()
1685 return adc_input_select_hendrix(hw, type, state); in hw_adc_input_select()
1687 return adc_input_select_hendrix(hw, type, state); in hw_adc_input_select()
1689 return adc_input_select_SBx(hw, type, state); in hw_adc_input_select()
1693 static int adc_init_SB055x(struct hw *hw, int input, int mic20db) in adc_init_SB055x() argument
1695 return adc_input_select_SB055x(hw, input, mic20db); in adc_init_SB055x()
1698 static int adc_init_SBx(struct hw *hw, int input, int mic20db) in adc_init_SBx() argument
1729 if (i2c_unlock(hw)) in adc_init_SBx()
1733 ret = hw_read_pci(hw, 0xEC); in adc_init_SBx()
1735 hw_write_pci(hw, 0xEC, 0x05); /* write to i2c status control */ in adc_init_SBx()
1737 i2c_write(hw, 0x001a0080, 0x0e, 0x08); in adc_init_SBx()
1738 i2c_write(hw, 0x001a0080, 0x18, 0x0a); in adc_init_SBx()
1739 i2c_write(hw, 0x001a0080, 0x28, 0x86); in adc_init_SBx()
1740 i2c_write(hw, 0x001a0080, 0x2a, adcdata); in adc_init_SBx()
1743 i2c_write(hw, 0x001a0080, 0x1c, 0xf7); in adc_init_SBx()
1744 i2c_write(hw, 0x001a0080, 0x1e, 0xf7); in adc_init_SBx()
1746 i2c_write(hw, 0x001a0080, 0x1c, 0xcf); in adc_init_SBx()
1747 i2c_write(hw, 0x001a0080, 0x1e, 0xcf); in adc_init_SBx()
1750 if (!(hw_read_20kx(hw, ID0) & 0x100)) in adc_init_SBx()
1751 i2c_write(hw, 0x001a0080, 0x16, 0x26); in adc_init_SBx()
1753 i2c_lock(hw); in adc_init_SBx()
1755 gpioorg = (u16)hw_read_20kx(hw, GPIO); in adc_init_SBx()
1758 hw_write_20kx(hw, GPIO, gpioorg); in adc_init_SBx()
1763 static int hw_adc_init(struct hw *hw, const struct adc_conf *info) in hw_adc_init() argument
1765 if (hw->model == CTSB055X) in hw_adc_init()
1766 return adc_init_SB055x(hw, info->input, info->mic20db); in hw_adc_init()
1768 return adc_init_SBx(hw, info->input, info->mic20db); in hw_adc_init()
1771 static struct capabilities hw_capabilities(struct hw *hw) in hw_capabilities() argument
1776 cap.digit_io_switch = !(hw->model == CTSB073X || hw->model == CTUAA); in hw_capabilities()
1879 struct hw *hw = dev_id; in ct_20k1_interrupt() local
1882 status = hw_read_20kx(hw, GIP); in ct_20k1_interrupt()
1886 if (hw->irq_callback) in ct_20k1_interrupt()
1887 hw->irq_callback(hw->irq_callback_data, status); in ct_20k1_interrupt()
1889 hw_write_20kx(hw, GIP, status); in ct_20k1_interrupt()
1893 static int hw_card_start(struct hw *hw) in hw_card_start() argument
1896 struct pci_dev *pci = hw->pci; in hw_card_start()
1907 if (!hw->io_base) { in hw_card_start()
1912 if (hw->model == CTUAA) in hw_card_start()
1913 hw->io_base = pci_resource_start(pci, 5); in hw_card_start()
1915 hw->io_base = pci_resource_start(pci, 0); in hw_card_start()
1920 if (hw->model == CTUAA) { in hw_card_start()
1927 if (hw->irq < 0) { in hw_card_start()
1929 KBUILD_MODNAME, hw); in hw_card_start()
1931 dev_err(hw->card->dev, in hw_card_start()
1935 hw->irq = pci->irq; in hw_card_start()
1936 hw->card->sync_irq = hw->irq; in hw_card_start()
1945 hw->io_base = 0; in hw_card_start()
1951 static int hw_card_stop(struct hw *hw) in hw_card_stop() argument
1956 hw_write_20kx(hw, TRNCTL, 0x00); in hw_card_stop()
1959 data = hw_read_20kx(hw, PLLCTL); in hw_card_stop()
1960 hw_write_20kx(hw, PLLCTL, (data & (~(0x0F<<12)))); in hw_card_stop()
1965 static int hw_card_shutdown(struct hw *hw) in hw_card_shutdown() argument
1967 if (hw->irq >= 0) in hw_card_shutdown()
1968 free_irq(hw->irq, hw); in hw_card_shutdown()
1970 hw->irq = -1; in hw_card_shutdown()
1971 iounmap(hw->mem_base); in hw_card_shutdown()
1972 hw->mem_base = NULL; in hw_card_shutdown()
1974 if (hw->io_base) in hw_card_shutdown()
1975 pci_release_regions(hw->pci); in hw_card_shutdown()
1977 hw->io_base = 0; in hw_card_shutdown()
1979 pci_disable_device(hw->pci); in hw_card_shutdown()
1984 static int hw_card_init(struct hw *hw, struct card_conf *info) in hw_card_init() argument
1995 err = hw_card_start(hw); in hw_card_init()
2000 err = hw_pll_init(hw, info->rsr); in hw_card_init()
2005 err = hw_auto_init(hw); in hw_card_init()
2010 gctl = hw_read_20kx(hw, GCTL); in hw_card_init()
2016 hw_write_20kx(hw, GCTL, gctl); in hw_card_init()
2020 hw_write_20kx(hw, GIE, 0); in hw_card_init()
2022 hw_write_20kx(hw, SRCIP, 0); in hw_card_init()
2026 switch (hw->model) { in hw_card_init()
2028 hw_write_20kx(hw, GPIOCTL, 0x13fe); in hw_card_init()
2031 hw_write_20kx(hw, GPIOCTL, 0x00e6); in hw_card_init()
2034 hw_write_20kx(hw, GPIOCTL, 0x00c2); in hw_card_init()
2037 hw_write_20kx(hw, GPIOCTL, 0x01e6); in hw_card_init()
2042 err = hw_trn_init(hw, &trn_info); in hw_card_init()
2047 err = hw_daio_init(hw, &daio_info); in hw_card_init()
2052 err = hw_dac_init(hw, &dac_info); in hw_card_init()
2059 err = hw_adc_init(hw, &adc_info); in hw_card_init()
2063 data = hw_read_20kx(hw, SRCMCTL); in hw_card_init()
2065 hw_write_20kx(hw, SRCMCTL, data); in hw_card_init()
2071 static int hw_suspend(struct hw *hw) in hw_suspend() argument
2073 struct pci_dev *pci = hw->pci; in hw_suspend()
2075 hw_card_stop(hw); in hw_suspend()
2077 if (hw->model == CTUAA) { in hw_suspend()
2085 static int hw_resume(struct hw *hw, struct card_conf *info) in hw_resume() argument
2088 return hw_card_init(hw, info); in hw_resume()
2092 static u32 hw_read_20kx(struct hw *hw, u32 reg) in hw_read_20kx() argument
2098 &container_of(hw, struct hw20k1, hw)->reg_20k1_lock, flags); in hw_read_20kx()
2099 outl(reg, hw->io_base + 0x0); in hw_read_20kx()
2100 value = inl(hw->io_base + 0x4); in hw_read_20kx()
2102 &container_of(hw, struct hw20k1, hw)->reg_20k1_lock, flags); in hw_read_20kx()
2107 static void hw_write_20kx(struct hw *hw, u32 reg, u32 data) in hw_write_20kx() argument
2112 &container_of(hw, struct hw20k1, hw)->reg_20k1_lock, flags); in hw_write_20kx()
2113 outl(reg, hw->io_base + 0x0); in hw_write_20kx()
2114 outl(data, hw->io_base + 0x4); in hw_write_20kx()
2116 &container_of(hw, struct hw20k1, hw)->reg_20k1_lock, flags); in hw_write_20kx()
2120 static u32 hw_read_pci(struct hw *hw, u32 reg) in hw_read_pci() argument
2126 &container_of(hw, struct hw20k1, hw)->reg_pci_lock, flags); in hw_read_pci()
2127 outl(reg, hw->io_base + 0x10); in hw_read_pci()
2128 value = inl(hw->io_base + 0x14); in hw_read_pci()
2130 &container_of(hw, struct hw20k1, hw)->reg_pci_lock, flags); in hw_read_pci()
2135 static void hw_write_pci(struct hw *hw, u32 reg, u32 data) in hw_write_pci() argument
2140 &container_of(hw, struct hw20k1, hw)->reg_pci_lock, flags); in hw_write_pci()
2141 outl(reg, hw->io_base + 0x10); in hw_write_pci()
2142 outl(data, hw->io_base + 0x14); in hw_write_pci()
2144 &container_of(hw, struct hw20k1, hw)->reg_pci_lock, flags); in hw_write_pci()
2147 static const struct hw ct20k1_preset = {
2251 int create_20k1_hw_obj(struct hw **rhw) in create_20k1_hw_obj()
2263 hw20k1->hw = ct20k1_preset; in create_20k1_hw_obj()
2265 *rhw = &hw20k1->hw; in create_20k1_hw_obj()
2270 int destroy_20k1_hw_obj(struct hw *hw) in destroy_20k1_hw_obj() argument
2272 if (hw->io_base) in destroy_20k1_hw_obj()
2273 hw_card_shutdown(hw); in destroy_20k1_hw_obj()
2275 kfree(container_of(hw, struct hw20k1, hw)); in destroy_20k1_hw_obj()