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1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2016 Intel Corporation
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22  * IN THE SOFTWARE.
23  *
24  */
25 
26 #ifndef __I915_VMA_TYPES_H__
27 #define __I915_VMA_TYPES_H__
28 
29 #include <linux/rbtree.h>
30 
31 #include <drm/drm_mm.h>
32 
33 #include "gem/i915_gem_object_types.h"
34 
35 enum i915_cache_level;
36 
37 /**
38  * DOC: Global GTT views
39  *
40  * Background and previous state
41  *
42  * Historically objects could exists (be bound) in global GTT space only as
43  * singular instances with a view representing all of the object's backing pages
44  * in a linear fashion. This view will be called a normal view.
45  *
46  * To support multiple views of the same object, where the number of mapped
47  * pages is not equal to the backing store, or where the layout of the pages
48  * is not linear, concept of a GGTT view was added.
49  *
50  * One example of an alternative view is a stereo display driven by a single
51  * image. In this case we would have a framebuffer looking like this
52  * (2x2 pages):
53  *
54  *    12
55  *    34
56  *
57  * Above would represent a normal GGTT view as normally mapped for GPU or CPU
58  * rendering. In contrast, fed to the display engine would be an alternative
59  * view which could look something like this:
60  *
61  *   1212
62  *   3434
63  *
64  * In this example both the size and layout of pages in the alternative view is
65  * different from the normal view.
66  *
67  * Implementation and usage
68  *
69  * GGTT views are implemented using VMAs and are distinguished via enum
70  * i915_ggtt_view_type and struct i915_ggtt_view.
71  *
72  * A new flavour of core GEM functions which work with GGTT bound objects were
73  * added with the _ggtt_ infix, and sometimes with _view postfix to avoid
74  * renaming  in large amounts of code. They take the struct i915_ggtt_view
75  * parameter encapsulating all metadata required to implement a view.
76  *
77  * As a helper for callers which are only interested in the normal view,
78  * globally const i915_ggtt_view_normal singleton instance exists. All old core
79  * GEM API functions, the ones not taking the view parameter, are operating on,
80  * or with the normal GGTT view.
81  *
82  * Code wanting to add or use a new GGTT view needs to:
83  *
84  * 1. Add a new enum with a suitable name.
85  * 2. Extend the metadata in the i915_ggtt_view structure if required.
86  * 3. Add support to i915_get_vma_pages().
87  *
88  * New views are required to build a scatter-gather table from within the
89  * i915_get_vma_pages function. This table is stored in the vma.ggtt_view and
90  * exists for the lifetime of an VMA.
91  *
92  * Core API is designed to have copy semantics which means that passed in
93  * struct i915_ggtt_view does not need to be persistent (left around after
94  * calling the core API functions).
95  *
96  */
97 
98 struct intel_remapped_plane_info {
99 	/* in gtt pages */
100 	u32 offset;
101 	u16 width;
102 	u16 height;
103 	u16 src_stride;
104 	u16 dst_stride;
105 } __packed;
106 
107 struct intel_remapped_info {
108 	struct intel_remapped_plane_info plane[2];
109 	u32 unused_mbz;
110 } __packed;
111 
112 struct intel_rotation_info {
113 	struct intel_remapped_plane_info plane[2];
114 } __packed;
115 
116 struct intel_partial_info {
117 	u64 offset;
118 	unsigned int size;
119 } __packed;
120 
121 enum i915_ggtt_view_type {
122 	I915_GGTT_VIEW_NORMAL = 0,
123 	I915_GGTT_VIEW_ROTATED = sizeof(struct intel_rotation_info),
124 	I915_GGTT_VIEW_PARTIAL = sizeof(struct intel_partial_info),
125 	I915_GGTT_VIEW_REMAPPED = sizeof(struct intel_remapped_info),
126 };
127 
assert_i915_gem_gtt_types(void)128 static inline void assert_i915_gem_gtt_types(void)
129 {
130 	BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 2 * sizeof(u32) + 8 * sizeof(u16));
131 	BUILD_BUG_ON(sizeof(struct intel_partial_info) != sizeof(u64) + sizeof(unsigned int));
132 	BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 3 * sizeof(u32) + 8 * sizeof(u16));
133 
134 	/* Check that rotation/remapped shares offsets for simplicity */
135 	BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) !=
136 		     offsetof(struct intel_rotation_info, plane[0]));
137 	BUILD_BUG_ON(offsetofend(struct intel_remapped_info, plane[1]) !=
138 		     offsetofend(struct intel_rotation_info, plane[1]));
139 
140 	/* As we encode the size of each branch inside the union into its type,
141 	 * we have to be careful that each branch has a unique size.
142 	 */
143 	switch ((enum i915_ggtt_view_type)0) {
144 	case I915_GGTT_VIEW_NORMAL:
145 	case I915_GGTT_VIEW_PARTIAL:
146 	case I915_GGTT_VIEW_ROTATED:
147 	case I915_GGTT_VIEW_REMAPPED:
148 		/* gcc complains if these are identical cases */
149 		break;
150 	}
151 }
152 
153 struct i915_ggtt_view {
154 	enum i915_ggtt_view_type type;
155 	union {
156 		/* Members need to contain no holes/padding */
157 		struct intel_partial_info partial;
158 		struct intel_rotation_info rotated;
159 		struct intel_remapped_info remapped;
160 	};
161 };
162 
163 /**
164  * DOC: Virtual Memory Address
165  *
166  * A VMA represents a GEM BO that is bound into an address space. Therefore, a
167  * VMA's presence cannot be guaranteed before binding, or after unbinding the
168  * object into/from the address space.
169  *
170  * To make things as simple as possible (ie. no refcounting), a VMA's lifetime
171  * will always be <= an objects lifetime. So object refcounting should cover us.
172  */
173 struct i915_vma {
174 	struct drm_mm_node node;
175 
176 	struct i915_address_space *vm;
177 	const struct i915_vma_ops *ops;
178 
179 	struct drm_i915_gem_object *obj;
180 	struct dma_resv *resv; /** Alias of obj->resv */
181 
182 	struct sg_table *pages;
183 	void __iomem *iomap;
184 	void *private; /* owned by creator */
185 
186 	struct i915_fence_reg *fence;
187 
188 	u64 size;
189 	u64 display_alignment;
190 	struct i915_page_sizes page_sizes;
191 
192 	/* mmap-offset associated with fencing for this vma */
193 	struct i915_mmap_offset	*mmo;
194 
195 	u32 fence_size;
196 	u32 fence_alignment;
197 
198 	/**
199 	 * Count of the number of times this vma has been opened by different
200 	 * handles (but same file) for execbuf, i.e. the number of aliases
201 	 * that exist in the ctx->handle_vmas LUT for this vma.
202 	 */
203 	struct kref ref;
204 	atomic_t open_count;
205 	atomic_t flags;
206 	/**
207 	 * How many users have pinned this object in GTT space.
208 	 *
209 	 * This is a tightly bound, fairly small number of users, so we
210 	 * stuff inside the flags field so that we can both check for overflow
211 	 * and detect a no-op i915_vma_pin() in a single check, while also
212 	 * pinning the vma.
213 	 *
214 	 * The worst case display setup would have the same vma pinned for
215 	 * use on each plane on each crtc, while also building the next atomic
216 	 * state and holding a pin for the length of the cleanup queue. In the
217 	 * future, the flip queue may be increased from 1.
218 	 * Estimated worst case: 3 [qlen] * 4 [max crtcs] * 7 [max planes] = 84
219 	 *
220 	 * For GEM, the number of concurrent users for pwrite/pread is
221 	 * unbounded. For execbuffer, it is currently one but will in future
222 	 * be extended to allow multiple clients to pin vma concurrently.
223 	 *
224 	 * We also use suballocated pages, with each suballocation claiming
225 	 * its own pin on the shared vma. At present, this is limited to
226 	 * exclusive cachelines of a single page, so a maximum of 64 possible
227 	 * users.
228 	 */
229 #define I915_VMA_PIN_MASK 0x3ff
230 #define I915_VMA_OVERFLOW 0x200
231 
232 	/** Flags and address space this VMA is bound to */
233 #define I915_VMA_GLOBAL_BIND_BIT 10
234 #define I915_VMA_LOCAL_BIND_BIT  11
235 
236 #define I915_VMA_GLOBAL_BIND	((int)BIT(I915_VMA_GLOBAL_BIND_BIT))
237 #define I915_VMA_LOCAL_BIND	((int)BIT(I915_VMA_LOCAL_BIND_BIT))
238 
239 #define I915_VMA_BIND_MASK (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND)
240 
241 #define I915_VMA_ALLOC_BIT	12
242 
243 #define I915_VMA_ERROR_BIT	13
244 #define I915_VMA_ERROR		((int)BIT(I915_VMA_ERROR_BIT))
245 
246 #define I915_VMA_GGTT_BIT	14
247 #define I915_VMA_CAN_FENCE_BIT	15
248 #define I915_VMA_USERFAULT_BIT	16
249 #define I915_VMA_GGTT_WRITE_BIT	17
250 
251 #define I915_VMA_GGTT		((int)BIT(I915_VMA_GGTT_BIT))
252 #define I915_VMA_CAN_FENCE	((int)BIT(I915_VMA_CAN_FENCE_BIT))
253 #define I915_VMA_USERFAULT	((int)BIT(I915_VMA_USERFAULT_BIT))
254 #define I915_VMA_GGTT_WRITE	((int)BIT(I915_VMA_GGTT_WRITE_BIT))
255 
256 #define I915_VMA_SCANOUT_BIT	18
257 #define I915_VMA_SCANOUT	((int)BIT(I915_VMA_SCANOUT_BIT))
258 
259 	struct i915_active active;
260 
261 #define I915_VMA_PAGES_BIAS 24
262 #define I915_VMA_PAGES_ACTIVE (BIT(24) | 1)
263 	atomic_t pages_count; /* number of active binds to the pages */
264 	struct mutex pages_mutex; /* protect acquire/release of backing pages */
265 
266 	/**
267 	 * Support different GGTT views into the same object.
268 	 * This means there can be multiple VMA mappings per object and per VM.
269 	 * i915_ggtt_view_type is used to distinguish between those entries.
270 	 * The default one of zero (I915_GGTT_VIEW_NORMAL) is default and also
271 	 * assumed in GEM functions which take no ggtt view parameter.
272 	 */
273 	struct i915_ggtt_view ggtt_view;
274 
275 	/** This object's place on the active/inactive lists */
276 	struct list_head vm_link;
277 
278 	struct list_head obj_link; /* Link in the object's VMA list */
279 	struct rb_node obj_node;
280 	struct hlist_node obj_hash;
281 
282 	/** This vma's place in the eviction list */
283 	struct list_head evict_link;
284 
285 	struct list_head closed_link;
286 };
287 
288 #endif
289