1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Based on arch/arm/include/asm/memory.h
4 *
5 * Copyright (C) 2000-2002 Russell King
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * Note: this file should not be included by non-asm/.h files
9 */
10 #ifndef __ASM_MEMORY_H
11 #define __ASM_MEMORY_H
12
13 #include <linux/const.h>
14 #include <linux/sizes.h>
15 #include <asm/page-def.h>
16
17 /*
18 * Size of the PCI I/O space. This must remain a power of two so that
19 * IO_SPACE_LIMIT acts as a mask for the low bits of I/O addresses.
20 */
21 #define PCI_IO_SIZE SZ_16M
22
23 /*
24 * VMEMMAP_SIZE - allows the whole linear region to be covered by
25 * a struct page array
26 *
27 * If we are configured with a 52-bit kernel VA then our VMEMMAP_SIZE
28 * needs to cover the memory region from the beginning of the 52-bit
29 * PAGE_OFFSET all the way to PAGE_END for 48-bit. This allows us to
30 * keep a constant PAGE_OFFSET and "fallback" to using the higher end
31 * of the VMEMMAP where 52-bit support is not available in hardware.
32 */
33 #define VMEMMAP_SHIFT (PAGE_SHIFT - STRUCT_PAGE_MAX_SHIFT)
34 #define VMEMMAP_SIZE ((_PAGE_END(VA_BITS_MIN) - PAGE_OFFSET) >> VMEMMAP_SHIFT)
35
36 /*
37 * PAGE_OFFSET - the virtual address of the start of the linear map, at the
38 * start of the TTBR1 address space.
39 * PAGE_END - the end of the linear map, where all other kernel mappings begin.
40 * KIMAGE_VADDR - the virtual address of the start of the kernel image.
41 * VA_BITS - the maximum number of bits for virtual addresses.
42 */
43 #define VA_BITS (CONFIG_ARM64_VA_BITS)
44 #define _PAGE_OFFSET(va) (-(UL(1) << (va)))
45 #define PAGE_OFFSET (_PAGE_OFFSET(VA_BITS))
46 #define KIMAGE_VADDR (MODULES_END)
47 #define MODULES_END (MODULES_VADDR + MODULES_VSIZE)
48 #define MODULES_VADDR (_PAGE_END(VA_BITS_MIN))
49 #define MODULES_VSIZE (SZ_128M)
50 #define VMEMMAP_START (-(UL(1) << (VA_BITS - VMEMMAP_SHIFT)))
51 #define VMEMMAP_END (VMEMMAP_START + VMEMMAP_SIZE)
52 #define PCI_IO_END (VMEMMAP_START - SZ_8M)
53 #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
54 #define FIXADDR_TOP (VMEMMAP_START - SZ_32M)
55
56 #if VA_BITS > 48
57 #define VA_BITS_MIN (48)
58 #else
59 #define VA_BITS_MIN (VA_BITS)
60 #endif
61
62 #define _PAGE_END(va) (-(UL(1) << ((va) - 1)))
63
64 #define KERNEL_START _text
65 #define KERNEL_END _end
66
67 /*
68 * Generic and tag-based KASAN require 1/8th and 1/16th of the kernel virtual
69 * address space for the shadow region respectively. They can bloat the stack
70 * significantly, so double the (minimum) stack size when they are in use.
71 */
72 #if defined(CONFIG_KASAN_GENERIC) || defined(CONFIG_KASAN_SW_TAGS)
73 #define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL)
74 #define KASAN_SHADOW_END ((UL(1) << (64 - KASAN_SHADOW_SCALE_SHIFT)) \
75 + KASAN_SHADOW_OFFSET)
76 #define PAGE_END (KASAN_SHADOW_END - (1UL << (vabits_actual - KASAN_SHADOW_SCALE_SHIFT)))
77 #define KASAN_THREAD_SHIFT 1
78 #else
79 #define KASAN_THREAD_SHIFT 0
80 #define PAGE_END (_PAGE_END(VA_BITS_MIN))
81 #endif /* CONFIG_KASAN */
82
83 #define MIN_THREAD_SHIFT (14 + KASAN_THREAD_SHIFT)
84
85 /*
86 * VMAP'd stacks are allocated at page granularity, so we must ensure that such
87 * stacks are a multiple of page size.
88 */
89 #if defined(CONFIG_VMAP_STACK) && (MIN_THREAD_SHIFT < PAGE_SHIFT)
90 #define THREAD_SHIFT PAGE_SHIFT
91 #else
92 #define THREAD_SHIFT MIN_THREAD_SHIFT
93 #endif
94
95 #if THREAD_SHIFT >= PAGE_SHIFT
96 #define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT)
97 #endif
98
99 #define THREAD_SIZE (UL(1) << THREAD_SHIFT)
100
101 /*
102 * By aligning VMAP'd stacks to 2 * THREAD_SIZE, we can detect overflow by
103 * checking sp & (1 << THREAD_SHIFT), which we can do cheaply in the entry
104 * assembly.
105 */
106 #ifdef CONFIG_VMAP_STACK
107 #define THREAD_ALIGN (2 * THREAD_SIZE)
108 #else
109 #define THREAD_ALIGN THREAD_SIZE
110 #endif
111
112 #define IRQ_STACK_SIZE THREAD_SIZE
113
114 #define OVERFLOW_STACK_SIZE SZ_4K
115
116 /*
117 * Alignment of kernel segments (e.g. .text, .data).
118 *
119 * 4 KB granule: 16 level 3 entries, with contiguous bit
120 * 16 KB granule: 4 level 3 entries, without contiguous bit
121 * 64 KB granule: 1 level 3 entry
122 */
123 #define SEGMENT_ALIGN SZ_64K
124
125 /*
126 * Memory types available.
127 *
128 * IMPORTANT: MT_NORMAL must be index 0 since vm_get_page_prot() may 'or' in
129 * the MT_NORMAL_TAGGED memory type for PROT_MTE mappings. Note
130 * that protection_map[] only contains MT_NORMAL attributes.
131 */
132 #define MT_NORMAL 0
133 #define MT_NORMAL_TAGGED 1
134 #define MT_NORMAL_NC 2
135 #define MT_DEVICE_nGnRnE 3
136 #define MT_DEVICE_nGnRE 4
137 #define MT_NORMAL_iNC_oWB 5
138
139 /*
140 * Memory types for Stage-2 translation
141 */
142 #define MT_S2_NORMAL 0xf
143 #define MT_S2_DEVICE_nGnRE 0x1
144
145 /*
146 * Memory types for Stage-2 translation when ID_AA64MMFR2_EL1.FWB is 0001
147 * Stage-2 enforces Normal-WB and Device-nGnRE
148 */
149 #define MT_S2_FWB_NORMAL 6
150 #define MT_S2_FWB_DEVICE_nGnRE 1
151
152 #ifdef CONFIG_ARM64_4K_PAGES
153 #define IOREMAP_MAX_ORDER (PUD_SHIFT)
154 #else
155 #define IOREMAP_MAX_ORDER (PMD_SHIFT)
156 #endif
157
158 /*
159 * Open-coded (swapper_pg_dir - reserved_pg_dir) as this cannot be calculated
160 * until link time.
161 */
162 #define RESERVED_SWAPPER_OFFSET (PAGE_SIZE)
163
164 /*
165 * Open-coded (swapper_pg_dir - tramp_pg_dir) as this cannot be calculated
166 * until link time.
167 */
168 #define TRAMP_SWAPPER_OFFSET (2 * PAGE_SIZE)
169
170 #ifndef __ASSEMBLY__
171
172 #include <linux/bitops.h>
173 #include <linux/compiler.h>
174 #include <linux/mmdebug.h>
175 #include <linux/types.h>
176 #include <asm/bug.h>
177
178 extern u64 vabits_actual;
179
180 extern s64 memstart_addr;
181 /* PHYS_OFFSET - the physical address of the start of memory. */
182 #define PHYS_OFFSET ({ VM_BUG_ON(memstart_addr & 1); memstart_addr; })
183
184 /* the virtual base of the kernel image */
185 extern u64 kimage_vaddr;
186
187 /* the offset between the kernel virtual and physical mappings */
188 extern u64 kimage_voffset;
189
kaslr_offset(void)190 static inline unsigned long kaslr_offset(void)
191 {
192 return kimage_vaddr - KIMAGE_VADDR;
193 }
194
195 /*
196 * Allow all memory at the discovery stage. We will clip it later.
197 */
198 #define MIN_MEMBLOCK_ADDR 0
199 #define MAX_MEMBLOCK_ADDR U64_MAX
200
201 /*
202 * PFNs are used to describe any physical page; this means
203 * PFN 0 == physical address 0.
204 *
205 * This is the PFN of the first RAM page in the kernel
206 * direct-mapped view. We assume this is the first page
207 * of RAM in the mem_map as well.
208 */
209 #define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT)
210
211 /*
212 * When dealing with data aborts, watchpoints, or instruction traps we may end
213 * up with a tagged userland pointer. Clear the tag to get a sane pointer to
214 * pass on to access_ok(), for instance.
215 */
216 #define __untagged_addr(addr) \
217 ((__force __typeof__(addr))sign_extend64((__force u64)(addr), 55))
218
219 #define untagged_addr(addr) ({ \
220 u64 __addr = (__force u64)(addr); \
221 __addr &= __untagged_addr(__addr); \
222 (__force __typeof__(addr))__addr; \
223 })
224
225 #if defined(CONFIG_KASAN_SW_TAGS) || defined(CONFIG_KASAN_HW_TAGS)
226 #define __tag_shifted(tag) ((u64)(tag) << 56)
227 #define __tag_reset(addr) __untagged_addr(addr)
228 #define __tag_get(addr) (__u8)((u64)(addr) >> 56)
229 #else
230 #define __tag_shifted(tag) 0UL
231 #define __tag_reset(addr) (addr)
232 #define __tag_get(addr) 0
233 #endif /* CONFIG_KASAN_SW_TAGS || CONFIG_KASAN_HW_TAGS */
234
__tag_set(const void * addr,u8 tag)235 static inline const void *__tag_set(const void *addr, u8 tag)
236 {
237 u64 __addr = (u64)addr & ~__tag_shifted(0xff);
238 return (const void *)(__addr | __tag_shifted(tag));
239 }
240
241 #ifdef CONFIG_KASAN_HW_TAGS
242 #define arch_enable_tagging_sync() mte_enable_kernel_sync()
243 #define arch_enable_tagging_async() mte_enable_kernel_async()
244 #define arch_enable_tagging_asymm() mte_enable_kernel_asymm()
245 #define arch_force_async_tag_fault() mte_check_tfsr_exit()
246 #define arch_get_random_tag() mte_get_random_tag()
247 #define arch_get_mem_tag(addr) mte_get_mem_tag(addr)
248 #define arch_set_mem_tag_range(addr, size, tag, init) \
249 mte_set_mem_tag_range((addr), (size), (tag), (init))
250 #endif /* CONFIG_KASAN_HW_TAGS */
251
252 /*
253 * Physical vs virtual RAM address space conversion. These are
254 * private definitions which should NOT be used outside memory.h
255 * files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
256 */
257
258
259 /*
260 * Check whether an arbitrary address is within the linear map, which
261 * lives in the [PAGE_OFFSET, PAGE_END) interval at the bottom of the
262 * kernel's TTBR1 address range.
263 */
264 #define __is_lm_address(addr) (((u64)(addr) - PAGE_OFFSET) < (PAGE_END - PAGE_OFFSET))
265
266 #define __lm_to_phys(addr) (((addr) - PAGE_OFFSET) + PHYS_OFFSET)
267 #define __kimg_to_phys(addr) ((addr) - kimage_voffset)
268
269 #define __virt_to_phys_nodebug(x) ({ \
270 phys_addr_t __x = (phys_addr_t)(__tag_reset(x)); \
271 __is_lm_address(__x) ? __lm_to_phys(__x) : __kimg_to_phys(__x); \
272 })
273
274 #define __pa_symbol_nodebug(x) __kimg_to_phys((phys_addr_t)(x))
275
276 #ifdef CONFIG_DEBUG_VIRTUAL
277 extern phys_addr_t __virt_to_phys(unsigned long x);
278 extern phys_addr_t __phys_addr_symbol(unsigned long x);
279 #else
280 #define __virt_to_phys(x) __virt_to_phys_nodebug(x)
281 #define __phys_addr_symbol(x) __pa_symbol_nodebug(x)
282 #endif /* CONFIG_DEBUG_VIRTUAL */
283
284 #define __phys_to_virt(x) ((unsigned long)((x) - PHYS_OFFSET) | PAGE_OFFSET)
285 #define __phys_to_kimg(x) ((unsigned long)((x) + kimage_voffset))
286
287 /*
288 * Convert a page to/from a physical address
289 */
290 #define page_to_phys(page) (__pfn_to_phys(page_to_pfn(page)))
291 #define phys_to_page(phys) (pfn_to_page(__phys_to_pfn(phys)))
292
293 /*
294 * Note: Drivers should NOT use these. They are the wrong
295 * translation for translating DMA addresses. Use the driver
296 * DMA support - see dma-mapping.h.
297 */
298 #define virt_to_phys virt_to_phys
virt_to_phys(const volatile void * x)299 static inline phys_addr_t virt_to_phys(const volatile void *x)
300 {
301 return __virt_to_phys((unsigned long)(x));
302 }
303
304 #define phys_to_virt phys_to_virt
phys_to_virt(phys_addr_t x)305 static inline void *phys_to_virt(phys_addr_t x)
306 {
307 return (void *)(__phys_to_virt(x));
308 }
309
310 /*
311 * Drivers should NOT use these either.
312 */
313 #define __pa(x) __virt_to_phys((unsigned long)(x))
314 #define __pa_symbol(x) __phys_addr_symbol(RELOC_HIDE((unsigned long)(x), 0))
315 #define __pa_nodebug(x) __virt_to_phys_nodebug((unsigned long)(x))
316 #define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x)))
317 #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
318 #define virt_to_pfn(x) __phys_to_pfn(__virt_to_phys((unsigned long)(x)))
319 #define sym_to_pfn(x) __phys_to_pfn(__pa_symbol(x))
320
321 /*
322 * virt_to_page(x) convert a _valid_ virtual address to struct page *
323 * virt_addr_valid(x) indicates whether a virtual address is valid
324 */
325 #define ARCH_PFN_OFFSET ((unsigned long)PHYS_PFN_OFFSET)
326
327 #if defined(CONFIG_DEBUG_VIRTUAL)
328 #define page_to_virt(x) ({ \
329 __typeof__(x) __page = x; \
330 void *__addr = __va(page_to_phys(__page)); \
331 (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\
332 })
333 #define virt_to_page(x) pfn_to_page(virt_to_pfn(x))
334 #else
335 #define page_to_virt(x) ({ \
336 __typeof__(x) __page = x; \
337 u64 __idx = ((u64)__page - VMEMMAP_START) / sizeof(struct page);\
338 u64 __addr = PAGE_OFFSET + (__idx * PAGE_SIZE); \
339 (void *)__tag_set((const void *)__addr, page_kasan_tag(__page));\
340 })
341
342 #define virt_to_page(x) ({ \
343 u64 __idx = (__tag_reset((u64)x) - PAGE_OFFSET) / PAGE_SIZE; \
344 u64 __addr = VMEMMAP_START + (__idx * sizeof(struct page)); \
345 (struct page *)__addr; \
346 })
347 #endif /* CONFIG_DEBUG_VIRTUAL */
348
349 #define virt_addr_valid(addr) ({ \
350 __typeof__(addr) __addr = __tag_reset(addr); \
351 __is_lm_address(__addr) && pfn_is_map_memory(virt_to_pfn(__addr)); \
352 })
353
354 void dump_mem_limit(void);
355 #endif /* !ASSEMBLY */
356
357 /*
358 * Given that the GIC architecture permits ITS implementations that can only be
359 * configured with a LPI table address once, GICv3 systems with many CPUs may
360 * end up reserving a lot of different regions after a kexec for their LPI
361 * tables (one per CPU), as we are forced to reuse the same memory after kexec
362 * (and thus reserve it persistently with EFI beforehand)
363 */
364 #if defined(CONFIG_EFI) && defined(CONFIG_ARM_GIC_V3_ITS)
365 # define INIT_MEMBLOCK_RESERVED_REGIONS (INIT_MEMBLOCK_REGIONS + NR_CPUS + 1)
366 #endif
367
368 #include <asm-generic/memory_model.h>
369
370 #endif /* __ASM_MEMORY_H */
371