1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2012,2013 - ARM Ltd
4 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 *
6 * Derived from arch/arm/include/asm/kvm_host.h:
7 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
8 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
9 */
10
11 #ifndef __ARM64_KVM_HOST_H__
12 #define __ARM64_KVM_HOST_H__
13
14 #include <linux/arm-smccc.h>
15 #include <linux/bitmap.h>
16 #include <linux/types.h>
17 #include <linux/jump_label.h>
18 #include <linux/kvm_types.h>
19 #include <linux/percpu.h>
20 #include <linux/psci.h>
21 #include <asm/arch_gicv3.h>
22 #include <asm/barrier.h>
23 #include <asm/cpufeature.h>
24 #include <asm/cputype.h>
25 #include <asm/daifflags.h>
26 #include <asm/fpsimd.h>
27 #include <asm/kvm.h>
28 #include <asm/kvm_asm.h>
29
30 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
31
32 #define KVM_HALT_POLL_NS_DEFAULT 500000
33
34 #include <kvm/arm_vgic.h>
35 #include <kvm/arm_arch_timer.h>
36 #include <kvm/arm_pmu.h>
37
38 #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
39
40 #define KVM_VCPU_MAX_FEATURES 7
41
42 #define KVM_REQ_SLEEP \
43 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
44 #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1)
45 #define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2)
46 #define KVM_REQ_RECORD_STEAL KVM_ARCH_REQ(3)
47 #define KVM_REQ_RELOAD_GICv4 KVM_ARCH_REQ(4)
48 #define KVM_REQ_RELOAD_PMU KVM_ARCH_REQ(5)
49
50 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \
51 KVM_DIRTY_LOG_INITIALLY_SET)
52
53 /*
54 * Mode of operation configurable with kvm-arm.mode early param.
55 * See Documentation/admin-guide/kernel-parameters.txt for more information.
56 */
57 enum kvm_mode {
58 KVM_MODE_DEFAULT,
59 KVM_MODE_PROTECTED,
60 KVM_MODE_NONE,
61 };
62 enum kvm_mode kvm_get_mode(void);
63
64 DECLARE_STATIC_KEY_FALSE(userspace_irqchip_in_use);
65
66 extern unsigned int kvm_sve_max_vl;
67 int kvm_arm_init_sve(void);
68
69 u32 __attribute_const__ kvm_target_cpu(void);
70 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
71 void kvm_arm_vcpu_destroy(struct kvm_vcpu *vcpu);
72
73 struct kvm_hyp_memcache {
74 phys_addr_t head;
75 unsigned long nr_pages;
76 };
77
push_hyp_memcache(struct kvm_hyp_memcache * mc,phys_addr_t * p,phys_addr_t (* to_pa)(void * virt))78 static inline void push_hyp_memcache(struct kvm_hyp_memcache *mc,
79 phys_addr_t *p,
80 phys_addr_t (*to_pa)(void *virt))
81 {
82 *p = mc->head;
83 mc->head = to_pa(p);
84 mc->nr_pages++;
85 }
86
pop_hyp_memcache(struct kvm_hyp_memcache * mc,void * (* to_va)(phys_addr_t phys))87 static inline void *pop_hyp_memcache(struct kvm_hyp_memcache *mc,
88 void *(*to_va)(phys_addr_t phys))
89 {
90 phys_addr_t *p = to_va(mc->head);
91
92 if (!mc->nr_pages)
93 return NULL;
94
95 mc->head = *p;
96 mc->nr_pages--;
97
98 return p;
99 }
100
__topup_hyp_memcache(struct kvm_hyp_memcache * mc,unsigned long min_pages,void * (* alloc_fn)(void * arg),phys_addr_t (* to_pa)(void * virt),void * arg)101 static inline int __topup_hyp_memcache(struct kvm_hyp_memcache *mc,
102 unsigned long min_pages,
103 void *(*alloc_fn)(void *arg),
104 phys_addr_t (*to_pa)(void *virt),
105 void *arg)
106 {
107 while (mc->nr_pages < min_pages) {
108 phys_addr_t *p = alloc_fn(arg);
109
110 if (!p)
111 return -ENOMEM;
112 push_hyp_memcache(mc, p, to_pa);
113 }
114
115 return 0;
116 }
117
__free_hyp_memcache(struct kvm_hyp_memcache * mc,void (* free_fn)(void * virt,void * arg),void * (* to_va)(phys_addr_t phys),void * arg)118 static inline void __free_hyp_memcache(struct kvm_hyp_memcache *mc,
119 void (*free_fn)(void *virt, void *arg),
120 void *(*to_va)(phys_addr_t phys),
121 void *arg)
122 {
123 while (mc->nr_pages)
124 free_fn(pop_hyp_memcache(mc, to_va), arg);
125 }
126
127 void free_hyp_memcache(struct kvm_hyp_memcache *mc);
128 int topup_hyp_memcache(struct kvm_vcpu *vcpu);
129
130 struct kvm_vmid {
131 /* The VMID generation used for the virt. memory system */
132 u64 vmid_gen;
133 u32 vmid;
134 };
135
136 struct kvm_s2_mmu {
137 struct kvm_vmid vmid;
138
139 /*
140 * stage2 entry level table
141 *
142 * Two kvm_s2_mmu structures in the same VM can point to the same
143 * pgd here. This happens when running a guest using a
144 * translation regime that isn't affected by its own stage-2
145 * translation, such as a non-VHE hypervisor running at vEL2, or
146 * for vEL1/EL0 with vHCR_EL2.VM == 0. In that case, we use the
147 * canonical stage-2 page tables.
148 */
149 phys_addr_t pgd_phys;
150 struct kvm_pgtable *pgt;
151
152 /* The last vcpu id that ran on each physical CPU */
153 int __percpu *last_vcpu_ran;
154
155 struct kvm_arch *arch;
156 };
157
158 struct kvm_arch_memory_slot {
159 };
160
161 struct kvm_pinned_page {
162 struct list_head link;
163 struct page *page;
164 };
165
166 struct kvm_protected_vm {
167 bool enabled;
168 int shadow_handle;
169 struct mutex shadow_lock;
170 struct kvm_hyp_memcache teardown_mc;
171 struct list_head pinned_pages;
172 gpa_t pvmfw_load_addr;
173 };
174
175 struct kvm_arch {
176 struct kvm_s2_mmu mmu;
177
178 /* VTCR_EL2 value for this VM */
179 u64 vtcr;
180
181 /* The maximum number of vCPUs depends on the used GIC model */
182 int max_vcpus;
183
184 /* Interrupt controller */
185 struct vgic_dist vgic;
186
187 /* Mandated version of PSCI */
188 u32 psci_version;
189
190 /*
191 * If we encounter a data abort without valid instruction syndrome
192 * information, report this to user space. User space can (and
193 * should) opt in to this feature if KVM_CAP_ARM_NISV_TO_USER is
194 * supported.
195 */
196 #define KVM_ARCH_FLAG_RETURN_NISV_IO_ABORT_TO_USER 0
197 /* Memory Tagging Extension enabled for the guest */
198 #define KVM_ARCH_FLAG_MTE_ENABLED 1
199 /* Guest has bought into the MMIO guard extension */
200 #define KVM_ARCH_FLAG_MMIO_GUARD 2
201 unsigned long flags;
202
203 /*
204 * VM-wide PMU filter, implemented as a bitmap and big enough for
205 * up to 2^10 events (ARMv8.0) or 2^16 events (ARMv8.1+).
206 */
207 unsigned long *pmu_filter;
208 unsigned int pmuver;
209
210 u8 pfr0_csv2;
211 u8 pfr0_csv3;
212
213 struct kvm_protected_vm pkvm;
214 };
215
216 struct kvm_protected_vcpu {
217 /* A pointer to the host's vcpu. */
218 struct kvm_vcpu *host_vcpu;
219
220 /* A pointer to the shadow vm. */
221 struct kvm_shadow_vm *shadow_vm;
222
223 /* Tracks exit code for the protected guest. */
224 int exit_code;
225
226 /*
227 * Track the power state transition of a protected vcpu.
228 * Can be in one of three states:
229 * PSCI_0_2_AFFINITY_LEVEL_ON
230 * PSCI_0_2_AFFINITY_LEVEL_OFF
231 * PSCI_0_2_AFFINITY_LEVEL_PENDING
232 */
233 int power_state;
234
235 /* True if this vcpu is currently loaded on a cpu. */
236 bool loaded_on_cpu;
237 };
238
239 struct kvm_vcpu_fault_info {
240 u32 esr_el2; /* Hyp Syndrom Register */
241 u64 far_el2; /* Hyp Fault Address Register */
242 u64 hpfar_el2; /* Hyp IPA Fault Address Register */
243 u64 disr_el1; /* Deferred [SError] Status Register */
244 };
245
246 enum vcpu_sysreg {
247 __INVALID_SYSREG__, /* 0 is reserved as an invalid value */
248 MPIDR_EL1, /* MultiProcessor Affinity Register */
249 CSSELR_EL1, /* Cache Size Selection Register */
250 SCTLR_EL1, /* System Control Register */
251 ACTLR_EL1, /* Auxiliary Control Register */
252 CPACR_EL1, /* Coprocessor Access Control */
253 ZCR_EL1, /* SVE Control */
254 TTBR0_EL1, /* Translation Table Base Register 0 */
255 TTBR1_EL1, /* Translation Table Base Register 1 */
256 TCR_EL1, /* Translation Control Register */
257 ESR_EL1, /* Exception Syndrome Register */
258 AFSR0_EL1, /* Auxiliary Fault Status Register 0 */
259 AFSR1_EL1, /* Auxiliary Fault Status Register 1 */
260 FAR_EL1, /* Fault Address Register */
261 MAIR_EL1, /* Memory Attribute Indirection Register */
262 VBAR_EL1, /* Vector Base Address Register */
263 CONTEXTIDR_EL1, /* Context ID Register */
264 TPIDR_EL0, /* Thread ID, User R/W */
265 TPIDRRO_EL0, /* Thread ID, User R/O */
266 TPIDR_EL1, /* Thread ID, Privileged */
267 AMAIR_EL1, /* Aux Memory Attribute Indirection Register */
268 CNTKCTL_EL1, /* Timer Control Register (EL1) */
269 PAR_EL1, /* Physical Address Register */
270 MDSCR_EL1, /* Monitor Debug System Control Register */
271 MDCCINT_EL1, /* Monitor Debug Comms Channel Interrupt Enable Reg */
272 DISR_EL1, /* Deferred Interrupt Status Register */
273
274 /* Performance Monitors Registers */
275 PMCR_EL0, /* Control Register */
276 PMSELR_EL0, /* Event Counter Selection Register */
277 PMEVCNTR0_EL0, /* Event Counter Register (0-30) */
278 PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30,
279 PMCCNTR_EL0, /* Cycle Counter Register */
280 PMEVTYPER0_EL0, /* Event Type Register (0-30) */
281 PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30,
282 PMCCFILTR_EL0, /* Cycle Count Filter Register */
283 PMCNTENSET_EL0, /* Count Enable Set Register */
284 PMINTENSET_EL1, /* Interrupt Enable Set Register */
285 PMOVSSET_EL0, /* Overflow Flag Status Set Register */
286 PMUSERENR_EL0, /* User Enable Register */
287
288 /* Pointer Authentication Registers in a strict increasing order. */
289 APIAKEYLO_EL1,
290 APIAKEYHI_EL1,
291 APIBKEYLO_EL1,
292 APIBKEYHI_EL1,
293 APDAKEYLO_EL1,
294 APDAKEYHI_EL1,
295 APDBKEYLO_EL1,
296 APDBKEYHI_EL1,
297 APGAKEYLO_EL1,
298 APGAKEYHI_EL1,
299
300 ELR_EL1,
301 SP_EL1,
302 SPSR_EL1,
303
304 CNTVOFF_EL2,
305 CNTV_CVAL_EL0,
306 CNTV_CTL_EL0,
307 CNTP_CVAL_EL0,
308 CNTP_CTL_EL0,
309
310 /* Memory Tagging Extension registers */
311 RGSR_EL1, /* Random Allocation Tag Seed Register */
312 GCR_EL1, /* Tag Control Register */
313 TFSR_EL1, /* Tag Fault Status Register (EL1) */
314 TFSRE0_EL1, /* Tag Fault Status Register (EL0) */
315
316 /* 32bit specific registers. Keep them at the end of the range */
317 DACR32_EL2, /* Domain Access Control Register */
318 IFSR32_EL2, /* Instruction Fault Status Register */
319 FPEXC32_EL2, /* Floating-Point Exception Control Register */
320 DBGVCR32_EL2, /* Debug Vector Catch Register */
321
322 NR_SYS_REGS /* Nothing after this line! */
323 };
324
325 struct kvm_cpu_context {
326 struct user_pt_regs regs; /* sp = sp_el0 */
327
328 u64 spsr_abt;
329 u64 spsr_und;
330 u64 spsr_irq;
331 u64 spsr_fiq;
332
333 struct user_fpsimd_state fp_regs;
334
335 u64 sys_regs[NR_SYS_REGS];
336
337 struct kvm_vcpu *__hyp_running_vcpu;
338 };
339
340 struct kvm_pmu_events {
341 u32 events_host;
342 u32 events_guest;
343 };
344
345 struct kvm_host_data {
346 struct kvm_cpu_context host_ctxt;
347 struct kvm_pmu_events pmu_events;
348 };
349
350 struct kvm_host_psci_config {
351 /* PSCI version used by host. */
352 u32 version;
353 u32 smccc_version;
354
355 /* Function IDs used by host if version is v0.1. */
356 struct psci_0_1_function_ids function_ids_0_1;
357
358 bool psci_0_1_cpu_suspend_implemented;
359 bool psci_0_1_cpu_on_implemented;
360 bool psci_0_1_cpu_off_implemented;
361 bool psci_0_1_migrate_implemented;
362 };
363
364 extern struct kvm_host_psci_config kvm_nvhe_sym(kvm_host_psci_config);
365 #define kvm_host_psci_config CHOOSE_NVHE_SYM(kvm_host_psci_config)
366
367 extern s64 kvm_nvhe_sym(hyp_physvirt_offset);
368 #define hyp_physvirt_offset CHOOSE_NVHE_SYM(hyp_physvirt_offset)
369
370 extern u64 kvm_nvhe_sym(hyp_cpu_logical_map)[NR_CPUS];
371 #define hyp_cpu_logical_map CHOOSE_NVHE_SYM(hyp_cpu_logical_map)
372
373 enum pkvm_iommu_driver_id {
374 PKVM_IOMMU_DRIVER_S2MPU,
375 PKVM_IOMMU_DRIVER_SYSMMU_SYNC,
376 PKVM_IOMMU_NR_DRIVERS,
377 };
378
379 enum pkvm_iommu_pm_event {
380 PKVM_IOMMU_PM_SUSPEND,
381 PKVM_IOMMU_PM_RESUME,
382 };
383
384 int pkvm_iommu_driver_init(enum pkvm_iommu_driver_id drv_id, void *data, size_t size);
385 int pkvm_iommu_register(struct device *dev, enum pkvm_iommu_driver_id drv_id,
386 phys_addr_t pa, size_t size, struct device *parent);
387 int pkvm_iommu_suspend(struct device *dev);
388 int pkvm_iommu_resume(struct device *dev);
389
390 int pkvm_iommu_s2mpu_register(struct device *dev, phys_addr_t pa);
391 int pkvm_iommu_sysmmu_sync_register(struct device *dev, phys_addr_t pa,
392 struct device *parent);
393 /* Reject future calls to pkvm_iommu_driver_init() and pkvm_iommu_register(). */
394 int pkvm_iommu_finalize(void);
395
396 struct vcpu_reset_state {
397 unsigned long pc;
398 unsigned long r0;
399 bool be;
400 bool reset;
401 };
402
403 struct kvm_vcpu_arch {
404 struct kvm_cpu_context ctxt;
405 void *sve_state;
406 unsigned int sve_max_vl;
407
408 /* Stage 2 paging state used by the hardware on next switch */
409 struct kvm_s2_mmu *hw_mmu;
410
411 /* Values of trap registers for the guest. */
412 u64 hcr_el2;
413 u64 mdcr_el2;
414 u64 cptr_el2;
415
416 /* Values of trap registers for the host before guest entry. */
417 u64 mdcr_el2_host;
418
419 /* Exception Information */
420 struct kvm_vcpu_fault_info fault;
421
422 /* Miscellaneous vcpu state flags */
423 u64 flags;
424
425 /*
426 * We maintain more than a single set of debug registers to support
427 * debugging the guest from the host and to maintain separate host and
428 * guest state during world switches. vcpu_debug_state are the debug
429 * registers of the vcpu as the guest sees them. host_debug_state are
430 * the host registers which are saved and restored during
431 * world switches. external_debug_state contains the debug
432 * values we want to debug the guest. This is set via the
433 * KVM_SET_GUEST_DEBUG ioctl.
434 *
435 * debug_ptr points to the set of debug registers that should be loaded
436 * onto the hardware when running the guest.
437 */
438 struct kvm_guest_debug_arch *debug_ptr;
439 struct kvm_guest_debug_arch vcpu_debug_state;
440 struct kvm_guest_debug_arch external_debug_state;
441
442 struct user_fpsimd_state *host_fpsimd_state; /* hyp VA */
443 struct task_struct *parent_task;
444
445 struct {
446 /* {Break,watch}point registers */
447 struct kvm_guest_debug_arch regs;
448 /* Statistical profiling extension */
449 u64 pmscr_el1;
450 /* Self-hosted trace */
451 u64 trfcr_el1;
452 } host_debug_state;
453
454 /* VGIC state */
455 struct vgic_cpu vgic_cpu;
456 struct arch_timer_cpu timer_cpu;
457 struct kvm_pmu pmu;
458
459 /*
460 * Anything that is not used directly from assembly code goes
461 * here.
462 */
463
464 /*
465 * Guest registers we preserve during guest debugging.
466 *
467 * These shadow registers are updated by the kvm_handle_sys_reg
468 * trap handler if the guest accesses or updates them while we
469 * are using guest debug.
470 */
471 struct {
472 u32 mdscr_el1;
473 } guest_debug_preserved;
474
475 /* vcpu power-off state */
476 bool power_off;
477
478 /* Don't run the guest (internal implementation need) */
479 bool pause;
480
481 union {
482 /* Cache some mmu pages needed inside spinlock regions */
483 struct kvm_mmu_memory_cache mmu_page_cache;
484 /* Pages to be donated to pkvm/EL2e if it runs out */
485 struct kvm_hyp_memcache pkvm_memcache;
486 };
487
488 /* Target CPU and feature flags */
489 int target;
490 DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
491
492 /* Virtual SError ESR to restore when HCR_EL2.VSE is set */
493 u64 vsesr_el2;
494
495 /* Additional reset state */
496 struct vcpu_reset_state reset_state;
497
498 /* True when deferrable sysregs are loaded on the physical CPU,
499 * see kvm_vcpu_load_sysregs_vhe and kvm_vcpu_put_sysregs_vhe. */
500 bool sysregs_loaded_on_cpu;
501
502 /* Guest PV state */
503 struct {
504 u64 last_steal;
505 gpa_t base;
506 } steal;
507
508 struct kvm_protected_vcpu pkvm;
509 };
510
511 /* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */
512 #define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) + \
513 sve_ffr_offset((vcpu)->arch.sve_max_vl))
514
515 #define vcpu_sve_max_vq(vcpu) sve_vq_from_vl((vcpu)->arch.sve_max_vl)
516
517 #define vcpu_sve_state_size(vcpu) ({ \
518 size_t __size_ret; \
519 unsigned int __vcpu_vq; \
520 \
521 if (WARN_ON(!sve_vl_valid((vcpu)->arch.sve_max_vl))) { \
522 __size_ret = 0; \
523 } else { \
524 __vcpu_vq = vcpu_sve_max_vq(vcpu); \
525 __size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq); \
526 } \
527 \
528 __size_ret; \
529 })
530
531 /* vcpu_arch flags field values: */
532 #define KVM_ARM64_DEBUG_DIRTY (1 << 0)
533 #define KVM_ARM64_FP_ENABLED (1 << 1) /* guest FP regs loaded */
534 #define KVM_ARM64_FP_HOST (1 << 2) /* host FP regs loaded */
535 #define KVM_ARM64_HOST_SVE_ENABLED (1 << 4) /* SVE enabled for EL0 */
536 #define KVM_ARM64_GUEST_HAS_SVE (1 << 5) /* SVE exposed to guest */
537 #define KVM_ARM64_VCPU_SVE_FINALIZED (1 << 6) /* SVE config completed */
538 #define KVM_ARM64_GUEST_HAS_PTRAUTH (1 << 7) /* PTRAUTH exposed to guest */
539 #define KVM_ARM64_PENDING_EXCEPTION (1 << 8) /* Exception pending */
540 /*
541 * Overlaps with KVM_ARM64_EXCEPT_MASK on purpose so that it can't be
542 * set together with an exception...
543 */
544 #define KVM_ARM64_INCREMENT_PC (1 << 9) /* Increment PC */
545 #define KVM_ARM64_EXCEPT_MASK (7 << 9) /* Target EL/MODE */
546 /*
547 * When KVM_ARM64_PENDING_EXCEPTION is set, KVM_ARM64_EXCEPT_MASK can
548 * take the following values:
549 *
550 * For AArch32 EL1:
551 */
552 #define KVM_ARM64_EXCEPT_AA32_UND (0 << 9)
553 #define KVM_ARM64_EXCEPT_AA32_IABT (1 << 9)
554 #define KVM_ARM64_EXCEPT_AA32_DABT (2 << 9)
555 /* For AArch64: */
556 #define KVM_ARM64_EXCEPT_AA64_ELx_SYNC (0 << 9)
557 #define KVM_ARM64_EXCEPT_AA64_ELx_IRQ (1 << 9)
558 #define KVM_ARM64_EXCEPT_AA64_ELx_FIQ (2 << 9)
559 #define KVM_ARM64_EXCEPT_AA64_ELx_SERR (3 << 9)
560 #define KVM_ARM64_EXCEPT_AA64_EL1 (0 << 11)
561 #define KVM_ARM64_EXCEPT_AA64_EL2 (1 << 11)
562
563 #define KVM_ARM64_DEBUG_STATE_SAVE_SPE (1 << 12) /* Save SPE context if active */
564 #define KVM_ARM64_DEBUG_STATE_SAVE_TRBE (1 << 13) /* Save TRBE context if active */
565 #define KVM_ARM64_FP_FOREIGN_FPSTATE (1 << 14)
566 #define KVM_ARM64_PKVM_STATE_DIRTY (1 << 15)
567
568 #define KVM_GUESTDBG_VALID_MASK (KVM_GUESTDBG_ENABLE | \
569 KVM_GUESTDBG_USE_SW_BP | \
570 KVM_GUESTDBG_USE_HW | \
571 KVM_GUESTDBG_SINGLESTEP)
572
573 #define vcpu_has_sve(vcpu) (system_supports_sve() && \
574 ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_SVE))
575
576 #ifdef CONFIG_ARM64_PTR_AUTH
577 #define vcpu_has_ptrauth(vcpu) \
578 ((cpus_have_final_cap(ARM64_HAS_ADDRESS_AUTH) || \
579 cpus_have_final_cap(ARM64_HAS_GENERIC_AUTH)) && \
580 (vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_PTRAUTH)
581 #else
582 #define vcpu_has_ptrauth(vcpu) false
583 #endif
584
585 #define vcpu_gp_regs(v) (&(v)->arch.ctxt.regs)
586
587 /*
588 * Only use __vcpu_sys_reg/ctxt_sys_reg if you know you want the
589 * memory backed version of a register, and not the one most recently
590 * accessed by a running VCPU. For example, for userspace access or
591 * for system registers that are never context switched, but only
592 * emulated.
593 */
594 #define __ctxt_sys_reg(c,r) (&(c)->sys_regs[(r)])
595
596 #define ctxt_sys_reg(c,r) (*__ctxt_sys_reg(c,r))
597
598 #define __vcpu_sys_reg(v,r) (ctxt_sys_reg(&(v)->arch.ctxt, (r)))
599
__vcpu_read_sys_reg_from_cpu(int reg,u64 * val)600 static inline bool __vcpu_read_sys_reg_from_cpu(int reg, u64 *val)
601 {
602 /*
603 * *** VHE ONLY ***
604 *
605 * System registers listed in the switch are not saved on every
606 * exit from the guest but are only saved on vcpu_put.
607 *
608 * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but
609 * should never be listed below, because the guest cannot modify its
610 * own MPIDR_EL1 and MPIDR_EL1 is accessed for VCPU A from VCPU B's
611 * thread when emulating cross-VCPU communication.
612 */
613 if (!has_vhe())
614 return false;
615
616 switch (reg) {
617 case CSSELR_EL1: *val = read_sysreg_s(SYS_CSSELR_EL1); break;
618 case SCTLR_EL1: *val = read_sysreg_s(SYS_SCTLR_EL12); break;
619 case CPACR_EL1: *val = read_sysreg_s(SYS_CPACR_EL12); break;
620 case TTBR0_EL1: *val = read_sysreg_s(SYS_TTBR0_EL12); break;
621 case TTBR1_EL1: *val = read_sysreg_s(SYS_TTBR1_EL12); break;
622 case TCR_EL1: *val = read_sysreg_s(SYS_TCR_EL12); break;
623 case ESR_EL1: *val = read_sysreg_s(SYS_ESR_EL12); break;
624 case AFSR0_EL1: *val = read_sysreg_s(SYS_AFSR0_EL12); break;
625 case AFSR1_EL1: *val = read_sysreg_s(SYS_AFSR1_EL12); break;
626 case FAR_EL1: *val = read_sysreg_s(SYS_FAR_EL12); break;
627 case MAIR_EL1: *val = read_sysreg_s(SYS_MAIR_EL12); break;
628 case VBAR_EL1: *val = read_sysreg_s(SYS_VBAR_EL12); break;
629 case CONTEXTIDR_EL1: *val = read_sysreg_s(SYS_CONTEXTIDR_EL12);break;
630 case TPIDR_EL0: *val = read_sysreg_s(SYS_TPIDR_EL0); break;
631 case TPIDRRO_EL0: *val = read_sysreg_s(SYS_TPIDRRO_EL0); break;
632 case TPIDR_EL1: *val = read_sysreg_s(SYS_TPIDR_EL1); break;
633 case AMAIR_EL1: *val = read_sysreg_s(SYS_AMAIR_EL12); break;
634 case CNTKCTL_EL1: *val = read_sysreg_s(SYS_CNTKCTL_EL12); break;
635 case ELR_EL1: *val = read_sysreg_s(SYS_ELR_EL12); break;
636 case PAR_EL1: *val = read_sysreg_par(); break;
637 case DACR32_EL2: *val = read_sysreg_s(SYS_DACR32_EL2); break;
638 case IFSR32_EL2: *val = read_sysreg_s(SYS_IFSR32_EL2); break;
639 case DBGVCR32_EL2: *val = read_sysreg_s(SYS_DBGVCR32_EL2); break;
640 default: return false;
641 }
642
643 return true;
644 }
645
__vcpu_write_sys_reg_to_cpu(u64 val,int reg)646 static inline bool __vcpu_write_sys_reg_to_cpu(u64 val, int reg)
647 {
648 /*
649 * *** VHE ONLY ***
650 *
651 * System registers listed in the switch are not restored on every
652 * entry to the guest but are only restored on vcpu_load.
653 *
654 * Note that MPIDR_EL1 for the guest is set by KVM via VMPIDR_EL2 but
655 * should never be listed below, because the MPIDR should only be set
656 * once, before running the VCPU, and never changed later.
657 */
658 if (!has_vhe())
659 return false;
660
661 switch (reg) {
662 case CSSELR_EL1: write_sysreg_s(val, SYS_CSSELR_EL1); break;
663 case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break;
664 case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); break;
665 case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); break;
666 case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break;
667 case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break;
668 case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); break;
669 case AFSR0_EL1: write_sysreg_s(val, SYS_AFSR0_EL12); break;
670 case AFSR1_EL1: write_sysreg_s(val, SYS_AFSR1_EL12); break;
671 case FAR_EL1: write_sysreg_s(val, SYS_FAR_EL12); break;
672 case MAIR_EL1: write_sysreg_s(val, SYS_MAIR_EL12); break;
673 case VBAR_EL1: write_sysreg_s(val, SYS_VBAR_EL12); break;
674 case CONTEXTIDR_EL1: write_sysreg_s(val, SYS_CONTEXTIDR_EL12);break;
675 case TPIDR_EL0: write_sysreg_s(val, SYS_TPIDR_EL0); break;
676 case TPIDRRO_EL0: write_sysreg_s(val, SYS_TPIDRRO_EL0); break;
677 case TPIDR_EL1: write_sysreg_s(val, SYS_TPIDR_EL1); break;
678 case AMAIR_EL1: write_sysreg_s(val, SYS_AMAIR_EL12); break;
679 case CNTKCTL_EL1: write_sysreg_s(val, SYS_CNTKCTL_EL12); break;
680 case ELR_EL1: write_sysreg_s(val, SYS_ELR_EL12); break;
681 case PAR_EL1: write_sysreg_s(val, SYS_PAR_EL1); break;
682 case DACR32_EL2: write_sysreg_s(val, SYS_DACR32_EL2); break;
683 case IFSR32_EL2: write_sysreg_s(val, SYS_IFSR32_EL2); break;
684 case DBGVCR32_EL2: write_sysreg_s(val, SYS_DBGVCR32_EL2); break;
685 default: return false;
686 }
687
688 return true;
689 }
690
vcpu_arch_read_sys_reg(const struct kvm_vcpu_arch * vcpu_arch,int reg)691 static inline u64 vcpu_arch_read_sys_reg(const struct kvm_vcpu_arch *vcpu_arch, int reg)
692 {
693 u64 val = 0x8badf00d8badf00d;
694
695 /* sysregs_loaded_on_cpu is only used in VHE */
696 if (!is_nvhe_hyp_code() && vcpu_arch->sysregs_loaded_on_cpu &&
697 __vcpu_read_sys_reg_from_cpu(reg, &val))
698 return val;
699
700 return ctxt_sys_reg(&vcpu_arch->ctxt, reg);
701 }
702
vcpu_arch_write_sys_reg(struct kvm_vcpu_arch * vcpu_arch,u64 val,int reg)703 static inline void vcpu_arch_write_sys_reg(struct kvm_vcpu_arch *vcpu_arch, u64 val, int reg)
704 {
705 /* sysregs_loaded_on_cpu is only used in VHE */
706 if (!is_nvhe_hyp_code() && vcpu_arch->sysregs_loaded_on_cpu &&
707 __vcpu_write_sys_reg_to_cpu(val, reg))
708 return;
709
710 ctxt_sys_reg(&vcpu_arch->ctxt, reg) = val;
711 }
712
713 #define vcpu_read_sys_reg(vcpu, reg) vcpu_arch_read_sys_reg(&((vcpu)->arch), reg)
714 #define vcpu_write_sys_reg(vcpu, val, reg) vcpu_arch_write_sys_reg(&((vcpu)->arch), val, reg)
715
716 struct kvm_vm_stat {
717 struct kvm_vm_stat_generic generic;
718 };
719
720 struct kvm_vcpu_stat {
721 struct kvm_vcpu_stat_generic generic;
722 u64 hvc_exit_stat;
723 u64 wfe_exit_stat;
724 u64 wfi_exit_stat;
725 u64 mmio_exit_user;
726 u64 mmio_exit_kernel;
727 u64 signal_exits;
728 u64 exits;
729 };
730
731 void kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);
732 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
733 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
734 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
735 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
736
737 unsigned long kvm_arm_num_sys_reg_descs(struct kvm_vcpu *vcpu);
738 int kvm_arm_copy_sys_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
739 int kvm_arm_sys_reg_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
740 int kvm_arm_sys_reg_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
741
742 int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu,
743 struct kvm_vcpu_events *events);
744
745 int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
746 struct kvm_vcpu_events *events);
747
748 #define KVM_ARCH_WANT_MMU_NOTIFIER
749
750 void kvm_arm_halt_guest(struct kvm *kvm);
751 void kvm_arm_resume_guest(struct kvm *kvm);
752
753 #define vcpu_has_run_once(vcpu) !!rcu_access_pointer((vcpu)->pid)
754
755 #ifndef __KVM_NVHE_HYPERVISOR__
756 #define kvm_call_hyp_nvhe(f, ...) \
757 ({ \
758 struct arm_smccc_res res; \
759 \
760 arm_smccc_1_1_hvc(KVM_HOST_SMCCC_FUNC(f), \
761 ##__VA_ARGS__, &res); \
762 WARN_ON(res.a0 != SMCCC_RET_SUCCESS); \
763 \
764 res.a1; \
765 })
766
767 /*
768 * The couple of isb() below are there to guarantee the same behaviour
769 * on VHE as on !VHE, where the eret to EL1 acts as a context
770 * synchronization event.
771 */
772 #define kvm_call_hyp(f, ...) \
773 do { \
774 if (has_vhe()) { \
775 f(__VA_ARGS__); \
776 isb(); \
777 } else { \
778 kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \
779 } \
780 } while(0)
781
782 #define kvm_call_hyp_ret(f, ...) \
783 ({ \
784 typeof(f(__VA_ARGS__)) ret; \
785 \
786 if (has_vhe()) { \
787 ret = f(__VA_ARGS__); \
788 isb(); \
789 } else { \
790 ret = kvm_call_hyp_nvhe(f, ##__VA_ARGS__); \
791 } \
792 \
793 ret; \
794 })
795 #else /* __KVM_NVHE_HYPERVISOR__ */
796 #define kvm_call_hyp(f, ...) f(__VA_ARGS__)
797 #define kvm_call_hyp_ret(f, ...) f(__VA_ARGS__)
798 #define kvm_call_hyp_nvhe(f, ...) f(__VA_ARGS__)
799 #endif /* __KVM_NVHE_HYPERVISOR__ */
800
801 void force_vm_exit(const cpumask_t *mask);
802
803 int handle_exit(struct kvm_vcpu *vcpu, int exception_index);
804 void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index);
805
806 int kvm_handle_cp14_load_store(struct kvm_vcpu *vcpu);
807 int kvm_handle_cp14_32(struct kvm_vcpu *vcpu);
808 int kvm_handle_cp14_64(struct kvm_vcpu *vcpu);
809 int kvm_handle_cp15_32(struct kvm_vcpu *vcpu);
810 int kvm_handle_cp15_64(struct kvm_vcpu *vcpu);
811 int kvm_handle_sys_reg(struct kvm_vcpu *vcpu);
812
813 void kvm_reset_sys_regs(struct kvm_vcpu *vcpu);
814
815 void kvm_sys_reg_table_init(void);
816
817 /* MMIO helpers */
818 void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data);
819 unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len);
820
821 int kvm_handle_mmio_return(struct kvm_vcpu *vcpu);
822 int io_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa);
823
824 int kvm_perf_init(void);
825 int kvm_perf_teardown(void);
826
827 long kvm_hypercall_pv_features(struct kvm_vcpu *vcpu);
828 gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu);
829 void kvm_update_stolen_time(struct kvm_vcpu *vcpu);
830
831 bool kvm_arm_pvtime_supported(void);
832 int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu,
833 struct kvm_device_attr *attr);
834 int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu,
835 struct kvm_device_attr *attr);
836 int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu,
837 struct kvm_device_attr *attr);
838
kvm_arm_pvtime_vcpu_init(struct kvm_vcpu_arch * vcpu_arch)839 static inline void kvm_arm_pvtime_vcpu_init(struct kvm_vcpu_arch *vcpu_arch)
840 {
841 vcpu_arch->steal.base = GPA_INVALID;
842 }
843
kvm_arm_is_pvtime_enabled(struct kvm_vcpu_arch * vcpu_arch)844 static inline bool kvm_arm_is_pvtime_enabled(struct kvm_vcpu_arch *vcpu_arch)
845 {
846 return (vcpu_arch->steal.base != GPA_INVALID);
847 }
848
849 void kvm_set_sei_esr(struct kvm_vcpu *vcpu, u64 syndrome);
850
851 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
852
853 DECLARE_KVM_HYP_PER_CPU(struct kvm_host_data, kvm_host_data);
854
kvm_init_host_cpu_context(struct kvm_cpu_context * cpu_ctxt)855 static inline void kvm_init_host_cpu_context(struct kvm_cpu_context *cpu_ctxt)
856 {
857 /* The host's MPIDR is immutable, so let's set it up at boot time */
858 ctxt_sys_reg(cpu_ctxt, MPIDR_EL1) = read_cpuid_mpidr();
859 }
860
kvm_system_needs_idmapped_vectors(void)861 static inline bool kvm_system_needs_idmapped_vectors(void)
862 {
863 return cpus_have_const_cap(ARM64_SPECTRE_V3A);
864 }
865
866 void kvm_arm_vcpu_ptrauth_trap(struct kvm_vcpu *vcpu);
867
kvm_arch_hardware_unsetup(void)868 static inline void kvm_arch_hardware_unsetup(void) {}
kvm_arch_sync_events(struct kvm * kvm)869 static inline void kvm_arch_sync_events(struct kvm *kvm) {}
kvm_arch_sched_in(struct kvm_vcpu * vcpu,int cpu)870 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
kvm_arch_vcpu_block_finish(struct kvm_vcpu * vcpu)871 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
872
873 void kvm_arm_init_debug(void);
874 void kvm_arm_vcpu_init_debug(struct kvm_vcpu *vcpu);
875 void kvm_arm_setup_debug(struct kvm_vcpu *vcpu);
876 void kvm_arm_clear_debug(struct kvm_vcpu *vcpu);
877 void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu);
878 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
879 struct kvm_device_attr *attr);
880 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
881 struct kvm_device_attr *attr);
882 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
883 struct kvm_device_attr *attr);
884
885 long kvm_vm_ioctl_mte_copy_tags(struct kvm *kvm,
886 struct kvm_arm_copy_mte_tags *copy_tags);
887
888 /* Guest/host FPSIMD coordination helpers */
889 int kvm_arch_vcpu_run_map_fp(struct kvm_vcpu *vcpu);
890 void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu);
891 void kvm_arch_vcpu_ctxflush_fp(struct kvm_vcpu *vcpu);
892 void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu);
893 void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu);
894 void kvm_vcpu_unshare_task_fp(struct kvm_vcpu *vcpu);
895
kvm_pmu_counter_deferred(struct perf_event_attr * attr)896 static inline bool kvm_pmu_counter_deferred(struct perf_event_attr *attr)
897 {
898 return (!has_vhe() && attr->exclude_host);
899 }
900
901 /* Flags for host debug state */
902 void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu);
903 void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu);
904
905 #ifdef CONFIG_KVM
906 void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr);
907 void kvm_clr_pmu_events(u32 clr);
908
909 void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu);
910 void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu);
911 #else
kvm_set_pmu_events(u32 set,struct perf_event_attr * attr)912 static inline void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr) {}
kvm_clr_pmu_events(u32 clr)913 static inline void kvm_clr_pmu_events(u32 clr) {}
914 #endif
915
916 void kvm_vcpu_load_sysregs_vhe(struct kvm_vcpu *vcpu);
917 void kvm_vcpu_put_sysregs_vhe(struct kvm_vcpu *vcpu);
918
919 int kvm_set_ipa_limit(void);
920
921 #define __KVM_HAVE_ARCH_VM_ALLOC
922 struct kvm *kvm_arch_alloc_vm(void);
923 void kvm_arch_free_vm(struct kvm *kvm);
924
925 #define kvm_vm_is_protected(kvm) ((kvm)->arch.pkvm.enabled)
926
927 void kvm_init_protected_traps(struct kvm_vcpu *vcpu);
928
929 int kvm_arm_vcpu_finalize(struct kvm_vcpu *vcpu, int feature);
930 bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu);
931
932 #define kvm_arm_vcpu_sve_finalized(vcpu) \
933 ((vcpu)->arch.flags & KVM_ARM64_VCPU_SVE_FINALIZED)
934
935 #define kvm_has_mte(kvm) \
936 (system_supports_mte() && \
937 test_bit(KVM_ARCH_FLAG_MTE_ENABLED, &(kvm)->arch.flags))
938 #define kvm_vcpu_has_pmu(vcpu) \
939 (test_bit(KVM_ARM_VCPU_PMU_V3, (vcpu)->arch.features))
940
941 #define kvm_supports_32bit_el0() \
942 (system_supports_32bit_el0() && \
943 !static_branch_unlikely(&arm64_mismatched_32bit_el0))
944
945 int kvm_trng_call(struct kvm_vcpu *vcpu);
946 #ifdef CONFIG_KVM
947 extern phys_addr_t hyp_mem_base;
948 extern phys_addr_t hyp_mem_size;
949 void __init kvm_hyp_reserve(void);
950 #else
kvm_hyp_reserve(void)951 static inline void kvm_hyp_reserve(void) { }
952 #endif
953
954 #endif /* __ARM64_KVM_HOST_H__ */
955