1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (C) 2012 Regents of the University of California
4 */
5
6 #ifndef _ASM_RISCV_PGTABLE_H
7 #define _ASM_RISCV_PGTABLE_H
8
9 #include <linux/mmzone.h>
10 #include <linux/sizes.h>
11
12 #include <asm/pgtable-bits.h>
13
14 #ifndef CONFIG_MMU
15 #define KERNEL_LINK_ADDR PAGE_OFFSET
16 #else
17
18 #define ADDRESS_SPACE_END (UL(-1))
19
20 #ifdef CONFIG_64BIT
21 /* Leave 2GB for kernel and BPF at the end of the address space */
22 #define KERNEL_LINK_ADDR (ADDRESS_SPACE_END - SZ_2G + 1)
23 #else
24 #define KERNEL_LINK_ADDR PAGE_OFFSET
25 #endif
26
27 #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
28 #define VMALLOC_END (PAGE_OFFSET - 1)
29 #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE)
30
31 #define BPF_JIT_REGION_SIZE (SZ_128M)
32 #ifdef CONFIG_64BIT
33 #define BPF_JIT_REGION_START (BPF_JIT_REGION_END - BPF_JIT_REGION_SIZE)
34 #define BPF_JIT_REGION_END (MODULES_END)
35 #else
36 #define BPF_JIT_REGION_START (PAGE_OFFSET - BPF_JIT_REGION_SIZE)
37 #define BPF_JIT_REGION_END (VMALLOC_END)
38 #endif
39
40 /* Modules always live before the kernel */
41 #ifdef CONFIG_64BIT
42 #define MODULES_VADDR (PFN_ALIGN((unsigned long)&_end) - SZ_2G)
43 #define MODULES_END (PFN_ALIGN((unsigned long)&_start))
44 #endif
45
46 /*
47 * Roughly size the vmemmap space to be large enough to fit enough
48 * struct pages to map half the virtual address space. Then
49 * position vmemmap directly below the VMALLOC region.
50 */
51 #define VMEMMAP_SHIFT \
52 (CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
53 #define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT)
54 #define VMEMMAP_END (VMALLOC_START - 1)
55 #define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE)
56
57 /*
58 * Define vmemmap for pfn_to_page & page_to_pfn calls. Needed if kernel
59 * is configured with CONFIG_SPARSEMEM_VMEMMAP enabled.
60 */
61 #define vmemmap ((struct page *)VMEMMAP_START)
62
63 #define PCI_IO_SIZE SZ_16M
64 #define PCI_IO_END VMEMMAP_START
65 #define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
66
67 #define FIXADDR_TOP PCI_IO_START
68 #ifdef CONFIG_64BIT
69 #define MAX_FDT_SIZE PMD_SIZE
70 #define FIX_FDT_SIZE (MAX_FDT_SIZE + SZ_2M)
71 #define FIXADDR_SIZE (PMD_SIZE + FIX_FDT_SIZE)
72 #else
73 #define MAX_FDT_SIZE PGDIR_SIZE
74 #define FIX_FDT_SIZE MAX_FDT_SIZE
75 #define FIXADDR_SIZE (PGDIR_SIZE + FIX_FDT_SIZE)
76 #endif
77 #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
78
79 #endif
80
81 #ifdef CONFIG_XIP_KERNEL
82 #define XIP_OFFSET SZ_8M
83 #else
84 #define XIP_OFFSET 0
85 #endif
86
87 #ifndef __ASSEMBLY__
88
89 /* Page Upper Directory not used in RISC-V */
90 #include <asm-generic/pgtable-nopud.h>
91 #include <asm/page.h>
92 #include <asm/tlbflush.h>
93 #include <linux/mm_types.h>
94
95 #ifdef CONFIG_64BIT
96 #include <asm/pgtable-64.h>
97 #else
98 #include <asm/pgtable-32.h>
99 #endif /* CONFIG_64BIT */
100
101 #ifdef CONFIG_XIP_KERNEL
102 #define XIP_FIXUP(addr) ({ \
103 uintptr_t __a = (uintptr_t)(addr); \
104 (__a >= CONFIG_XIP_PHYS_ADDR && __a < CONFIG_XIP_PHYS_ADDR + SZ_16M) ? \
105 __a - CONFIG_XIP_PHYS_ADDR + CONFIG_PHYS_RAM_BASE - XIP_OFFSET :\
106 __a; \
107 })
108 #else
109 #define XIP_FIXUP(addr) (addr)
110 #endif /* CONFIG_XIP_KERNEL */
111
112 #ifdef CONFIG_MMU
113 /* Number of entries in the page global directory */
114 #define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t))
115 /* Number of entries in the page table */
116 #define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t))
117
118 /* Number of PGD entries that a user-mode program can use */
119 #define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
120
121 /* Page protection bits */
122 #define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_USER)
123
124 #define PAGE_NONE __pgprot(_PAGE_PROT_NONE)
125 #define PAGE_READ __pgprot(_PAGE_BASE | _PAGE_READ)
126 #define PAGE_WRITE __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE)
127 #define PAGE_EXEC __pgprot(_PAGE_BASE | _PAGE_EXEC)
128 #define PAGE_READ_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
129 #define PAGE_WRITE_EXEC __pgprot(_PAGE_BASE | _PAGE_READ | \
130 _PAGE_EXEC | _PAGE_WRITE)
131
132 #define PAGE_COPY PAGE_READ
133 #define PAGE_COPY_EXEC PAGE_EXEC
134 #define PAGE_COPY_READ_EXEC PAGE_READ_EXEC
135 #define PAGE_SHARED PAGE_WRITE
136 #define PAGE_SHARED_EXEC PAGE_WRITE_EXEC
137
138 #define _PAGE_KERNEL (_PAGE_READ \
139 | _PAGE_WRITE \
140 | _PAGE_PRESENT \
141 | _PAGE_ACCESSED \
142 | _PAGE_DIRTY \
143 | _PAGE_GLOBAL)
144
145 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
146 #define PAGE_KERNEL_READ __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
147 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_KERNEL | _PAGE_EXEC)
148 #define PAGE_KERNEL_READ_EXEC __pgprot((_PAGE_KERNEL & ~_PAGE_WRITE) \
149 | _PAGE_EXEC)
150
151 #define PAGE_TABLE __pgprot(_PAGE_TABLE)
152
153 /*
154 * The RISC-V ISA doesn't yet specify how to query or modify PMAs, so we can't
155 * change the properties of memory regions.
156 */
157 #define _PAGE_IOREMAP _PAGE_KERNEL
158
159 extern pgd_t swapper_pg_dir[];
160
161 /* MAP_PRIVATE permissions: xwr (copy-on-write) */
162 #define __P000 PAGE_NONE
163 #define __P001 PAGE_READ
164 #define __P010 PAGE_COPY
165 #define __P011 PAGE_COPY
166 #define __P100 PAGE_EXEC
167 #define __P101 PAGE_READ_EXEC
168 #define __P110 PAGE_COPY_EXEC
169 #define __P111 PAGE_COPY_READ_EXEC
170
171 /* MAP_SHARED permissions: xwr */
172 #define __S000 PAGE_NONE
173 #define __S001 PAGE_READ
174 #define __S010 PAGE_SHARED
175 #define __S011 PAGE_SHARED
176 #define __S100 PAGE_EXEC
177 #define __S101 PAGE_READ_EXEC
178 #define __S110 PAGE_SHARED_EXEC
179 #define __S111 PAGE_SHARED_EXEC
180
181 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
pmd_present(pmd_t pmd)182 static inline int pmd_present(pmd_t pmd)
183 {
184 /*
185 * Checking for _PAGE_LEAF is needed too because:
186 * When splitting a THP, split_huge_page() will temporarily clear
187 * the present bit, in this situation, pmd_present() and
188 * pmd_trans_huge() still needs to return true.
189 */
190 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE | _PAGE_LEAF));
191 }
192 #else
pmd_present(pmd_t pmd)193 static inline int pmd_present(pmd_t pmd)
194 {
195 return (pmd_val(pmd) & (_PAGE_PRESENT | _PAGE_PROT_NONE));
196 }
197 #endif
198
pmd_none(pmd_t pmd)199 static inline int pmd_none(pmd_t pmd)
200 {
201 return (pmd_val(pmd) == 0);
202 }
203
pmd_bad(pmd_t pmd)204 static inline int pmd_bad(pmd_t pmd)
205 {
206 return !pmd_present(pmd) || (pmd_val(pmd) & _PAGE_LEAF);
207 }
208
209 #define pmd_leaf pmd_leaf
pmd_leaf(pmd_t pmd)210 static inline int pmd_leaf(pmd_t pmd)
211 {
212 return pmd_present(pmd) && (pmd_val(pmd) & _PAGE_LEAF);
213 }
214
set_pmd(pmd_t * pmdp,pmd_t pmd)215 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
216 {
217 *pmdp = pmd;
218 }
219
pmd_clear(pmd_t * pmdp)220 static inline void pmd_clear(pmd_t *pmdp)
221 {
222 set_pmd(pmdp, __pmd(0));
223 }
224
pfn_pgd(unsigned long pfn,pgprot_t prot)225 static inline pgd_t pfn_pgd(unsigned long pfn, pgprot_t prot)
226 {
227 return __pgd((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot));
228 }
229
_pgd_pfn(pgd_t pgd)230 static inline unsigned long _pgd_pfn(pgd_t pgd)
231 {
232 return pgd_val(pgd) >> _PAGE_PFN_SHIFT;
233 }
234
pmd_page(pmd_t pmd)235 static inline struct page *pmd_page(pmd_t pmd)
236 {
237 return pfn_to_page(pmd_val(pmd) >> _PAGE_PFN_SHIFT);
238 }
239
pmd_page_vaddr(pmd_t pmd)240 static inline unsigned long pmd_page_vaddr(pmd_t pmd)
241 {
242 return (unsigned long)pfn_to_virt(pmd_val(pmd) >> _PAGE_PFN_SHIFT);
243 }
244
pmd_pte(pmd_t pmd)245 static inline pte_t pmd_pte(pmd_t pmd)
246 {
247 return __pte(pmd_val(pmd));
248 }
249
pud_pte(pud_t pud)250 static inline pte_t pud_pte(pud_t pud)
251 {
252 return __pte(pud_val(pud));
253 }
254
255 /* Yields the page frame number (PFN) of a page table entry */
pte_pfn(pte_t pte)256 static inline unsigned long pte_pfn(pte_t pte)
257 {
258 return (pte_val(pte) >> _PAGE_PFN_SHIFT);
259 }
260
261 #define pte_page(x) pfn_to_page(pte_pfn(x))
262
263 /* Constructs a page table entry */
pfn_pte(unsigned long pfn,pgprot_t prot)264 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot)
265 {
266 return __pte((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot));
267 }
268
269 #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
270
pte_present(pte_t pte)271 static inline int pte_present(pte_t pte)
272 {
273 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE));
274 }
275
pte_none(pte_t pte)276 static inline int pte_none(pte_t pte)
277 {
278 return (pte_val(pte) == 0);
279 }
280
pte_write(pte_t pte)281 static inline int pte_write(pte_t pte)
282 {
283 return pte_val(pte) & _PAGE_WRITE;
284 }
285
pte_exec(pte_t pte)286 static inline int pte_exec(pte_t pte)
287 {
288 return pte_val(pte) & _PAGE_EXEC;
289 }
290
pte_huge(pte_t pte)291 static inline int pte_huge(pte_t pte)
292 {
293 return pte_present(pte) && (pte_val(pte) & _PAGE_LEAF);
294 }
295
pte_dirty(pte_t pte)296 static inline int pte_dirty(pte_t pte)
297 {
298 return pte_val(pte) & _PAGE_DIRTY;
299 }
300
pte_young(pte_t pte)301 static inline int pte_young(pte_t pte)
302 {
303 return pte_val(pte) & _PAGE_ACCESSED;
304 }
305
pte_special(pte_t pte)306 static inline int pte_special(pte_t pte)
307 {
308 return pte_val(pte) & _PAGE_SPECIAL;
309 }
310
311 /* static inline pte_t pte_rdprotect(pte_t pte) */
312
pte_wrprotect(pte_t pte)313 static inline pte_t pte_wrprotect(pte_t pte)
314 {
315 return __pte(pte_val(pte) & ~(_PAGE_WRITE));
316 }
317
318 /* static inline pte_t pte_mkread(pte_t pte) */
319
pte_mkwrite(pte_t pte)320 static inline pte_t pte_mkwrite(pte_t pte)
321 {
322 return __pte(pte_val(pte) | _PAGE_WRITE);
323 }
324
325 /* static inline pte_t pte_mkexec(pte_t pte) */
326
pte_mkdirty(pte_t pte)327 static inline pte_t pte_mkdirty(pte_t pte)
328 {
329 return __pte(pte_val(pte) | _PAGE_DIRTY);
330 }
331
pte_mkclean(pte_t pte)332 static inline pte_t pte_mkclean(pte_t pte)
333 {
334 return __pte(pte_val(pte) & ~(_PAGE_DIRTY));
335 }
336
pte_mkyoung(pte_t pte)337 static inline pte_t pte_mkyoung(pte_t pte)
338 {
339 return __pte(pte_val(pte) | _PAGE_ACCESSED);
340 }
341
pte_mkold(pte_t pte)342 static inline pte_t pte_mkold(pte_t pte)
343 {
344 return __pte(pte_val(pte) & ~(_PAGE_ACCESSED));
345 }
346
pte_mkspecial(pte_t pte)347 static inline pte_t pte_mkspecial(pte_t pte)
348 {
349 return __pte(pte_val(pte) | _PAGE_SPECIAL);
350 }
351
pte_mkhuge(pte_t pte)352 static inline pte_t pte_mkhuge(pte_t pte)
353 {
354 return pte;
355 }
356
357 #ifdef CONFIG_NUMA_BALANCING
358 /*
359 * See the comment in include/asm-generic/pgtable.h
360 */
pte_protnone(pte_t pte)361 static inline int pte_protnone(pte_t pte)
362 {
363 return (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROT_NONE)) == _PAGE_PROT_NONE;
364 }
365
pmd_protnone(pmd_t pmd)366 static inline int pmd_protnone(pmd_t pmd)
367 {
368 return pte_protnone(pmd_pte(pmd));
369 }
370 #endif
371
372 /* Modify page protection bits */
pte_modify(pte_t pte,pgprot_t newprot)373 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
374 {
375 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
376 }
377
378 #define pgd_ERROR(e) \
379 pr_err("%s:%d: bad pgd " PTE_FMT ".\n", __FILE__, __LINE__, pgd_val(e))
380
381
382 /* Commit new configuration to MMU hardware */
update_mmu_cache(struct vm_area_struct * vma,unsigned long address,pte_t * ptep)383 static inline void update_mmu_cache(struct vm_area_struct *vma,
384 unsigned long address, pte_t *ptep)
385 {
386 /*
387 * The kernel assumes that TLBs don't cache invalid entries, but
388 * in RISC-V, SFENCE.VMA specifies an ordering constraint, not a
389 * cache flush; it is necessary even after writing invalid entries.
390 * Relying on flush_tlb_fix_spurious_fault would suffice, but
391 * the extra traps reduce performance. So, eagerly SFENCE.VMA.
392 */
393 local_flush_tlb_page(address);
394 }
395
update_mmu_cache_pmd(struct vm_area_struct * vma,unsigned long address,pmd_t * pmdp)396 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
397 unsigned long address, pmd_t *pmdp)
398 {
399 pte_t *ptep = (pte_t *)pmdp;
400
401 update_mmu_cache(vma, address, ptep);
402 }
403
404 #define __HAVE_ARCH_PTE_SAME
pte_same(pte_t pte_a,pte_t pte_b)405 static inline int pte_same(pte_t pte_a, pte_t pte_b)
406 {
407 return pte_val(pte_a) == pte_val(pte_b);
408 }
409
410 /*
411 * Certain architectures need to do special things when PTEs within
412 * a page table are directly modified. Thus, the following hook is
413 * made available.
414 */
set_pte(pte_t * ptep,pte_t pteval)415 static inline void set_pte(pte_t *ptep, pte_t pteval)
416 {
417 *ptep = pteval;
418 }
419
420 void flush_icache_pte(pte_t pte);
421
set_pte_at(struct mm_struct * mm,unsigned long addr,pte_t * ptep,pte_t pteval)422 static inline void set_pte_at(struct mm_struct *mm,
423 unsigned long addr, pte_t *ptep, pte_t pteval)
424 {
425 if (pte_present(pteval) && pte_exec(pteval))
426 flush_icache_pte(pteval);
427
428 set_pte(ptep, pteval);
429 }
430
pte_clear(struct mm_struct * mm,unsigned long addr,pte_t * ptep)431 static inline void pte_clear(struct mm_struct *mm,
432 unsigned long addr, pte_t *ptep)
433 {
434 set_pte_at(mm, addr, ptep, __pte(0));
435 }
436
437 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ptep_set_access_flags(struct vm_area_struct * vma,unsigned long address,pte_t * ptep,pte_t entry,int dirty)438 static inline int ptep_set_access_flags(struct vm_area_struct *vma,
439 unsigned long address, pte_t *ptep,
440 pte_t entry, int dirty)
441 {
442 if (!pte_same(*ptep, entry))
443 set_pte_at(vma->vm_mm, address, ptep, entry);
444 /*
445 * update_mmu_cache will unconditionally execute, handling both
446 * the case that the PTE changed and the spurious fault case.
447 */
448 return true;
449 }
450
451 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
ptep_get_and_clear(struct mm_struct * mm,unsigned long address,pte_t * ptep)452 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
453 unsigned long address, pte_t *ptep)
454 {
455 return __pte(atomic_long_xchg((atomic_long_t *)ptep, 0));
456 }
457
458 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
ptep_test_and_clear_young(struct vm_area_struct * vma,unsigned long address,pte_t * ptep)459 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
460 unsigned long address,
461 pte_t *ptep)
462 {
463 if (!pte_young(*ptep))
464 return 0;
465 return test_and_clear_bit(_PAGE_ACCESSED_OFFSET, &pte_val(*ptep));
466 }
467
468 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
ptep_set_wrprotect(struct mm_struct * mm,unsigned long address,pte_t * ptep)469 static inline void ptep_set_wrprotect(struct mm_struct *mm,
470 unsigned long address, pte_t *ptep)
471 {
472 atomic_long_and(~(unsigned long)_PAGE_WRITE, (atomic_long_t *)ptep);
473 }
474
475 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
ptep_clear_flush_young(struct vm_area_struct * vma,unsigned long address,pte_t * ptep)476 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
477 unsigned long address, pte_t *ptep)
478 {
479 /*
480 * This comment is borrowed from x86, but applies equally to RISC-V:
481 *
482 * Clearing the accessed bit without a TLB flush
483 * doesn't cause data corruption. [ It could cause incorrect
484 * page aging and the (mistaken) reclaim of hot pages, but the
485 * chance of that should be relatively low. ]
486 *
487 * So as a performance optimization don't flush the TLB when
488 * clearing the accessed bit, it will eventually be flushed by
489 * a context switch or a VM operation anyway. [ In the rare
490 * event of it not getting flushed for a long time the delay
491 * shouldn't really matter because there's no real memory
492 * pressure for swapout to react to. ]
493 */
494 return ptep_test_and_clear_young(vma, address, ptep);
495 }
496
497 /*
498 * THP functions
499 */
pte_pmd(pte_t pte)500 static inline pmd_t pte_pmd(pte_t pte)
501 {
502 return __pmd(pte_val(pte));
503 }
504
pmd_mkhuge(pmd_t pmd)505 static inline pmd_t pmd_mkhuge(pmd_t pmd)
506 {
507 return pmd;
508 }
509
pmd_mkinvalid(pmd_t pmd)510 static inline pmd_t pmd_mkinvalid(pmd_t pmd)
511 {
512 return __pmd(pmd_val(pmd) & ~(_PAGE_PRESENT|_PAGE_PROT_NONE));
513 }
514
515 #define __pmd_to_phys(pmd) (pmd_val(pmd) >> _PAGE_PFN_SHIFT << PAGE_SHIFT)
516
pmd_pfn(pmd_t pmd)517 static inline unsigned long pmd_pfn(pmd_t pmd)
518 {
519 return ((__pmd_to_phys(pmd) & PMD_MASK) >> PAGE_SHIFT);
520 }
521
pmd_modify(pmd_t pmd,pgprot_t newprot)522 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
523 {
524 return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
525 }
526
527 #define pmd_write pmd_write
pmd_write(pmd_t pmd)528 static inline int pmd_write(pmd_t pmd)
529 {
530 return pte_write(pmd_pte(pmd));
531 }
532
pmd_dirty(pmd_t pmd)533 static inline int pmd_dirty(pmd_t pmd)
534 {
535 return pte_dirty(pmd_pte(pmd));
536 }
537
pmd_young(pmd_t pmd)538 static inline int pmd_young(pmd_t pmd)
539 {
540 return pte_young(pmd_pte(pmd));
541 }
542
pmd_mkold(pmd_t pmd)543 static inline pmd_t pmd_mkold(pmd_t pmd)
544 {
545 return pte_pmd(pte_mkold(pmd_pte(pmd)));
546 }
547
pmd_mkyoung(pmd_t pmd)548 static inline pmd_t pmd_mkyoung(pmd_t pmd)
549 {
550 return pte_pmd(pte_mkyoung(pmd_pte(pmd)));
551 }
552
pmd_mkwrite(pmd_t pmd)553 static inline pmd_t pmd_mkwrite(pmd_t pmd)
554 {
555 return pte_pmd(pte_mkwrite(pmd_pte(pmd)));
556 }
557
pmd_wrprotect(pmd_t pmd)558 static inline pmd_t pmd_wrprotect(pmd_t pmd)
559 {
560 return pte_pmd(pte_wrprotect(pmd_pte(pmd)));
561 }
562
pmd_mkclean(pmd_t pmd)563 static inline pmd_t pmd_mkclean(pmd_t pmd)
564 {
565 return pte_pmd(pte_mkclean(pmd_pte(pmd)));
566 }
567
pmd_mkdirty(pmd_t pmd)568 static inline pmd_t pmd_mkdirty(pmd_t pmd)
569 {
570 return pte_pmd(pte_mkdirty(pmd_pte(pmd)));
571 }
572
set_pmd_at(struct mm_struct * mm,unsigned long addr,pmd_t * pmdp,pmd_t pmd)573 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
574 pmd_t *pmdp, pmd_t pmd)
575 {
576 return set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd));
577 }
578
set_pud_at(struct mm_struct * mm,unsigned long addr,pud_t * pudp,pud_t pud)579 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
580 pud_t *pudp, pud_t pud)
581 {
582 return set_pte_at(mm, addr, (pte_t *)pudp, pud_pte(pud));
583 }
584
585 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
pmd_trans_huge(pmd_t pmd)586 static inline int pmd_trans_huge(pmd_t pmd)
587 {
588 return pmd_leaf(pmd);
589 }
590
591 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
pmdp_set_access_flags(struct vm_area_struct * vma,unsigned long address,pmd_t * pmdp,pmd_t entry,int dirty)592 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
593 unsigned long address, pmd_t *pmdp,
594 pmd_t entry, int dirty)
595 {
596 return ptep_set_access_flags(vma, address, (pte_t *)pmdp, pmd_pte(entry), dirty);
597 }
598
599 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
pmdp_test_and_clear_young(struct vm_area_struct * vma,unsigned long address,pmd_t * pmdp)600 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
601 unsigned long address, pmd_t *pmdp)
602 {
603 return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
604 }
605
606 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
pmdp_huge_get_and_clear(struct mm_struct * mm,unsigned long address,pmd_t * pmdp)607 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
608 unsigned long address, pmd_t *pmdp)
609 {
610 return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp));
611 }
612
613 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
pmdp_set_wrprotect(struct mm_struct * mm,unsigned long address,pmd_t * pmdp)614 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
615 unsigned long address, pmd_t *pmdp)
616 {
617 ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
618 }
619
620 #define pmdp_establish pmdp_establish
pmdp_establish(struct vm_area_struct * vma,unsigned long address,pmd_t * pmdp,pmd_t pmd)621 static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
622 unsigned long address, pmd_t *pmdp, pmd_t pmd)
623 {
624 return __pmd(atomic_long_xchg((atomic_long_t *)pmdp, pmd_val(pmd)));
625 }
626 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
627
628 /*
629 * Encode and decode a swap entry
630 *
631 * Format of swap PTE:
632 * bit 0: _PAGE_PRESENT (zero)
633 * bit 1: _PAGE_PROT_NONE (zero)
634 * bits 2 to 6: swap type
635 * bits 7 to XLEN-1: swap offset
636 */
637 #define __SWP_TYPE_SHIFT 2
638 #define __SWP_TYPE_BITS 5
639 #define __SWP_TYPE_MASK ((1UL << __SWP_TYPE_BITS) - 1)
640 #define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
641
642 #define MAX_SWAPFILES_CHECK() \
643 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
644
645 #define __swp_type(x) (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
646 #define __swp_offset(x) ((x).val >> __SWP_OFFSET_SHIFT)
647 #define __swp_entry(type, offset) ((swp_entry_t) \
648 { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
649
650 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
651 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
652
653 /*
654 * In the RV64 Linux scheme, we give the user half of the virtual-address space
655 * and give the kernel the other (upper) half.
656 */
657 #ifdef CONFIG_64BIT
658 #define KERN_VIRT_START (-(BIT(CONFIG_VA_BITS)) + TASK_SIZE)
659 #else
660 #define KERN_VIRT_START FIXADDR_START
661 #endif
662
663 /*
664 * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32.
665 * Note that PGDIR_SIZE must evenly divide TASK_SIZE.
666 */
667 #ifdef CONFIG_64BIT
668 #define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2)
669 #else
670 #define TASK_SIZE FIXADDR_START
671 #endif
672
673 #else /* CONFIG_MMU */
674
675 #define PAGE_SHARED __pgprot(0)
676 #define PAGE_KERNEL __pgprot(0)
677 #define swapper_pg_dir NULL
678 #define TASK_SIZE 0xffffffffUL
679 #define VMALLOC_START 0
680 #define VMALLOC_END TASK_SIZE
681
682 #endif /* !CONFIG_MMU */
683
684 #define kern_addr_valid(addr) (1) /* FIXME */
685
686 extern char _start[];
687 extern void *_dtb_early_va;
688 extern uintptr_t _dtb_early_pa;
689 #if defined(CONFIG_XIP_KERNEL) && defined(CONFIG_MMU)
690 #define dtb_early_va (*(void **)XIP_FIXUP(&_dtb_early_va))
691 #define dtb_early_pa (*(uintptr_t *)XIP_FIXUP(&_dtb_early_pa))
692 #else
693 #define dtb_early_va _dtb_early_va
694 #define dtb_early_pa _dtb_early_pa
695 #endif /* CONFIG_XIP_KERNEL */
696
697 void paging_init(void);
698 void misc_mem_init(void);
699
700 /*
701 * ZERO_PAGE is a global shared page that is always zero,
702 * used for zero-mapped memory areas, etc.
703 */
704 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
705 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
706
707 #endif /* !__ASSEMBLY__ */
708
709 #endif /* _ASM_RISCV_PGTABLE_H */
710