/arch/mips/include/asm/mach-pic32/ |
D | pic32.h | 14 #define PIC32_CLR(_reg) ((_reg) + 0x04) argument 15 #define PIC32_SET(_reg) ((_reg) + 0x08) argument 16 #define PIC32_INV(_reg) ((_reg) + 0x0C) argument
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/arch/mips/include/asm/ |
D | kvm_host.h | 437 #define __BUILD_KVM_RW_SAVED(name, type, _reg, sel) \ argument 449 #define __BUILD_KVM_SET_SAVED(name, type, _reg, sel) \ argument 470 #define __BUILD_KVM_ATOMIC_SAVED(name, type, _reg, sel) \ argument 495 #define __BUILD_KVM_RW_VZ(name, type, _reg, sel) \ argument 507 #define __BUILD_KVM_SET_VZ(name, type, _reg, sel) \ argument 526 #define __BUILD_KVM_SAVE_VZ(name, _reg, sel) \ argument 578 #define __BUILD_KVM_RW_SW(name, type, _reg, sel) \ argument 582 #define __BUILD_KVM_SET_SW(name, type, _reg, sel) \ argument 586 #define __BUILD_KVM_ATOMIC_SW(name, type, _reg, sel) \ argument 605 #define __BUILD_KVM_RW_HW(name, type, _reg, sel) \ argument [all …]
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/arch/powerpc/kernel/ptrace/ |
D | ptrace.c | 388 #define CHECK_REG(_pt, _reg) \ in pt_regs_check() argument
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/arch/sh/kernel/cpu/sh4a/ |
D | clock-sh7366.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument 128 #define MSTP(_parent, _reg, _bit, _flags) \ argument
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D | clock-sh7343.c | 105 #define DIV4(_reg, _bit, _mask, _flags) \ argument 125 #define MSTP(_parent, _reg, _bit, _flags) \ argument
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D | clock-sh7723.c | 111 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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D | clock-sh7722.c | 108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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D | clock-sh7724.c | 150 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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D | clock-sh7734.c | 69 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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/arch/sh/kernel/cpu/sh2a/ |
D | clock-sh7264.c | 77 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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D | clock-sh7269.c | 105 #define DIV4(_reg, _bit, _mask, _flags) \ argument
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/arch/ia64/kernel/ |
D | head.S | 65 #define SAVE_ONE_RR(num, _reg, _tmp) \ argument
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/arch/x86/kvm/vmx/ |
D | vmx.c | 7216 #define cr4_fixed1_update(_cr4_mask, _reg, _cpuid_mask) do { \ in nested_vmx_cr_fixed1_bits_update() argument
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