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1 /*
2  * Copyright 2014 Advanced Micro Devices, Inc.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * The above copyright notice and this permission notice (including the
22  * next paragraph) shall be included in all copies or substantial portions
23  * of the Software.
24  *
25  */
26 /*
27  * Authors:
28  *    Christian König <christian.koenig@amd.com>
29  */
30 
31 #include <linux/dma-fence-chain.h>
32 
33 #include "amdgpu.h"
34 #include "amdgpu_trace.h"
35 #include "amdgpu_amdkfd.h"
36 
37 struct amdgpu_sync_entry {
38 	struct hlist_node	node;
39 	struct dma_fence	*fence;
40 };
41 
42 static struct kmem_cache *amdgpu_sync_slab;
43 
44 /**
45  * amdgpu_sync_create - zero init sync object
46  *
47  * @sync: sync object to initialize
48  *
49  * Just clear the sync object for now.
50  */
amdgpu_sync_create(struct amdgpu_sync * sync)51 void amdgpu_sync_create(struct amdgpu_sync *sync)
52 {
53 	hash_init(sync->fences);
54 	sync->last_vm_update = NULL;
55 }
56 
57 /**
58  * amdgpu_sync_same_dev - test if fence belong to us
59  *
60  * @adev: amdgpu device to use for the test
61  * @f: fence to test
62  *
63  * Test if the fence was issued by us.
64  */
amdgpu_sync_same_dev(struct amdgpu_device * adev,struct dma_fence * f)65 static bool amdgpu_sync_same_dev(struct amdgpu_device *adev,
66 				 struct dma_fence *f)
67 {
68 	struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
69 
70 	if (s_fence) {
71 		struct amdgpu_ring *ring;
72 
73 		ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
74 		return ring->adev == adev;
75 	}
76 
77 	return false;
78 }
79 
80 /**
81  * amdgpu_sync_get_owner - extract the owner of a fence
82  *
83  * @f: fence get the owner from
84  *
85  * Extract who originally created the fence.
86  */
amdgpu_sync_get_owner(struct dma_fence * f)87 static void *amdgpu_sync_get_owner(struct dma_fence *f)
88 {
89 	struct drm_sched_fence *s_fence;
90 	struct amdgpu_amdkfd_fence *kfd_fence;
91 
92 	if (!f)
93 		return AMDGPU_FENCE_OWNER_UNDEFINED;
94 
95 	s_fence = to_drm_sched_fence(f);
96 	if (s_fence)
97 		return s_fence->owner;
98 
99 	kfd_fence = to_amdgpu_amdkfd_fence(f);
100 	if (kfd_fence)
101 		return AMDGPU_FENCE_OWNER_KFD;
102 
103 	return AMDGPU_FENCE_OWNER_UNDEFINED;
104 }
105 
106 /**
107  * amdgpu_sync_keep_later - Keep the later fence
108  *
109  * @keep: existing fence to test
110  * @fence: new fence
111  *
112  * Either keep the existing fence or the new one, depending which one is later.
113  */
amdgpu_sync_keep_later(struct dma_fence ** keep,struct dma_fence * fence)114 static void amdgpu_sync_keep_later(struct dma_fence **keep,
115 				   struct dma_fence *fence)
116 {
117 	if (*keep && dma_fence_is_later(*keep, fence))
118 		return;
119 
120 	dma_fence_put(*keep);
121 	*keep = dma_fence_get(fence);
122 }
123 
124 /**
125  * amdgpu_sync_add_later - add the fence to the hash
126  *
127  * @sync: sync object to add the fence to
128  * @f: fence to add
129  *
130  * Tries to add the fence to an existing hash entry. Returns true when an entry
131  * was found, false otherwise.
132  */
amdgpu_sync_add_later(struct amdgpu_sync * sync,struct dma_fence * f)133 static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f)
134 {
135 	struct amdgpu_sync_entry *e;
136 
137 	hash_for_each_possible(sync->fences, e, node, f->context) {
138 		if (unlikely(e->fence->context != f->context))
139 			continue;
140 
141 		amdgpu_sync_keep_later(&e->fence, f);
142 		return true;
143 	}
144 	return false;
145 }
146 
147 /**
148  * amdgpu_sync_fence - remember to sync to this fence
149  *
150  * @sync: sync object to add fence to
151  * @f: fence to sync to
152  *
153  * Add the fence to the sync object.
154  */
amdgpu_sync_fence(struct amdgpu_sync * sync,struct dma_fence * f)155 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f)
156 {
157 	struct amdgpu_sync_entry *e;
158 
159 	if (!f)
160 		return 0;
161 
162 	if (amdgpu_sync_add_later(sync, f))
163 		return 0;
164 
165 	e = kmem_cache_alloc(amdgpu_sync_slab, GFP_KERNEL);
166 	if (!e)
167 		return -ENOMEM;
168 
169 	hash_add(sync->fences, &e->node, f->context);
170 	e->fence = dma_fence_get(f);
171 	return 0;
172 }
173 
174 /**
175  * amdgpu_sync_vm_fence - remember to sync to this VM fence
176  *
177  * @sync: sync object to add fence to
178  * @fence: the VM fence to add
179  *
180  * Add the fence to the sync object and remember it as VM update.
181  */
amdgpu_sync_vm_fence(struct amdgpu_sync * sync,struct dma_fence * fence)182 int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence)
183 {
184 	if (!fence)
185 		return 0;
186 
187 	amdgpu_sync_keep_later(&sync->last_vm_update, fence);
188 	return amdgpu_sync_fence(sync, fence);
189 }
190 
191 /* Determine based on the owner and mode if we should sync to a fence or not */
amdgpu_sync_test_fence(struct amdgpu_device * adev,enum amdgpu_sync_mode mode,void * owner,struct dma_fence * f)192 static bool amdgpu_sync_test_fence(struct amdgpu_device *adev,
193 				   enum amdgpu_sync_mode mode,
194 				   void *owner, struct dma_fence *f)
195 {
196 	void *fence_owner = amdgpu_sync_get_owner(f);
197 
198 	/* Always sync to moves, no matter what */
199 	if (fence_owner == AMDGPU_FENCE_OWNER_UNDEFINED)
200 		return true;
201 
202 	/* We only want to trigger KFD eviction fences on
203 	 * evict or move jobs. Skip KFD fences otherwise.
204 	 */
205 	if (fence_owner == AMDGPU_FENCE_OWNER_KFD &&
206 	    owner != AMDGPU_FENCE_OWNER_UNDEFINED)
207 		return false;
208 
209 	/* Never sync to VM updates either. */
210 	if (fence_owner == AMDGPU_FENCE_OWNER_VM &&
211 	    owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
212 	    owner != AMDGPU_FENCE_OWNER_KFD)
213 		return false;
214 
215 	/* Ignore fences depending on the sync mode */
216 	switch (mode) {
217 	case AMDGPU_SYNC_ALWAYS:
218 		return true;
219 
220 	case AMDGPU_SYNC_NE_OWNER:
221 		if (amdgpu_sync_same_dev(adev, f) &&
222 		    fence_owner == owner)
223 			return false;
224 		break;
225 
226 	case AMDGPU_SYNC_EQ_OWNER:
227 		if (amdgpu_sync_same_dev(adev, f) &&
228 		    fence_owner != owner)
229 			return false;
230 		break;
231 
232 	case AMDGPU_SYNC_EXPLICIT:
233 		return false;
234 	}
235 
236 	WARN(debug_evictions && fence_owner == AMDGPU_FENCE_OWNER_KFD,
237 	     "Adding eviction fence to sync obj");
238 	return true;
239 }
240 
241 /**
242  * amdgpu_sync_resv - sync to a reservation object
243  *
244  * @adev: amdgpu device
245  * @sync: sync object to add fences from reservation object to
246  * @resv: reservation object with embedded fence
247  * @mode: how owner affects which fences we sync to
248  * @owner: owner of the planned job submission
249  *
250  * Sync to the fence
251  */
amdgpu_sync_resv(struct amdgpu_device * adev,struct amdgpu_sync * sync,struct dma_resv * resv,enum amdgpu_sync_mode mode,void * owner)252 int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,
253 		     struct dma_resv *resv, enum amdgpu_sync_mode mode,
254 		     void *owner)
255 {
256 	struct dma_resv_list *flist;
257 	struct dma_fence *f;
258 	unsigned i;
259 	int r = 0;
260 
261 	if (resv == NULL)
262 		return -EINVAL;
263 
264 	/* always sync to the exclusive fence */
265 	f = dma_resv_excl_fence(resv);
266 	dma_fence_chain_for_each(f, f) {
267 		struct dma_fence_chain *chain = to_dma_fence_chain(f);
268 
269 		if (amdgpu_sync_test_fence(adev, mode, owner, chain ?
270 					   chain->fence : f)) {
271 			r = amdgpu_sync_fence(sync, f);
272 			dma_fence_put(f);
273 			if (r)
274 				return r;
275 			break;
276 		}
277 	}
278 
279 	flist = dma_resv_shared_list(resv);
280 	if (!flist)
281 		return 0;
282 
283 	for (i = 0; i < flist->shared_count; ++i) {
284 		f = rcu_dereference_protected(flist->shared[i],
285 					      dma_resv_held(resv));
286 
287 		if (amdgpu_sync_test_fence(adev, mode, owner, f)) {
288 			r = amdgpu_sync_fence(sync, f);
289 			if (r)
290 				return r;
291 		}
292 	}
293 	return 0;
294 }
295 
296 /**
297  * amdgpu_sync_peek_fence - get the next fence not signaled yet
298  *
299  * @sync: the sync object
300  * @ring: optional ring to use for test
301  *
302  * Returns the next fence not signaled yet without removing it from the sync
303  * object.
304  */
amdgpu_sync_peek_fence(struct amdgpu_sync * sync,struct amdgpu_ring * ring)305 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
306 					 struct amdgpu_ring *ring)
307 {
308 	struct amdgpu_sync_entry *e;
309 	struct hlist_node *tmp;
310 	int i;
311 
312 	hash_for_each_safe(sync->fences, i, tmp, e, node) {
313 		struct dma_fence *f = e->fence;
314 		struct drm_sched_fence *s_fence = to_drm_sched_fence(f);
315 
316 		if (dma_fence_is_signaled(f)) {
317 			hash_del(&e->node);
318 			dma_fence_put(f);
319 			kmem_cache_free(amdgpu_sync_slab, e);
320 			continue;
321 		}
322 		if (ring && s_fence) {
323 			/* For fences from the same ring it is sufficient
324 			 * when they are scheduled.
325 			 */
326 			if (s_fence->sched == &ring->sched) {
327 				if (dma_fence_is_signaled(&s_fence->scheduled))
328 					continue;
329 
330 				return &s_fence->scheduled;
331 			}
332 		}
333 
334 		return f;
335 	}
336 
337 	return NULL;
338 }
339 
340 /**
341  * amdgpu_sync_get_fence - get the next fence from the sync object
342  *
343  * @sync: sync object to use
344  *
345  * Get and removes the next fence from the sync object not signaled yet.
346  */
amdgpu_sync_get_fence(struct amdgpu_sync * sync)347 struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync)
348 {
349 	struct amdgpu_sync_entry *e;
350 	struct hlist_node *tmp;
351 	struct dma_fence *f;
352 	int i;
353 	hash_for_each_safe(sync->fences, i, tmp, e, node) {
354 
355 		f = e->fence;
356 
357 		hash_del(&e->node);
358 		kmem_cache_free(amdgpu_sync_slab, e);
359 
360 		if (!dma_fence_is_signaled(f))
361 			return f;
362 
363 		dma_fence_put(f);
364 	}
365 	return NULL;
366 }
367 
368 /**
369  * amdgpu_sync_clone - clone a sync object
370  *
371  * @source: sync object to clone
372  * @clone: pointer to destination sync object
373  *
374  * Adds references to all unsignaled fences in @source to @clone. Also
375  * removes signaled fences from @source while at it.
376  */
amdgpu_sync_clone(struct amdgpu_sync * source,struct amdgpu_sync * clone)377 int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone)
378 {
379 	struct amdgpu_sync_entry *e;
380 	struct hlist_node *tmp;
381 	struct dma_fence *f;
382 	int i, r;
383 
384 	hash_for_each_safe(source->fences, i, tmp, e, node) {
385 		f = e->fence;
386 		if (!dma_fence_is_signaled(f)) {
387 			r = amdgpu_sync_fence(clone, f);
388 			if (r)
389 				return r;
390 		} else {
391 			hash_del(&e->node);
392 			dma_fence_put(f);
393 			kmem_cache_free(amdgpu_sync_slab, e);
394 		}
395 	}
396 
397 	dma_fence_put(clone->last_vm_update);
398 	clone->last_vm_update = dma_fence_get(source->last_vm_update);
399 
400 	return 0;
401 }
402 
amdgpu_sync_wait(struct amdgpu_sync * sync,bool intr)403 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr)
404 {
405 	struct amdgpu_sync_entry *e;
406 	struct hlist_node *tmp;
407 	int i, r;
408 
409 	hash_for_each_safe(sync->fences, i, tmp, e, node) {
410 		r = dma_fence_wait(e->fence, intr);
411 		if (r)
412 			return r;
413 
414 		hash_del(&e->node);
415 		dma_fence_put(e->fence);
416 		kmem_cache_free(amdgpu_sync_slab, e);
417 	}
418 
419 	return 0;
420 }
421 
422 /**
423  * amdgpu_sync_free - free the sync object
424  *
425  * @sync: sync object to use
426  *
427  * Free the sync object.
428  */
amdgpu_sync_free(struct amdgpu_sync * sync)429 void amdgpu_sync_free(struct amdgpu_sync *sync)
430 {
431 	struct amdgpu_sync_entry *e;
432 	struct hlist_node *tmp;
433 	unsigned i;
434 
435 	hash_for_each_safe(sync->fences, i, tmp, e, node) {
436 		hash_del(&e->node);
437 		dma_fence_put(e->fence);
438 		kmem_cache_free(amdgpu_sync_slab, e);
439 	}
440 
441 	dma_fence_put(sync->last_vm_update);
442 }
443 
444 /**
445  * amdgpu_sync_init - init sync object subsystem
446  *
447  * Allocate the slab allocator.
448  */
amdgpu_sync_init(void)449 int amdgpu_sync_init(void)
450 {
451 	amdgpu_sync_slab = kmem_cache_create(
452 		"amdgpu_sync", sizeof(struct amdgpu_sync_entry), 0,
453 		SLAB_HWCACHE_ALIGN, NULL);
454 	if (!amdgpu_sync_slab)
455 		return -ENOMEM;
456 
457 	return 0;
458 }
459 
460 /**
461  * amdgpu_sync_fini - fini sync object subsystem
462  *
463  * Free the slab allocator.
464  */
amdgpu_sync_fini(void)465 void amdgpu_sync_fini(void)
466 {
467 	kmem_cache_destroy(amdgpu_sync_slab);
468 }
469