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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * amdtp-motu.c - a part of driver for MOTU FireWire series
4  *
5  * Copyright (c) 2015-2017 Takashi Sakamoto <o-takashi@sakamocchi.jp>
6  */
7 
8 #include <linux/slab.h>
9 #include <sound/pcm.h>
10 #include "motu.h"
11 
12 #define CREATE_TRACE_POINTS
13 #include "amdtp-motu-trace.h"
14 
15 #define CIP_FMT_MOTU		0x02
16 #define CIP_FMT_MOTU_TX_V3	0x22
17 #define MOTU_FDF_AM824		0x22
18 
19 #define TICKS_PER_CYCLE		3072
20 #define CYCLES_PER_SECOND	8000
21 #define TICKS_PER_SECOND	(TICKS_PER_CYCLE * CYCLES_PER_SECOND)
22 
23 #define CIP_SPH_CYCLE_SHIFT	12
24 #define CIP_SPH_CYCLE_MASK	0x01fff000
25 #define CIP_SPH_OFFSET_MASK	0x00000fff
26 
27 /*
28  * Nominally 3125 bytes/second, but the MIDI port's clock might be
29  * 1% too slow, and the bus clock 100 ppm too fast.
30  */
31 #define MIDI_BYTES_PER_SECOND	3093
32 
33 struct amdtp_motu {
34 	unsigned int pcm_chunks;
35 	unsigned int pcm_byte_offset;
36 
37 	struct snd_rawmidi_substream *midi;
38 	unsigned int midi_ports;
39 	unsigned int midi_flag_offset;
40 	unsigned int midi_byte_offset;
41 
42 	int midi_db_count;
43 	unsigned int midi_db_interval;
44 
45 	struct amdtp_motu_cache *cache;
46 };
47 
amdtp_motu_set_parameters(struct amdtp_stream * s,unsigned int rate,unsigned int midi_ports,struct snd_motu_packet_format * formats)48 int amdtp_motu_set_parameters(struct amdtp_stream *s, unsigned int rate,
49 			      unsigned int midi_ports,
50 			      struct snd_motu_packet_format *formats)
51 {
52 	struct amdtp_motu *p = s->protocol;
53 	unsigned int pcm_chunks, data_chunks, data_block_quadlets;
54 	unsigned int mode;
55 	int i, err;
56 
57 	if (amdtp_stream_running(s))
58 		return -EBUSY;
59 
60 	for (i = 0; i < ARRAY_SIZE(snd_motu_clock_rates); ++i) {
61 		if (snd_motu_clock_rates[i] == rate) {
62 			mode = i >> 1;
63 			break;
64 		}
65 	}
66 	if (i == ARRAY_SIZE(snd_motu_clock_rates))
67 		return -EINVAL;
68 
69 	// Each data block includes SPH in its head. Data chunks follow with
70 	// 3 byte alignment. Padding follows with zero to conform to quadlet
71 	// alignment.
72 	pcm_chunks = formats->pcm_chunks[mode];
73 	data_chunks = formats->msg_chunks + pcm_chunks;
74 	data_block_quadlets = 1 + DIV_ROUND_UP(data_chunks * 3, 4);
75 
76 	err = amdtp_stream_set_parameters(s, rate, data_block_quadlets);
77 	if (err < 0)
78 		return err;
79 
80 	p->pcm_chunks = pcm_chunks;
81 	p->pcm_byte_offset = formats->pcm_byte_offset;
82 
83 	p->midi_ports = midi_ports;
84 	p->midi_flag_offset = formats->midi_flag_offset;
85 	p->midi_byte_offset = formats->midi_byte_offset;
86 
87 	p->midi_db_count = 0;
88 	p->midi_db_interval = rate / MIDI_BYTES_PER_SECOND;
89 
90 	return 0;
91 }
92 
read_pcm_s32(struct amdtp_stream * s,struct snd_pcm_substream * pcm,__be32 * buffer,unsigned int data_blocks,unsigned int pcm_frames)93 static void read_pcm_s32(struct amdtp_stream *s, struct snd_pcm_substream *pcm,
94 			 __be32 *buffer, unsigned int data_blocks,
95 			 unsigned int pcm_frames)
96 {
97 	struct amdtp_motu *p = s->protocol;
98 	unsigned int channels = p->pcm_chunks;
99 	struct snd_pcm_runtime *runtime = pcm->runtime;
100 	unsigned int pcm_buffer_pointer;
101 	int remaining_frames;
102 	u8 *byte;
103 	u32 *dst;
104 	int i, c;
105 
106 	pcm_buffer_pointer = s->pcm_buffer_pointer + pcm_frames;
107 	pcm_buffer_pointer %= runtime->buffer_size;
108 
109 	dst = (void *)runtime->dma_area +
110 				frames_to_bytes(runtime, pcm_buffer_pointer);
111 	remaining_frames = runtime->buffer_size - pcm_buffer_pointer;
112 
113 	for (i = 0; i < data_blocks; ++i) {
114 		byte = (u8 *)buffer + p->pcm_byte_offset;
115 
116 		for (c = 0; c < channels; ++c) {
117 			*dst = (byte[0] << 24) |
118 			       (byte[1] << 16) |
119 			       (byte[2] << 8);
120 			byte += 3;
121 			dst++;
122 		}
123 		buffer += s->data_block_quadlets;
124 		if (--remaining_frames == 0)
125 			dst = (void *)runtime->dma_area;
126 	}
127 }
128 
write_pcm_s32(struct amdtp_stream * s,struct snd_pcm_substream * pcm,__be32 * buffer,unsigned int data_blocks,unsigned int pcm_frames)129 static void write_pcm_s32(struct amdtp_stream *s, struct snd_pcm_substream *pcm,
130 			  __be32 *buffer, unsigned int data_blocks,
131 			  unsigned int pcm_frames)
132 {
133 	struct amdtp_motu *p = s->protocol;
134 	unsigned int channels = p->pcm_chunks;
135 	struct snd_pcm_runtime *runtime = pcm->runtime;
136 	unsigned int pcm_buffer_pointer;
137 	int remaining_frames;
138 	u8 *byte;
139 	const u32 *src;
140 	int i, c;
141 
142 	pcm_buffer_pointer = s->pcm_buffer_pointer + pcm_frames;
143 	pcm_buffer_pointer %= runtime->buffer_size;
144 
145 	src = (void *)runtime->dma_area +
146 				frames_to_bytes(runtime, pcm_buffer_pointer);
147 	remaining_frames = runtime->buffer_size - pcm_buffer_pointer;
148 
149 	for (i = 0; i < data_blocks; ++i) {
150 		byte = (u8 *)buffer + p->pcm_byte_offset;
151 
152 		for (c = 0; c < channels; ++c) {
153 			byte[0] = (*src >> 24) & 0xff;
154 			byte[1] = (*src >> 16) & 0xff;
155 			byte[2] = (*src >>  8) & 0xff;
156 			byte += 3;
157 			src++;
158 		}
159 
160 		buffer += s->data_block_quadlets;
161 		if (--remaining_frames == 0)
162 			src = (void *)runtime->dma_area;
163 	}
164 }
165 
write_pcm_silence(struct amdtp_stream * s,__be32 * buffer,unsigned int data_blocks)166 static void write_pcm_silence(struct amdtp_stream *s, __be32 *buffer,
167 			      unsigned int data_blocks)
168 {
169 	struct amdtp_motu *p = s->protocol;
170 	unsigned int channels, i, c;
171 	u8 *byte;
172 
173 	channels = p->pcm_chunks;
174 
175 	for (i = 0; i < data_blocks; ++i) {
176 		byte = (u8 *)buffer + p->pcm_byte_offset;
177 
178 		for (c = 0; c < channels; ++c) {
179 			byte[0] = 0;
180 			byte[1] = 0;
181 			byte[2] = 0;
182 			byte += 3;
183 		}
184 
185 		buffer += s->data_block_quadlets;
186 	}
187 }
188 
amdtp_motu_add_pcm_hw_constraints(struct amdtp_stream * s,struct snd_pcm_runtime * runtime)189 int amdtp_motu_add_pcm_hw_constraints(struct amdtp_stream *s,
190 				      struct snd_pcm_runtime *runtime)
191 {
192 	int err;
193 
194 	/* TODO: how to set an constraint for exactly 24bit PCM sample? */
195 	err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
196 	if (err < 0)
197 		return err;
198 
199 	return amdtp_stream_add_pcm_hw_constraints(s, runtime);
200 }
201 
amdtp_motu_midi_trigger(struct amdtp_stream * s,unsigned int port,struct snd_rawmidi_substream * midi)202 void amdtp_motu_midi_trigger(struct amdtp_stream *s, unsigned int port,
203 			     struct snd_rawmidi_substream *midi)
204 {
205 	struct amdtp_motu *p = s->protocol;
206 
207 	if (port < p->midi_ports)
208 		WRITE_ONCE(p->midi, midi);
209 }
210 
write_midi_messages(struct amdtp_stream * s,__be32 * buffer,unsigned int data_blocks)211 static void write_midi_messages(struct amdtp_stream *s, __be32 *buffer,
212 				unsigned int data_blocks)
213 {
214 	struct amdtp_motu *p = s->protocol;
215 	struct snd_rawmidi_substream *midi = READ_ONCE(p->midi);
216 	u8 *b;
217 	int i;
218 
219 	for (i = 0; i < data_blocks; i++) {
220 		b = (u8 *)buffer;
221 
222 		if (midi && p->midi_db_count == 0 &&
223 		    snd_rawmidi_transmit(midi, b + p->midi_byte_offset, 1) == 1) {
224 			b[p->midi_flag_offset] = 0x01;
225 		} else {
226 			b[p->midi_byte_offset] = 0x00;
227 			b[p->midi_flag_offset] = 0x00;
228 		}
229 
230 		buffer += s->data_block_quadlets;
231 
232 		if (--p->midi_db_count < 0)
233 			p->midi_db_count = p->midi_db_interval;
234 	}
235 }
236 
read_midi_messages(struct amdtp_stream * s,__be32 * buffer,unsigned int data_blocks)237 static void read_midi_messages(struct amdtp_stream *s, __be32 *buffer,
238 			       unsigned int data_blocks)
239 {
240 	struct amdtp_motu *p = s->protocol;
241 	struct snd_rawmidi_substream *midi;
242 	u8 *b;
243 	int i;
244 
245 	for (i = 0; i < data_blocks; i++) {
246 		b = (u8 *)buffer;
247 		midi = READ_ONCE(p->midi);
248 
249 		if (midi && (b[p->midi_flag_offset] & 0x01))
250 			snd_rawmidi_receive(midi, b + p->midi_byte_offset, 1);
251 
252 		buffer += s->data_block_quadlets;
253 	}
254 }
255 
256 /* For tracepoints. */
copy_sph(u32 * frames,__be32 * buffer,unsigned int data_blocks,unsigned int data_block_quadlets)257 static void __maybe_unused copy_sph(u32 *frames, __be32 *buffer,
258 				    unsigned int data_blocks,
259 				    unsigned int data_block_quadlets)
260 {
261 	unsigned int i;
262 
263 	for (i = 0; i < data_blocks; ++i) {
264 		*frames = be32_to_cpu(*buffer);
265 		buffer += data_block_quadlets;
266 		frames++;
267 	}
268 }
269 
270 /* For tracepoints. */
copy_message(u64 * frames,__be32 * buffer,unsigned int data_blocks,unsigned int data_block_quadlets)271 static void __maybe_unused copy_message(u64 *frames, __be32 *buffer,
272 					unsigned int data_blocks,
273 					unsigned int data_block_quadlets)
274 {
275 	unsigned int i;
276 
277 	/* This is just for v2/v3 protocol. */
278 	for (i = 0; i < data_blocks; ++i) {
279 		*frames = be32_to_cpu(buffer[1]);
280 		*frames <<= 16;
281 		*frames |= be32_to_cpu(buffer[2]) >> 16;
282 		++frames;
283 		buffer += data_block_quadlets;
284 	}
285 }
286 
probe_tracepoints_events(struct amdtp_stream * s,const struct pkt_desc * descs,unsigned int packets)287 static void probe_tracepoints_events(struct amdtp_stream *s,
288 				     const struct pkt_desc *descs,
289 				     unsigned int packets)
290 {
291 	int i;
292 
293 	for (i = 0; i < packets; ++i) {
294 		const struct pkt_desc *desc = descs + i;
295 		__be32 *buf = desc->ctx_payload;
296 		unsigned int data_blocks = desc->data_blocks;
297 
298 		trace_data_block_sph(s, data_blocks, buf);
299 		trace_data_block_message(s, data_blocks, buf);
300 	}
301 }
302 
cache_event_offsets(struct amdtp_motu_cache * cache,const __be32 * buf,unsigned int data_blocks,unsigned int data_block_quadlets)303 static void cache_event_offsets(struct amdtp_motu_cache *cache, const __be32 *buf,
304 				unsigned int data_blocks, unsigned int data_block_quadlets)
305 {
306 	unsigned int *event_offsets = cache->event_offsets;
307 	const unsigned int cache_size = cache->size;
308 	unsigned int cache_tail = cache->tail;
309 	unsigned int base_tick = cache->tx_cycle_count * TICKS_PER_CYCLE;
310 	int i;
311 
312 	for (i = 0; i < data_blocks; ++i) {
313 		u32 sph = be32_to_cpu(*buf);
314 		unsigned int tick;
315 
316 		tick = ((sph & CIP_SPH_CYCLE_MASK) >> CIP_SPH_CYCLE_SHIFT) * TICKS_PER_CYCLE +
317 		       (sph & CIP_SPH_OFFSET_MASK);
318 
319 		if (tick < base_tick)
320 			tick += TICKS_PER_SECOND;
321 		event_offsets[cache_tail] = tick - base_tick;
322 
323 		cache_tail = (cache_tail + 1) % cache_size;
324 		buf += data_block_quadlets;
325 	}
326 
327 	cache->tail = cache_tail;
328 	cache->tx_cycle_count = (cache->tx_cycle_count + 1) % CYCLES_PER_SECOND;
329 }
330 
process_ir_ctx_payloads(struct amdtp_stream * s,const struct pkt_desc * descs,unsigned int packets,struct snd_pcm_substream * pcm)331 static unsigned int process_ir_ctx_payloads(struct amdtp_stream *s,
332 					    const struct pkt_desc *descs,
333 					    unsigned int packets,
334 					    struct snd_pcm_substream *pcm)
335 {
336 	struct amdtp_motu *p = s->protocol;
337 	unsigned int pcm_frames = 0;
338 	int i;
339 
340 	if (p->cache->tx_cycle_count == UINT_MAX)
341 		p->cache->tx_cycle_count = (s->domain->processing_cycle.tx_start % CYCLES_PER_SECOND);
342 
343 	// For data block processing.
344 	for (i = 0; i < packets; ++i) {
345 		const struct pkt_desc *desc = descs + i;
346 		__be32 *buf = desc->ctx_payload;
347 		unsigned int data_blocks = desc->data_blocks;
348 
349 		cache_event_offsets(p->cache, buf, data_blocks, s->data_block_quadlets);
350 
351 		if (pcm) {
352 			read_pcm_s32(s, pcm, buf, data_blocks, pcm_frames);
353 			pcm_frames += data_blocks;
354 		}
355 
356 		if (p->midi_ports)
357 			read_midi_messages(s, buf, data_blocks);
358 	}
359 
360 	// For tracepoints.
361 	if (trace_data_block_sph_enabled() ||
362 	    trace_data_block_message_enabled())
363 		probe_tracepoints_events(s, descs, packets);
364 
365 	return pcm_frames;
366 }
367 
write_sph(struct amdtp_motu_cache * cache,__be32 * buffer,unsigned int data_blocks,unsigned int data_block_quadlets)368 static void write_sph(struct amdtp_motu_cache *cache, __be32 *buffer, unsigned int data_blocks,
369 		      unsigned int data_block_quadlets)
370 {
371 	unsigned int *event_offsets = cache->event_offsets;
372 	const unsigned int cache_size = cache->size;
373 	unsigned int cache_head = cache->head;
374 	unsigned int base_tick = cache->rx_cycle_count * TICKS_PER_CYCLE;
375 	int i;
376 
377 	for (i = 0; i < data_blocks; i++) {
378 		unsigned int tick = (base_tick + event_offsets[cache_head]) % TICKS_PER_SECOND;
379 		u32 sph = ((tick / TICKS_PER_CYCLE) << CIP_SPH_CYCLE_SHIFT) | (tick % TICKS_PER_CYCLE);
380 		*buffer = cpu_to_be32(sph);
381 
382 		cache_head = (cache_head + 1) % cache_size;
383 		buffer += data_block_quadlets;
384 	}
385 
386 	cache->head = cache_head;
387 	cache->rx_cycle_count = (cache->rx_cycle_count + 1) % CYCLES_PER_SECOND;
388 }
389 
process_it_ctx_payloads(struct amdtp_stream * s,const struct pkt_desc * descs,unsigned int packets,struct snd_pcm_substream * pcm)390 static unsigned int process_it_ctx_payloads(struct amdtp_stream *s,
391 					    const struct pkt_desc *descs,
392 					    unsigned int packets,
393 					    struct snd_pcm_substream *pcm)
394 {
395 	struct amdtp_motu *p = s->protocol;
396 	unsigned int pcm_frames = 0;
397 	int i;
398 
399 	if (p->cache->rx_cycle_count == UINT_MAX)
400 		p->cache->rx_cycle_count = (s->domain->processing_cycle.rx_start % CYCLES_PER_SECOND);
401 
402 	// For data block processing.
403 	for (i = 0; i < packets; ++i) {
404 		const struct pkt_desc *desc = descs + i;
405 		__be32 *buf = desc->ctx_payload;
406 		unsigned int data_blocks = desc->data_blocks;
407 
408 		if (pcm) {
409 			write_pcm_s32(s, pcm, buf, data_blocks, pcm_frames);
410 			pcm_frames += data_blocks;
411 		} else {
412 			write_pcm_silence(s, buf, data_blocks);
413 		}
414 
415 		if (p->midi_ports)
416 			write_midi_messages(s, buf, data_blocks);
417 
418 		// TODO: how to interact control messages between userspace?
419 
420 		write_sph(p->cache, buf, data_blocks, s->data_block_quadlets);
421 	}
422 
423 	// For tracepoints.
424 	if (trace_data_block_sph_enabled() ||
425 	    trace_data_block_message_enabled())
426 		probe_tracepoints_events(s, descs, packets);
427 
428 	return pcm_frames;
429 }
430 
amdtp_motu_init(struct amdtp_stream * s,struct fw_unit * unit,enum amdtp_stream_direction dir,const struct snd_motu_spec * spec,struct amdtp_motu_cache * cache)431 int amdtp_motu_init(struct amdtp_stream *s, struct fw_unit *unit,
432 		    enum amdtp_stream_direction dir,
433 		    const struct snd_motu_spec *spec, struct amdtp_motu_cache *cache)
434 {
435 	amdtp_stream_process_ctx_payloads_t process_ctx_payloads;
436 	int fmt = CIP_FMT_MOTU;
437 	unsigned int flags = CIP_BLOCKING | CIP_UNAWARE_SYT;
438 	struct amdtp_motu *p;
439 	int err;
440 
441 	if (dir == AMDTP_IN_STREAM) {
442 		process_ctx_payloads = process_ir_ctx_payloads;
443 
444 		/*
445 		 * Units of version 3 transmits packets with invalid CIP header
446 		 * against IEC 61883-1.
447 		 */
448 		if (spec->protocol_version == SND_MOTU_PROTOCOL_V3) {
449 			flags |= CIP_WRONG_DBS |
450 				 CIP_SKIP_DBC_ZERO_CHECK |
451 				 CIP_HEADER_WITHOUT_EOH;
452 			fmt = CIP_FMT_MOTU_TX_V3;
453 		}
454 
455 		if (spec == &snd_motu_spec_8pre ||
456 		    spec == &snd_motu_spec_ultralite) {
457 			// 8pre has some quirks.
458 			flags |= CIP_WRONG_DBS |
459 				 CIP_SKIP_DBC_ZERO_CHECK;
460 		}
461 	} else {
462 		process_ctx_payloads = process_it_ctx_payloads;
463 		flags |= CIP_DBC_IS_END_EVENT;
464 	}
465 
466 	err = amdtp_stream_init(s, unit, dir, flags, fmt, process_ctx_payloads,
467 				sizeof(struct amdtp_motu));
468 	if (err < 0)
469 		return err;
470 
471 	s->sph = 1;
472 
473 	if (dir == AMDTP_OUT_STREAM) {
474 		// Use fixed value for FDF field.
475 		s->ctx_data.rx.fdf = MOTU_FDF_AM824;
476 	}
477 
478 	p = s->protocol;
479 	p->cache = cache;
480 
481 	return 0;
482 }
483