1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
3
4 #ifndef _ICE_H_
5 #define _ICE_H_
6
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/firmware.h>
12 #include <linux/netdevice.h>
13 #include <linux/compiler.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/cpumask.h>
17 #include <linux/rtnetlink.h>
18 #include <linux/if_vlan.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/pci.h>
21 #include <linux/workqueue.h>
22 #include <linux/wait.h>
23 #include <linux/aer.h>
24 #include <linux/interrupt.h>
25 #include <linux/ethtool.h>
26 #include <linux/timer.h>
27 #include <linux/delay.h>
28 #include <linux/bitmap.h>
29 #include <linux/log2.h>
30 #include <linux/ip.h>
31 #include <linux/sctp.h>
32 #include <linux/ipv6.h>
33 #include <linux/pkt_sched.h>
34 #include <linux/if_bridge.h>
35 #include <linux/ctype.h>
36 #include <linux/bpf.h>
37 #include <linux/auxiliary_bus.h>
38 #include <linux/avf/virtchnl.h>
39 #include <linux/cpu_rmap.h>
40 #include <linux/dim.h>
41 #include <net/devlink.h>
42 #include <net/ipv6.h>
43 #include <net/xdp_sock.h>
44 #include <net/xdp_sock_drv.h>
45 #include <net/geneve.h>
46 #include <net/gre.h>
47 #include <net/udp_tunnel.h>
48 #include <net/vxlan.h>
49 #if IS_ENABLED(CONFIG_DCB)
50 #include <scsi/iscsi_proto.h>
51 #endif /* CONFIG_DCB */
52 #include "ice_devids.h"
53 #include "ice_type.h"
54 #include "ice_txrx.h"
55 #include "ice_dcb.h"
56 #include "ice_switch.h"
57 #include "ice_common.h"
58 #include "ice_sched.h"
59 #include "ice_idc_int.h"
60 #include "ice_virtchnl_pf.h"
61 #include "ice_sriov.h"
62 #include "ice_ptp.h"
63 #include "ice_fdir.h"
64 #include "ice_xsk.h"
65 #include "ice_arfs.h"
66 #include "ice_lag.h"
67
68 #define ICE_BAR0 0
69 #define ICE_REQ_DESC_MULTIPLE 32
70 #define ICE_MIN_NUM_DESC 64
71 #define ICE_MAX_NUM_DESC 8160
72 #define ICE_DFLT_MIN_RX_DESC 512
73 #define ICE_DFLT_NUM_TX_DESC 256
74 #define ICE_DFLT_NUM_RX_DESC 2048
75
76 #define ICE_DFLT_TRAFFIC_CLASS BIT(0)
77 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16)
78 #define ICE_AQ_LEN 192
79 #define ICE_MBXSQ_LEN 64
80 #define ICE_SBQ_LEN 64
81 #define ICE_MIN_LAN_TXRX_MSIX 1
82 #define ICE_MIN_LAN_OICR_MSIX 1
83 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
84 #define ICE_FDIR_MSIX 2
85 #define ICE_RDMA_NUM_AEQ_MSIX 4
86 #define ICE_MIN_RDMA_MSIX 2
87 #define ICE_NO_VSI 0xffff
88 #define ICE_VSI_MAP_CONTIG 0
89 #define ICE_VSI_MAP_SCATTER 1
90 #define ICE_MAX_SCATTER_TXQS 16
91 #define ICE_MAX_SCATTER_RXQS 16
92 #define ICE_Q_WAIT_RETRY_LIMIT 10
93 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT)
94 #define ICE_MAX_LG_RSS_QS 256
95 #define ICE_RES_VALID_BIT 0x8000
96 #define ICE_RES_MISC_VEC_ID (ICE_RES_VALID_BIT - 1)
97 #define ICE_RES_RDMA_VEC_ID (ICE_RES_MISC_VEC_ID - 1)
98 /* All VF control VSIs share the same IRQ, so assign a unique ID for them */
99 #define ICE_RES_VF_CTRL_VEC_ID (ICE_RES_RDMA_VEC_ID - 1)
100 #define ICE_INVAL_Q_INDEX 0xffff
101 #define ICE_INVAL_VFID 256
102
103 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */
104 #define ICE_MAX_RESET_WAIT 20
105
106 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4)
107
108 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
109
110 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
111
112 #define ICE_UP_TABLE_TRANSLATE(val, i) \
113 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
114 ICE_AQ_VSI_UP_TABLE_UP##i##_M)
115
116 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
117 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
118 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
119 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
120
121 /* Macro for each VSI in a PF */
122 #define ice_for_each_vsi(pf, i) \
123 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
124
125 /* Macros for each Tx/Rx ring in a VSI */
126 #define ice_for_each_txq(vsi, i) \
127 for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
128
129 #define ice_for_each_rxq(vsi, i) \
130 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
131
132 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
133 #define ice_for_each_alloc_txq(vsi, i) \
134 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
135
136 #define ice_for_each_alloc_rxq(vsi, i) \
137 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
138
139 #define ice_for_each_q_vector(vsi, i) \
140 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
141
142 #define ICE_UCAST_PROMISC_BITS (ICE_PROMISC_UCAST_TX | ICE_PROMISC_UCAST_RX)
143
144 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_TX | \
145 ICE_PROMISC_UCAST_RX | \
146 ICE_PROMISC_VLAN_TX | \
147 ICE_PROMISC_VLAN_RX)
148
149 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
150
151 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
152 ICE_PROMISC_MCAST_RX | \
153 ICE_PROMISC_VLAN_TX | \
154 ICE_PROMISC_VLAN_RX)
155
156 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
157
158 struct ice_txq_meta {
159 u32 q_teid; /* Tx-scheduler element identifier */
160 u16 q_id; /* Entry in VSI's txq_map bitmap */
161 u16 q_handle; /* Relative index of Tx queue within TC */
162 u16 vsi_idx; /* VSI index that Tx queue belongs to */
163 u8 tc; /* TC number that Tx queue belongs to */
164 };
165
166 struct ice_tc_info {
167 u16 qoffset;
168 u16 qcount_tx;
169 u16 qcount_rx;
170 u8 netdev_tc;
171 };
172
173 struct ice_tc_cfg {
174 u8 numtc; /* Total number of enabled TCs */
175 u8 ena_tc; /* Tx map */
176 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
177 };
178
179 struct ice_res_tracker {
180 u16 num_entries;
181 u16 end;
182 u16 list[];
183 };
184
185 struct ice_qs_cfg {
186 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */
187 unsigned long *pf_map;
188 unsigned long pf_map_size;
189 unsigned int q_count;
190 unsigned int scatter_count;
191 u16 *vsi_map;
192 u16 vsi_map_offset;
193 u8 mapping_mode;
194 };
195
196 struct ice_sw {
197 struct ice_pf *pf;
198 u16 sw_id; /* switch ID for this switch */
199 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */
200 struct ice_vsi *dflt_vsi; /* default VSI for this switch */
201 u8 dflt_vsi_ena:1; /* true if above dflt_vsi is enabled */
202 };
203
204 enum ice_pf_state {
205 ICE_TESTING,
206 ICE_DOWN,
207 ICE_NEEDS_RESTART,
208 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */
209 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */
210 ICE_PFR_REQ, /* set by driver */
211 ICE_CORER_REQ, /* set by driver */
212 ICE_GLOBR_REQ, /* set by driver */
213 ICE_CORER_RECV, /* set by OICR handler */
214 ICE_GLOBR_RECV, /* set by OICR handler */
215 ICE_EMPR_RECV, /* set by OICR handler */
216 ICE_SUSPENDED, /* set on module remove path */
217 ICE_RESET_FAILED, /* set by reset/rebuild */
218 /* When checking for the PF to be in a nominal operating state, the
219 * bits that are grouped at the beginning of the list need to be
220 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
221 * be checked. If you need to add a bit into consideration for nominal
222 * operating state, it must be added before
223 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
224 * without appropriate consideration.
225 */
226 ICE_STATE_NOMINAL_CHECK_BITS,
227 ICE_ADMINQ_EVENT_PENDING,
228 ICE_MAILBOXQ_EVENT_PENDING,
229 ICE_SIDEBANDQ_EVENT_PENDING,
230 ICE_MDD_EVENT_PENDING,
231 ICE_VFLR_EVENT_PENDING,
232 ICE_FLTR_OVERFLOW_PROMISC,
233 ICE_VF_DIS,
234 ICE_CFG_BUSY,
235 ICE_SERVICE_SCHED,
236 ICE_SERVICE_DIS,
237 ICE_FD_FLUSH_REQ,
238 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */
239 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */
240 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */
241 ICE_LINK_DEFAULT_OVERRIDE_PENDING,
242 ICE_PHY_INIT_COMPLETE,
243 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */
244 ICE_AUX_ERR_PENDING,
245 ICE_STATE_NBITS /* must be last */
246 };
247
248 enum ice_vsi_state {
249 ICE_VSI_DOWN,
250 ICE_VSI_NEEDS_RESTART,
251 ICE_VSI_NETDEV_ALLOCD,
252 ICE_VSI_NETDEV_REGISTERED,
253 ICE_VSI_UMAC_FLTR_CHANGED,
254 ICE_VSI_MMAC_FLTR_CHANGED,
255 ICE_VSI_VLAN_FLTR_CHANGED,
256 ICE_VSI_PROMISC_CHANGED,
257 ICE_VSI_STATE_NBITS /* must be last */
258 };
259
260 /* struct that defines a VSI, associated with a dev */
261 struct ice_vsi {
262 struct net_device *netdev;
263 struct ice_sw *vsw; /* switch this VSI is on */
264 struct ice_pf *back; /* back pointer to PF */
265 struct ice_port_info *port_info; /* back pointer to port_info */
266 struct ice_ring **rx_rings; /* Rx ring array */
267 struct ice_ring **tx_rings; /* Tx ring array */
268 struct ice_q_vector **q_vectors; /* q_vector array */
269
270 irqreturn_t (*irq_handler)(int irq, void *data);
271
272 u64 tx_linearize;
273 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);
274 unsigned int current_netdev_flags;
275 u32 tx_restart;
276 u32 tx_busy;
277 u32 rx_buf_failed;
278 u32 rx_page_failed;
279 u16 num_q_vectors;
280 u16 base_vector; /* IRQ base for OS reserved vectors */
281 enum ice_vsi_type type;
282 u16 vsi_num; /* HW (absolute) index of this VSI */
283 u16 idx; /* software index in pf->vsi[] */
284
285 s16 vf_id; /* VF ID for SR-IOV VSIs */
286
287 u16 ethtype; /* Ethernet protocol for pause frame */
288 u16 num_gfltr;
289 u16 num_bfltr;
290
291 /* RSS config */
292 u16 rss_table_size; /* HW RSS table size */
293 u16 rss_size; /* Allocated RSS queues */
294 u8 *rss_hkey_user; /* User configured hash keys */
295 u8 *rss_lut_user; /* User configured lookup table entries */
296 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */
297
298 /* aRFS members only allocated for the PF VSI */
299 #define ICE_MAX_ARFS_LIST 1024
300 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1)
301 struct hlist_head *arfs_fltr_list;
302 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
303 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */
304 atomic_t *arfs_last_fltr_id;
305
306 u16 max_frame;
307 u16 rx_buf_len;
308
309 struct ice_aqc_vsi_props info; /* VSI properties */
310
311 /* VSI stats */
312 struct rtnl_link_stats64 net_stats;
313 struct ice_eth_stats eth_stats;
314 struct ice_eth_stats eth_stats_prev;
315
316 struct list_head tmp_sync_list; /* MAC filters to be synced */
317 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */
318
319 u8 irqs_ready:1;
320 u8 current_isup:1; /* Sync 'link up' logging */
321 u8 stat_offsets_loaded:1;
322 u16 num_vlan;
323
324 /* queue information */
325 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
326 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
327 u16 *txq_map; /* index in pf->avail_txqs */
328 u16 *rxq_map; /* index in pf->avail_rxqs */
329 u16 alloc_txq; /* Allocated Tx queues */
330 u16 num_txq; /* Used Tx queues */
331 u16 alloc_rxq; /* Allocated Rx queues */
332 u16 num_rxq; /* Used Rx queues */
333 u16 req_txq; /* User requested Tx queues */
334 u16 req_rxq; /* User requested Rx queues */
335 u16 num_rx_desc;
336 u16 num_tx_desc;
337 u16 qset_handle[ICE_MAX_TRAFFIC_CLASS];
338 struct ice_tc_cfg tc_cfg;
339 struct bpf_prog *xdp_prog;
340 struct ice_ring **xdp_rings; /* XDP ring array */
341 unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */
342 u16 num_xdp_txq; /* Used XDP queues */
343 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
344
345 /* setup back reference, to which aggregator node this VSI
346 * corresponds to
347 */
348 struct ice_agg_node *agg_node;
349 } ____cacheline_internodealigned_in_smp;
350
351 /* struct that defines an interrupt vector */
352 struct ice_q_vector {
353 struct ice_vsi *vsi;
354
355 u16 v_idx; /* index in the vsi->q_vector array. */
356 u16 reg_idx;
357 u8 num_ring_rx; /* total number of Rx rings in vector */
358 u8 num_ring_tx; /* total number of Tx rings in vector */
359 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */
360 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
361 * value to the device
362 */
363 u8 intrl;
364
365 struct napi_struct napi;
366
367 struct ice_ring_container rx;
368 struct ice_ring_container tx;
369
370 cpumask_t affinity_mask;
371 struct irq_affinity_notify affinity_notify;
372
373 char name[ICE_INT_NAME_STR_LEN];
374
375 u16 total_events; /* net_dim(): number of interrupts processed */
376 } ____cacheline_internodealigned_in_smp;
377
378 enum ice_pf_flags {
379 ICE_FLAG_FLTR_SYNC,
380 ICE_FLAG_RDMA_ENA,
381 ICE_FLAG_RSS_ENA,
382 ICE_FLAG_SRIOV_ENA,
383 ICE_FLAG_SRIOV_CAPABLE,
384 ICE_FLAG_DCB_CAPABLE,
385 ICE_FLAG_DCB_ENA,
386 ICE_FLAG_FD_ENA,
387 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */
388 ICE_FLAG_PTP, /* PTP is enabled by software */
389 ICE_FLAG_AUX_ENA,
390 ICE_FLAG_ADV_FEATURES,
391 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
392 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
393 ICE_FLAG_NO_MEDIA,
394 ICE_FLAG_FW_LLDP_AGENT,
395 ICE_FLAG_MOD_POWER_UNSUPPORTED,
396 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */
397 ICE_FLAG_LEGACY_RX,
398 ICE_FLAG_VF_TRUE_PROMISC_ENA,
399 ICE_FLAG_MDD_AUTO_RESET_VF,
400 ICE_FLAG_LINK_LENIENT_MODE_ENA,
401 ICE_FLAG_PLUG_AUX_DEV,
402 ICE_FLAG_UNPLUG_AUX_DEV,
403 ICE_FLAG_MTU_CHANGED,
404 ICE_PF_FLAGS_NBITS /* must be last */
405 };
406
407 struct ice_agg_node {
408 u32 agg_id;
409 #define ICE_MAX_VSIS_IN_AGG_NODE 64
410 u32 num_vsis;
411 u8 valid;
412 };
413
414 struct ice_pf {
415 struct pci_dev *pdev;
416
417 struct devlink_region *nvm_region;
418 struct devlink_region *devcaps_region;
419
420 /* devlink port data */
421 struct devlink_port devlink_port;
422
423 /* OS reserved IRQ details */
424 struct msix_entry *msix_entries;
425 struct ice_res_tracker *irq_tracker;
426 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
427 * number of MSIX vectors needed for all SR-IOV VFs from the number of
428 * MSIX vectors allowed on this PF.
429 */
430 u16 sriov_base_vector;
431
432 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */
433
434 struct ice_vsi **vsi; /* VSIs created by the driver */
435 struct ice_sw *first_sw; /* first switch created by firmware */
436 /* Virtchnl/SR-IOV config info */
437 struct ice_vf *vf;
438 u16 num_alloc_vfs; /* actual number of VFs allocated */
439 u16 num_vfs_supported; /* num VFs supported for this PF */
440 u16 num_qps_per_vf;
441 u16 num_msix_per_vf;
442 /* used to ratelimit the MDD event logging */
443 unsigned long last_printed_mdd_jiffies;
444 DECLARE_BITMAP(malvfs, ICE_MAX_VF_COUNT);
445 DECLARE_BITMAP(state, ICE_STATE_NBITS);
446 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
447 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */
448 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */
449 unsigned long serv_tmr_period;
450 unsigned long serv_tmr_prev;
451 struct timer_list serv_tmr;
452 struct work_struct serv_task;
453 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */
454 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */
455 struct mutex tc_mutex; /* lock to protect TC changes */
456 struct mutex adev_mutex; /* lock to protect aux device access */
457 u32 msg_enable;
458 struct ice_ptp ptp;
459 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */
460 u16 rdma_base_vector;
461
462 /* spinlock to protect the AdminQ wait list */
463 spinlock_t aq_wait_lock;
464 struct hlist_head aq_wait_list;
465 wait_queue_head_t aq_wait_queue;
466
467 wait_queue_head_t reset_wait_queue;
468
469 u32 hw_csum_rx_error;
470 u32 oicr_err_reg;
471 u16 oicr_idx; /* Other interrupt cause MSIX vector index */
472 u16 num_avail_sw_msix; /* remaining MSIX SW vectors left unclaimed */
473 u16 max_pf_txqs; /* Total Tx queues PF wide */
474 u16 max_pf_rxqs; /* Total Rx queues PF wide */
475 u16 num_lan_msix; /* Total MSIX vectors for base driver */
476 u16 num_lan_tx; /* num LAN Tx queues setup */
477 u16 num_lan_rx; /* num LAN Rx queues setup */
478 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */
479 u16 num_alloc_vsi;
480 u16 corer_count; /* Core reset count */
481 u16 globr_count; /* Global reset count */
482 u16 empr_count; /* EMP reset count */
483 u16 pfr_count; /* PF reset count */
484
485 u8 wol_ena : 1; /* software state of WoL */
486 u32 wakeup_reason; /* last wakeup reason */
487 struct ice_hw_port_stats stats;
488 struct ice_hw_port_stats stats_prev;
489 struct ice_hw hw;
490 u8 stat_prev_loaded:1; /* has previous stats been loaded */
491 u16 dcbx_cap;
492 u32 tx_timeout_count;
493 unsigned long tx_timeout_last_recovery;
494 u32 tx_timeout_recovery_level;
495 char int_name[ICE_INT_NAME_STR_LEN];
496 struct auxiliary_device *adev;
497 int aux_idx;
498 u32 sw_int_count;
499
500 __le64 nvm_phy_type_lo; /* NVM PHY type low */
501 __le64 nvm_phy_type_hi; /* NVM PHY type high */
502 struct ice_link_default_override_tlv link_dflt_override;
503 struct ice_lag *lag; /* Link Aggregation information */
504
505 #define ICE_INVALID_AGG_NODE_ID 0
506 #define ICE_PF_AGG_NODE_ID_START 1
507 #define ICE_MAX_PF_AGG_NODES 32
508 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];
509 #define ICE_VF_AGG_NODE_ID_START 65
510 #define ICE_MAX_VF_AGG_NODES 32
511 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
512 };
513
514 struct ice_netdev_priv {
515 struct ice_vsi *vsi;
516 };
517
518 /**
519 * ice_irq_dynamic_ena - Enable default interrupt generation settings
520 * @hw: pointer to HW struct
521 * @vsi: pointer to VSI struct, can be NULL
522 * @q_vector: pointer to q_vector, can be NULL
523 */
524 static inline void
ice_irq_dynamic_ena(struct ice_hw * hw,struct ice_vsi * vsi,struct ice_q_vector * q_vector)525 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
526 struct ice_q_vector *q_vector)
527 {
528 u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
529 ((struct ice_pf *)hw->back)->oicr_idx;
530 int itr = ICE_ITR_NONE;
531 u32 val;
532
533 /* clear the PBA here, as this function is meant to clean out all
534 * previous interrupts and enable the interrupt
535 */
536 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
537 (itr << GLINT_DYN_CTL_ITR_INDX_S);
538 if (vsi)
539 if (test_bit(ICE_VSI_DOWN, vsi->state))
540 return;
541 wr32(hw, GLINT_DYN_CTL(vector), val);
542 }
543
544 /**
545 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
546 * @netdev: pointer to the netdev struct
547 */
ice_netdev_to_pf(struct net_device * netdev)548 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
549 {
550 struct ice_netdev_priv *np = netdev_priv(netdev);
551
552 return np->vsi->back;
553 }
554
ice_is_xdp_ena_vsi(struct ice_vsi * vsi)555 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
556 {
557 return !!READ_ONCE(vsi->xdp_prog);
558 }
559
ice_set_ring_xdp(struct ice_ring * ring)560 static inline void ice_set_ring_xdp(struct ice_ring *ring)
561 {
562 ring->flags |= ICE_TX_FLAGS_RING_XDP;
563 }
564
565 /**
566 * ice_xsk_pool - get XSK buffer pool bound to a ring
567 * @ring: ring to use
568 *
569 * Returns a pointer to xdp_umem structure if there is a buffer pool present,
570 * NULL otherwise.
571 */
ice_xsk_pool(struct ice_ring * ring)572 static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_ring *ring)
573 {
574 struct ice_vsi *vsi = ring->vsi;
575 u16 qid = ring->q_index;
576
577 if (ice_ring_is_xdp(ring))
578 qid -= vsi->num_xdp_txq;
579
580 if (!ice_is_xdp_ena_vsi(vsi) || !test_bit(qid, vsi->af_xdp_zc_qps))
581 return NULL;
582
583 return xsk_get_pool_from_qid(vsi->netdev, qid);
584 }
585
586 /**
587 * ice_get_main_vsi - Get the PF VSI
588 * @pf: PF instance
589 *
590 * returns pf->vsi[0], which by definition is the PF VSI
591 */
ice_get_main_vsi(struct ice_pf * pf)592 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
593 {
594 if (pf->vsi)
595 return pf->vsi[0];
596
597 return NULL;
598 }
599
600 /**
601 * ice_get_ctrl_vsi - Get the control VSI
602 * @pf: PF instance
603 */
ice_get_ctrl_vsi(struct ice_pf * pf)604 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
605 {
606 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
607 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
608 return NULL;
609
610 return pf->vsi[pf->ctrl_vsi_idx];
611 }
612
613 /**
614 * ice_set_sriov_cap - enable SRIOV in PF flags
615 * @pf: PF struct
616 */
ice_set_sriov_cap(struct ice_pf * pf)617 static inline void ice_set_sriov_cap(struct ice_pf *pf)
618 {
619 if (pf->hw.func_caps.common_cap.sr_iov_1_1)
620 set_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
621 }
622
623 /**
624 * ice_clear_sriov_cap - disable SRIOV in PF flags
625 * @pf: PF struct
626 */
ice_clear_sriov_cap(struct ice_pf * pf)627 static inline void ice_clear_sriov_cap(struct ice_pf *pf)
628 {
629 clear_bit(ICE_FLAG_SRIOV_CAPABLE, pf->flags);
630 }
631
632 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256
633 #define ICE_FD_STAT_PF_IDX(base_idx) \
634 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
635 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
636
637 bool netif_is_ice(struct net_device *dev);
638 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
639 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
640 int ice_vsi_open_ctrl(struct ice_vsi *vsi);
641 void ice_set_ethtool_ops(struct net_device *netdev);
642 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
643 u16 ice_get_avail_txq_count(struct ice_pf *pf);
644 u16 ice_get_avail_rxq_count(struct ice_pf *pf);
645 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked);
646 void ice_update_vsi_stats(struct ice_vsi *vsi);
647 void ice_update_pf_stats(struct ice_pf *pf);
648 int ice_up(struct ice_vsi *vsi);
649 int ice_down(struct ice_vsi *vsi);
650 int ice_vsi_cfg(struct ice_vsi *vsi);
651 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
652 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog);
653 int ice_destroy_xdp_rings(struct ice_vsi *vsi);
654 int
655 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
656 u32 flags);
657 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
658 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
659 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);
660 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);
661 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
662 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
663 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
664 int ice_plug_aux_dev(struct ice_pf *pf);
665 void ice_unplug_aux_dev(struct ice_pf *pf);
666 int ice_init_rdma(struct ice_pf *pf);
667 const char *ice_stat_str(enum ice_status stat_err);
668 const char *ice_aq_str(enum ice_aq_err aq_err);
669 bool ice_is_wol_supported(struct ice_hw *hw);
670 int
671 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
672 bool is_tun);
673 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
674 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
675 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
676 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
677 int
678 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
679 u32 *rule_locs);
680 void ice_fdir_release_flows(struct ice_hw *hw);
681 void ice_fdir_replay_flows(struct ice_hw *hw);
682 void ice_fdir_replay_fltrs(struct ice_pf *pf);
683 int ice_fdir_create_dflt_rules(struct ice_pf *pf);
684 int ice_aq_wait_for_event(struct ice_pf *pf, u16 opcode, unsigned long timeout,
685 struct ice_rq_event_info *event);
686 int ice_open(struct net_device *netdev);
687 int ice_open_internal(struct net_device *netdev);
688 int ice_stop(struct net_device *netdev);
689 void ice_service_task_schedule(struct ice_pf *pf);
690
691 /**
692 * ice_set_rdma_cap - enable RDMA support
693 * @pf: PF struct
694 */
ice_set_rdma_cap(struct ice_pf * pf)695 static inline void ice_set_rdma_cap(struct ice_pf *pf)
696 {
697 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
698 set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
699 set_bit(ICE_FLAG_AUX_ENA, pf->flags);
700 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
701 }
702 }
703
704 /**
705 * ice_clear_rdma_cap - disable RDMA support
706 * @pf: PF struct
707 */
ice_clear_rdma_cap(struct ice_pf * pf)708 static inline void ice_clear_rdma_cap(struct ice_pf *pf)
709 {
710 /* defer unplug to service task to avoid RTNL lock and
711 * clear PLUG bit so that pending plugs don't interfere
712 */
713 clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
714 set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags);
715 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
716 clear_bit(ICE_FLAG_AUX_ENA, pf->flags);
717 }
718 #endif /* _ICE_H_ */
719