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1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Security related flags and so on.
4 //
5 // Copyright 2018, Michael Ellerman, IBM Corporation.
6 
7 #include <linux/cpu.h>
8 #include <linux/kernel.h>
9 #include <linux/device.h>
10 #include <linux/memblock.h>
11 #include <linux/nospec.h>
12 #include <linux/prctl.h>
13 #include <linux/seq_buf.h>
14 #include <linux/debugfs.h>
15 
16 #include <asm/asm-prototypes.h>
17 #include <asm/code-patching.h>
18 #include <asm/security_features.h>
19 #include <asm/setup.h>
20 #include <asm/inst.h>
21 
22 #include "setup.h"
23 
24 u64 powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
25 
26 enum branch_cache_flush_type {
27 	BRANCH_CACHE_FLUSH_NONE	= 0x1,
28 	BRANCH_CACHE_FLUSH_SW	= 0x2,
29 	BRANCH_CACHE_FLUSH_HW	= 0x4,
30 };
31 static enum branch_cache_flush_type count_cache_flush_type = BRANCH_CACHE_FLUSH_NONE;
32 static enum branch_cache_flush_type link_stack_flush_type = BRANCH_CACHE_FLUSH_NONE;
33 
34 bool barrier_nospec_enabled;
35 static bool no_nospec;
36 static bool btb_flush_enabled;
37 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
38 static bool no_spectrev2;
39 #endif
40 
enable_barrier_nospec(bool enable)41 static void enable_barrier_nospec(bool enable)
42 {
43 	barrier_nospec_enabled = enable;
44 	do_barrier_nospec_fixups(enable);
45 }
46 
setup_barrier_nospec(void)47 void setup_barrier_nospec(void)
48 {
49 	bool enable;
50 
51 	/*
52 	 * It would make sense to check SEC_FTR_SPEC_BAR_ORI31 below as well.
53 	 * But there's a good reason not to. The two flags we check below are
54 	 * both are enabled by default in the kernel, so if the hcall is not
55 	 * functional they will be enabled.
56 	 * On a system where the host firmware has been updated (so the ori
57 	 * functions as a barrier), but on which the hypervisor (KVM/Qemu) has
58 	 * not been updated, we would like to enable the barrier. Dropping the
59 	 * check for SEC_FTR_SPEC_BAR_ORI31 achieves that. The only downside is
60 	 * we potentially enable the barrier on systems where the host firmware
61 	 * is not updated, but that's harmless as it's a no-op.
62 	 */
63 	enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
64 		 security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR);
65 
66 	if (!no_nospec && !cpu_mitigations_off())
67 		enable_barrier_nospec(enable);
68 }
69 
handle_nospectre_v1(char * p)70 static int __init handle_nospectre_v1(char *p)
71 {
72 	no_nospec = true;
73 
74 	return 0;
75 }
76 early_param("nospectre_v1", handle_nospectre_v1);
77 
78 #ifdef CONFIG_DEBUG_FS
barrier_nospec_set(void * data,u64 val)79 static int barrier_nospec_set(void *data, u64 val)
80 {
81 	switch (val) {
82 	case 0:
83 	case 1:
84 		break;
85 	default:
86 		return -EINVAL;
87 	}
88 
89 	if (!!val == !!barrier_nospec_enabled)
90 		return 0;
91 
92 	enable_barrier_nospec(!!val);
93 
94 	return 0;
95 }
96 
barrier_nospec_get(void * data,u64 * val)97 static int barrier_nospec_get(void *data, u64 *val)
98 {
99 	*val = barrier_nospec_enabled ? 1 : 0;
100 	return 0;
101 }
102 
103 DEFINE_DEBUGFS_ATTRIBUTE(fops_barrier_nospec, barrier_nospec_get,
104 			 barrier_nospec_set, "%llu\n");
105 
barrier_nospec_debugfs_init(void)106 static __init int barrier_nospec_debugfs_init(void)
107 {
108 	debugfs_create_file_unsafe("barrier_nospec", 0600,
109 				   arch_debugfs_dir, NULL,
110 				   &fops_barrier_nospec);
111 	return 0;
112 }
113 device_initcall(barrier_nospec_debugfs_init);
114 
security_feature_debugfs_init(void)115 static __init int security_feature_debugfs_init(void)
116 {
117 	debugfs_create_x64("security_features", 0400, arch_debugfs_dir,
118 			   &powerpc_security_features);
119 	return 0;
120 }
121 device_initcall(security_feature_debugfs_init);
122 #endif /* CONFIG_DEBUG_FS */
123 
124 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
handle_nospectre_v2(char * p)125 static int __init handle_nospectre_v2(char *p)
126 {
127 	no_spectrev2 = true;
128 
129 	return 0;
130 }
131 early_param("nospectre_v2", handle_nospectre_v2);
132 #endif /* CONFIG_PPC_FSL_BOOK3E || CONFIG_PPC_BOOK3S_64 */
133 
134 #ifdef CONFIG_PPC_FSL_BOOK3E
setup_spectre_v2(void)135 void setup_spectre_v2(void)
136 {
137 	if (no_spectrev2 || cpu_mitigations_off())
138 		do_btb_flush_fixups();
139 	else
140 		btb_flush_enabled = true;
141 }
142 #endif /* CONFIG_PPC_FSL_BOOK3E */
143 
144 #ifdef CONFIG_PPC_BOOK3S_64
cpu_show_meltdown(struct device * dev,struct device_attribute * attr,char * buf)145 ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
146 {
147 	bool thread_priv;
148 
149 	thread_priv = security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV);
150 
151 	if (rfi_flush) {
152 		struct seq_buf s;
153 		seq_buf_init(&s, buf, PAGE_SIZE - 1);
154 
155 		seq_buf_printf(&s, "Mitigation: RFI Flush");
156 		if (thread_priv)
157 			seq_buf_printf(&s, ", L1D private per thread");
158 
159 		seq_buf_printf(&s, "\n");
160 
161 		return s.len;
162 	}
163 
164 	if (thread_priv)
165 		return sprintf(buf, "Vulnerable: L1D private per thread\n");
166 
167 	if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
168 	    !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
169 		return sprintf(buf, "Not affected\n");
170 
171 	return sprintf(buf, "Vulnerable\n");
172 }
173 
cpu_show_l1tf(struct device * dev,struct device_attribute * attr,char * buf)174 ssize_t cpu_show_l1tf(struct device *dev, struct device_attribute *attr, char *buf)
175 {
176 	return cpu_show_meltdown(dev, attr, buf);
177 }
178 #endif
179 
cpu_show_spectre_v1(struct device * dev,struct device_attribute * attr,char * buf)180 ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
181 {
182 	struct seq_buf s;
183 
184 	seq_buf_init(&s, buf, PAGE_SIZE - 1);
185 
186 	if (security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR)) {
187 		if (barrier_nospec_enabled)
188 			seq_buf_printf(&s, "Mitigation: __user pointer sanitization");
189 		else
190 			seq_buf_printf(&s, "Vulnerable");
191 
192 		if (security_ftr_enabled(SEC_FTR_SPEC_BAR_ORI31))
193 			seq_buf_printf(&s, ", ori31 speculation barrier enabled");
194 
195 		seq_buf_printf(&s, "\n");
196 	} else
197 		seq_buf_printf(&s, "Not affected\n");
198 
199 	return s.len;
200 }
201 
cpu_show_spectre_v2(struct device * dev,struct device_attribute * attr,char * buf)202 ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
203 {
204 	struct seq_buf s;
205 	bool bcs, ccd;
206 
207 	seq_buf_init(&s, buf, PAGE_SIZE - 1);
208 
209 	bcs = security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED);
210 	ccd = security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED);
211 
212 	if (bcs || ccd) {
213 		seq_buf_printf(&s, "Mitigation: ");
214 
215 		if (bcs)
216 			seq_buf_printf(&s, "Indirect branch serialisation (kernel only)");
217 
218 		if (bcs && ccd)
219 			seq_buf_printf(&s, ", ");
220 
221 		if (ccd)
222 			seq_buf_printf(&s, "Indirect branch cache disabled");
223 
224 	} else if (count_cache_flush_type != BRANCH_CACHE_FLUSH_NONE) {
225 		seq_buf_printf(&s, "Mitigation: Software count cache flush");
226 
227 		if (count_cache_flush_type == BRANCH_CACHE_FLUSH_HW)
228 			seq_buf_printf(&s, " (hardware accelerated)");
229 
230 	} else if (btb_flush_enabled) {
231 		seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
232 	} else {
233 		seq_buf_printf(&s, "Vulnerable");
234 	}
235 
236 	if (bcs || ccd || count_cache_flush_type != BRANCH_CACHE_FLUSH_NONE) {
237 		if (link_stack_flush_type != BRANCH_CACHE_FLUSH_NONE)
238 			seq_buf_printf(&s, ", Software link stack flush");
239 		if (link_stack_flush_type == BRANCH_CACHE_FLUSH_HW)
240 			seq_buf_printf(&s, " (hardware accelerated)");
241 	}
242 
243 	seq_buf_printf(&s, "\n");
244 
245 	return s.len;
246 }
247 
248 #ifdef CONFIG_PPC_BOOK3S_64
249 /*
250  * Store-forwarding barrier support.
251  */
252 
253 static enum stf_barrier_type stf_enabled_flush_types;
254 static bool no_stf_barrier;
255 static bool stf_barrier;
256 
handle_no_stf_barrier(char * p)257 static int __init handle_no_stf_barrier(char *p)
258 {
259 	pr_info("stf-barrier: disabled on command line.");
260 	no_stf_barrier = true;
261 	return 0;
262 }
263 
264 early_param("no_stf_barrier", handle_no_stf_barrier);
265 
stf_barrier_type_get(void)266 enum stf_barrier_type stf_barrier_type_get(void)
267 {
268 	return stf_enabled_flush_types;
269 }
270 
271 /* This is the generic flag used by other architectures */
handle_ssbd(char * p)272 static int __init handle_ssbd(char *p)
273 {
274 	if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) {
275 		/* Until firmware tells us, we have the barrier with auto */
276 		return 0;
277 	} else if (strncmp(p, "off", 3) == 0) {
278 		handle_no_stf_barrier(NULL);
279 		return 0;
280 	} else
281 		return 1;
282 
283 	return 0;
284 }
285 early_param("spec_store_bypass_disable", handle_ssbd);
286 
287 /* This is the generic flag used by other architectures */
handle_no_ssbd(char * p)288 static int __init handle_no_ssbd(char *p)
289 {
290 	handle_no_stf_barrier(NULL);
291 	return 0;
292 }
293 early_param("nospec_store_bypass_disable", handle_no_ssbd);
294 
stf_barrier_enable(bool enable)295 static void stf_barrier_enable(bool enable)
296 {
297 	if (enable)
298 		do_stf_barrier_fixups(stf_enabled_flush_types);
299 	else
300 		do_stf_barrier_fixups(STF_BARRIER_NONE);
301 
302 	stf_barrier = enable;
303 }
304 
setup_stf_barrier(void)305 void setup_stf_barrier(void)
306 {
307 	enum stf_barrier_type type;
308 	bool enable;
309 
310 	/* Default to fallback in case fw-features are not available */
311 	if (cpu_has_feature(CPU_FTR_ARCH_300))
312 		type = STF_BARRIER_EIEIO;
313 	else if (cpu_has_feature(CPU_FTR_ARCH_207S))
314 		type = STF_BARRIER_SYNC_ORI;
315 	else if (cpu_has_feature(CPU_FTR_ARCH_206))
316 		type = STF_BARRIER_FALLBACK;
317 	else
318 		type = STF_BARRIER_NONE;
319 
320 	enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
321 		 security_ftr_enabled(SEC_FTR_STF_BARRIER);
322 
323 	if (type == STF_BARRIER_FALLBACK) {
324 		pr_info("stf-barrier: fallback barrier available\n");
325 	} else if (type == STF_BARRIER_SYNC_ORI) {
326 		pr_info("stf-barrier: hwsync barrier available\n");
327 	} else if (type == STF_BARRIER_EIEIO) {
328 		pr_info("stf-barrier: eieio barrier available\n");
329 	}
330 
331 	stf_enabled_flush_types = type;
332 
333 	if (!no_stf_barrier && !cpu_mitigations_off())
334 		stf_barrier_enable(enable);
335 }
336 
cpu_show_spec_store_bypass(struct device * dev,struct device_attribute * attr,char * buf)337 ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
338 {
339 	if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) {
340 		const char *type;
341 		switch (stf_enabled_flush_types) {
342 		case STF_BARRIER_EIEIO:
343 			type = "eieio";
344 			break;
345 		case STF_BARRIER_SYNC_ORI:
346 			type = "hwsync";
347 			break;
348 		case STF_BARRIER_FALLBACK:
349 			type = "fallback";
350 			break;
351 		default:
352 			type = "unknown";
353 		}
354 		return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type);
355 	}
356 
357 	if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
358 	    !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
359 		return sprintf(buf, "Not affected\n");
360 
361 	return sprintf(buf, "Vulnerable\n");
362 }
363 
ssb_prctl_get(struct task_struct * task)364 static int ssb_prctl_get(struct task_struct *task)
365 {
366 	/*
367 	 * The STF_BARRIER feature is on by default, so if it's off that means
368 	 * firmware has explicitly said the CPU is not vulnerable via either
369 	 * the hypercall or device tree.
370 	 */
371 	if (!security_ftr_enabled(SEC_FTR_STF_BARRIER))
372 		return PR_SPEC_NOT_AFFECTED;
373 
374 	/*
375 	 * If the system's CPU has no known barrier (see setup_stf_barrier())
376 	 * then assume that the CPU is not vulnerable.
377 	 */
378 	if (stf_enabled_flush_types == STF_BARRIER_NONE)
379 		return PR_SPEC_NOT_AFFECTED;
380 
381 	/*
382 	 * Otherwise the CPU is vulnerable. The barrier is not a global or
383 	 * per-process mitigation, so the only value that can be reported here
384 	 * is PR_SPEC_ENABLE, which appears as "vulnerable" in /proc.
385 	 */
386 	return PR_SPEC_ENABLE;
387 }
388 
arch_prctl_spec_ctrl_get(struct task_struct * task,unsigned long which)389 int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which)
390 {
391 	switch (which) {
392 	case PR_SPEC_STORE_BYPASS:
393 		return ssb_prctl_get(task);
394 	default:
395 		return -ENODEV;
396 	}
397 }
398 
399 #ifdef CONFIG_DEBUG_FS
stf_barrier_set(void * data,u64 val)400 static int stf_barrier_set(void *data, u64 val)
401 {
402 	bool enable;
403 
404 	if (val == 1)
405 		enable = true;
406 	else if (val == 0)
407 		enable = false;
408 	else
409 		return -EINVAL;
410 
411 	/* Only do anything if we're changing state */
412 	if (enable != stf_barrier)
413 		stf_barrier_enable(enable);
414 
415 	return 0;
416 }
417 
stf_barrier_get(void * data,u64 * val)418 static int stf_barrier_get(void *data, u64 *val)
419 {
420 	*val = stf_barrier ? 1 : 0;
421 	return 0;
422 }
423 
424 DEFINE_DEBUGFS_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set,
425 			 "%llu\n");
426 
stf_barrier_debugfs_init(void)427 static __init int stf_barrier_debugfs_init(void)
428 {
429 	debugfs_create_file_unsafe("stf_barrier", 0600, arch_debugfs_dir,
430 				   NULL, &fops_stf_barrier);
431 	return 0;
432 }
433 device_initcall(stf_barrier_debugfs_init);
434 #endif /* CONFIG_DEBUG_FS */
435 
update_branch_cache_flush(void)436 static void update_branch_cache_flush(void)
437 {
438 	u32 *site, __maybe_unused *site2;
439 
440 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
441 	site = &patch__call_kvm_flush_link_stack;
442 	site2 = &patch__call_kvm_flush_link_stack_p9;
443 	// This controls the branch from guest_exit_cont to kvm_flush_link_stack
444 	if (link_stack_flush_type == BRANCH_CACHE_FLUSH_NONE) {
445 		patch_instruction_site(site, ppc_inst(PPC_RAW_NOP()));
446 		patch_instruction_site(site2, ppc_inst(PPC_RAW_NOP()));
447 	} else {
448 		// Could use HW flush, but that could also flush count cache
449 		patch_branch_site(site, (u64)&kvm_flush_link_stack, BRANCH_SET_LINK);
450 		patch_branch_site(site2, (u64)&kvm_flush_link_stack, BRANCH_SET_LINK);
451 	}
452 #endif
453 
454 	// Patch out the bcctr first, then nop the rest
455 	site = &patch__call_flush_branch_caches3;
456 	patch_instruction_site(site, ppc_inst(PPC_RAW_NOP()));
457 	site = &patch__call_flush_branch_caches2;
458 	patch_instruction_site(site, ppc_inst(PPC_RAW_NOP()));
459 	site = &patch__call_flush_branch_caches1;
460 	patch_instruction_site(site, ppc_inst(PPC_RAW_NOP()));
461 
462 	// This controls the branch from _switch to flush_branch_caches
463 	if (count_cache_flush_type == BRANCH_CACHE_FLUSH_NONE &&
464 	    link_stack_flush_type == BRANCH_CACHE_FLUSH_NONE) {
465 		// Nothing to be done
466 
467 	} else if (count_cache_flush_type == BRANCH_CACHE_FLUSH_HW &&
468 		   link_stack_flush_type == BRANCH_CACHE_FLUSH_HW) {
469 		// Patch in the bcctr last
470 		site = &patch__call_flush_branch_caches1;
471 		patch_instruction_site(site, ppc_inst(0x39207fff)); // li r9,0x7fff
472 		site = &patch__call_flush_branch_caches2;
473 		patch_instruction_site(site, ppc_inst(0x7d2903a6)); // mtctr r9
474 		site = &patch__call_flush_branch_caches3;
475 		patch_instruction_site(site, ppc_inst(PPC_INST_BCCTR_FLUSH));
476 
477 	} else {
478 		patch_branch_site(site, (u64)&flush_branch_caches, BRANCH_SET_LINK);
479 
480 		// If we just need to flush the link stack, early return
481 		if (count_cache_flush_type == BRANCH_CACHE_FLUSH_NONE) {
482 			patch_instruction_site(&patch__flush_link_stack_return,
483 					       ppc_inst(PPC_RAW_BLR()));
484 
485 		// If we have flush instruction, early return
486 		} else if (count_cache_flush_type == BRANCH_CACHE_FLUSH_HW) {
487 			patch_instruction_site(&patch__flush_count_cache_return,
488 					       ppc_inst(PPC_RAW_BLR()));
489 		}
490 	}
491 }
492 
toggle_branch_cache_flush(bool enable)493 static void toggle_branch_cache_flush(bool enable)
494 {
495 	if (!enable || !security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE)) {
496 		if (count_cache_flush_type != BRANCH_CACHE_FLUSH_NONE)
497 			count_cache_flush_type = BRANCH_CACHE_FLUSH_NONE;
498 
499 		pr_info("count-cache-flush: flush disabled.\n");
500 	} else {
501 		if (security_ftr_enabled(SEC_FTR_BCCTR_FLUSH_ASSIST)) {
502 			count_cache_flush_type = BRANCH_CACHE_FLUSH_HW;
503 			pr_info("count-cache-flush: hardware flush enabled.\n");
504 		} else {
505 			count_cache_flush_type = BRANCH_CACHE_FLUSH_SW;
506 			pr_info("count-cache-flush: software flush enabled.\n");
507 		}
508 	}
509 
510 	if (!enable || !security_ftr_enabled(SEC_FTR_FLUSH_LINK_STACK)) {
511 		if (link_stack_flush_type != BRANCH_CACHE_FLUSH_NONE)
512 			link_stack_flush_type = BRANCH_CACHE_FLUSH_NONE;
513 
514 		pr_info("link-stack-flush: flush disabled.\n");
515 	} else {
516 		if (security_ftr_enabled(SEC_FTR_BCCTR_LINK_FLUSH_ASSIST)) {
517 			link_stack_flush_type = BRANCH_CACHE_FLUSH_HW;
518 			pr_info("link-stack-flush: hardware flush enabled.\n");
519 		} else {
520 			link_stack_flush_type = BRANCH_CACHE_FLUSH_SW;
521 			pr_info("link-stack-flush: software flush enabled.\n");
522 		}
523 	}
524 
525 	update_branch_cache_flush();
526 }
527 
setup_count_cache_flush(void)528 void setup_count_cache_flush(void)
529 {
530 	bool enable = true;
531 
532 	if (no_spectrev2 || cpu_mitigations_off()) {
533 		if (security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED) ||
534 		    security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED))
535 			pr_warn("Spectre v2 mitigations not fully under software control, can't disable\n");
536 
537 		enable = false;
538 	}
539 
540 	/*
541 	 * There's no firmware feature flag/hypervisor bit to tell us we need to
542 	 * flush the link stack on context switch. So we set it here if we see
543 	 * either of the Spectre v2 mitigations that aim to protect userspace.
544 	 */
545 	if (security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED) ||
546 	    security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE))
547 		security_ftr_set(SEC_FTR_FLUSH_LINK_STACK);
548 
549 	toggle_branch_cache_flush(enable);
550 }
551 
552 static enum l1d_flush_type enabled_flush_types;
553 static void *l1d_flush_fallback_area;
554 static bool no_rfi_flush;
555 static bool no_entry_flush;
556 static bool no_uaccess_flush;
557 bool rfi_flush;
558 static bool entry_flush;
559 static bool uaccess_flush;
560 DEFINE_STATIC_KEY_FALSE(uaccess_flush_key);
561 EXPORT_SYMBOL(uaccess_flush_key);
562 
handle_no_rfi_flush(char * p)563 static int __init handle_no_rfi_flush(char *p)
564 {
565 	pr_info("rfi-flush: disabled on command line.");
566 	no_rfi_flush = true;
567 	return 0;
568 }
569 early_param("no_rfi_flush", handle_no_rfi_flush);
570 
handle_no_entry_flush(char * p)571 static int __init handle_no_entry_flush(char *p)
572 {
573 	pr_info("entry-flush: disabled on command line.");
574 	no_entry_flush = true;
575 	return 0;
576 }
577 early_param("no_entry_flush", handle_no_entry_flush);
578 
handle_no_uaccess_flush(char * p)579 static int __init handle_no_uaccess_flush(char *p)
580 {
581 	pr_info("uaccess-flush: disabled on command line.");
582 	no_uaccess_flush = true;
583 	return 0;
584 }
585 early_param("no_uaccess_flush", handle_no_uaccess_flush);
586 
587 /*
588  * The RFI flush is not KPTI, but because users will see doco that says to use
589  * nopti we hijack that option here to also disable the RFI flush.
590  */
handle_no_pti(char * p)591 static int __init handle_no_pti(char *p)
592 {
593 	pr_info("rfi-flush: disabling due to 'nopti' on command line.\n");
594 	handle_no_rfi_flush(NULL);
595 	return 0;
596 }
597 early_param("nopti", handle_no_pti);
598 
do_nothing(void * unused)599 static void do_nothing(void *unused)
600 {
601 	/*
602 	 * We don't need to do the flush explicitly, just enter+exit kernel is
603 	 * sufficient, the RFI exit handlers will do the right thing.
604 	 */
605 }
606 
rfi_flush_enable(bool enable)607 void rfi_flush_enable(bool enable)
608 {
609 	if (enable) {
610 		do_rfi_flush_fixups(enabled_flush_types);
611 		on_each_cpu(do_nothing, NULL, 1);
612 	} else
613 		do_rfi_flush_fixups(L1D_FLUSH_NONE);
614 
615 	rfi_flush = enable;
616 }
617 
entry_flush_enable(bool enable)618 static void entry_flush_enable(bool enable)
619 {
620 	if (enable) {
621 		do_entry_flush_fixups(enabled_flush_types);
622 		on_each_cpu(do_nothing, NULL, 1);
623 	} else {
624 		do_entry_flush_fixups(L1D_FLUSH_NONE);
625 	}
626 
627 	entry_flush = enable;
628 }
629 
uaccess_flush_enable(bool enable)630 static void uaccess_flush_enable(bool enable)
631 {
632 	if (enable) {
633 		do_uaccess_flush_fixups(enabled_flush_types);
634 		static_branch_enable(&uaccess_flush_key);
635 		on_each_cpu(do_nothing, NULL, 1);
636 	} else {
637 		static_branch_disable(&uaccess_flush_key);
638 		do_uaccess_flush_fixups(L1D_FLUSH_NONE);
639 	}
640 
641 	uaccess_flush = enable;
642 }
643 
init_fallback_flush(void)644 static void __ref init_fallback_flush(void)
645 {
646 	u64 l1d_size, limit;
647 	int cpu;
648 
649 	/* Only allocate the fallback flush area once (at boot time). */
650 	if (l1d_flush_fallback_area)
651 		return;
652 
653 	l1d_size = ppc64_caches.l1d.size;
654 
655 	/*
656 	 * If there is no d-cache-size property in the device tree, l1d_size
657 	 * could be zero. That leads to the loop in the asm wrapping around to
658 	 * 2^64-1, and then walking off the end of the fallback area and
659 	 * eventually causing a page fault which is fatal. Just default to
660 	 * something vaguely sane.
661 	 */
662 	if (!l1d_size)
663 		l1d_size = (64 * 1024);
664 
665 	limit = min(ppc64_bolted_size(), ppc64_rma_size);
666 
667 	/*
668 	 * Align to L1d size, and size it at 2x L1d size, to catch possible
669 	 * hardware prefetch runoff. We don't have a recipe for load patterns to
670 	 * reliably avoid the prefetcher.
671 	 */
672 	l1d_flush_fallback_area = memblock_alloc_try_nid(l1d_size * 2,
673 						l1d_size, MEMBLOCK_LOW_LIMIT,
674 						limit, NUMA_NO_NODE);
675 	if (!l1d_flush_fallback_area)
676 		panic("%s: Failed to allocate %llu bytes align=0x%llx max_addr=%pa\n",
677 		      __func__, l1d_size * 2, l1d_size, &limit);
678 
679 
680 	for_each_possible_cpu(cpu) {
681 		struct paca_struct *paca = paca_ptrs[cpu];
682 		paca->rfi_flush_fallback_area = l1d_flush_fallback_area;
683 		paca->l1d_flush_size = l1d_size;
684 	}
685 }
686 
setup_rfi_flush(enum l1d_flush_type types,bool enable)687 void setup_rfi_flush(enum l1d_flush_type types, bool enable)
688 {
689 	if (types & L1D_FLUSH_FALLBACK) {
690 		pr_info("rfi-flush: fallback displacement flush available\n");
691 		init_fallback_flush();
692 	}
693 
694 	if (types & L1D_FLUSH_ORI)
695 		pr_info("rfi-flush: ori type flush available\n");
696 
697 	if (types & L1D_FLUSH_MTTRIG)
698 		pr_info("rfi-flush: mttrig type flush available\n");
699 
700 	enabled_flush_types = types;
701 
702 	if (!cpu_mitigations_off() && !no_rfi_flush)
703 		rfi_flush_enable(enable);
704 }
705 
setup_entry_flush(bool enable)706 void setup_entry_flush(bool enable)
707 {
708 	if (cpu_mitigations_off())
709 		return;
710 
711 	if (!no_entry_flush)
712 		entry_flush_enable(enable);
713 }
714 
setup_uaccess_flush(bool enable)715 void setup_uaccess_flush(bool enable)
716 {
717 	if (cpu_mitigations_off())
718 		return;
719 
720 	if (!no_uaccess_flush)
721 		uaccess_flush_enable(enable);
722 }
723 
724 #ifdef CONFIG_DEBUG_FS
count_cache_flush_set(void * data,u64 val)725 static int count_cache_flush_set(void *data, u64 val)
726 {
727 	bool enable;
728 
729 	if (val == 1)
730 		enable = true;
731 	else if (val == 0)
732 		enable = false;
733 	else
734 		return -EINVAL;
735 
736 	toggle_branch_cache_flush(enable);
737 
738 	return 0;
739 }
740 
count_cache_flush_get(void * data,u64 * val)741 static int count_cache_flush_get(void *data, u64 *val)
742 {
743 	if (count_cache_flush_type == BRANCH_CACHE_FLUSH_NONE)
744 		*val = 0;
745 	else
746 		*val = 1;
747 
748 	return 0;
749 }
750 
751 DEFINE_DEBUGFS_ATTRIBUTE(fops_count_cache_flush, count_cache_flush_get,
752 			 count_cache_flush_set, "%llu\n");
753 
count_cache_flush_debugfs_init(void)754 static __init int count_cache_flush_debugfs_init(void)
755 {
756 	debugfs_create_file_unsafe("count_cache_flush", 0600,
757 				   arch_debugfs_dir, NULL,
758 				   &fops_count_cache_flush);
759 	return 0;
760 }
761 device_initcall(count_cache_flush_debugfs_init);
762 
rfi_flush_set(void * data,u64 val)763 static int rfi_flush_set(void *data, u64 val)
764 {
765 	bool enable;
766 
767 	if (val == 1)
768 		enable = true;
769 	else if (val == 0)
770 		enable = false;
771 	else
772 		return -EINVAL;
773 
774 	/* Only do anything if we're changing state */
775 	if (enable != rfi_flush)
776 		rfi_flush_enable(enable);
777 
778 	return 0;
779 }
780 
rfi_flush_get(void * data,u64 * val)781 static int rfi_flush_get(void *data, u64 *val)
782 {
783 	*val = rfi_flush ? 1 : 0;
784 	return 0;
785 }
786 
787 DEFINE_SIMPLE_ATTRIBUTE(fops_rfi_flush, rfi_flush_get, rfi_flush_set, "%llu\n");
788 
entry_flush_set(void * data,u64 val)789 static int entry_flush_set(void *data, u64 val)
790 {
791 	bool enable;
792 
793 	if (val == 1)
794 		enable = true;
795 	else if (val == 0)
796 		enable = false;
797 	else
798 		return -EINVAL;
799 
800 	/* Only do anything if we're changing state */
801 	if (enable != entry_flush)
802 		entry_flush_enable(enable);
803 
804 	return 0;
805 }
806 
entry_flush_get(void * data,u64 * val)807 static int entry_flush_get(void *data, u64 *val)
808 {
809 	*val = entry_flush ? 1 : 0;
810 	return 0;
811 }
812 
813 DEFINE_SIMPLE_ATTRIBUTE(fops_entry_flush, entry_flush_get, entry_flush_set, "%llu\n");
814 
uaccess_flush_set(void * data,u64 val)815 static int uaccess_flush_set(void *data, u64 val)
816 {
817 	bool enable;
818 
819 	if (val == 1)
820 		enable = true;
821 	else if (val == 0)
822 		enable = false;
823 	else
824 		return -EINVAL;
825 
826 	/* Only do anything if we're changing state */
827 	if (enable != uaccess_flush)
828 		uaccess_flush_enable(enable);
829 
830 	return 0;
831 }
832 
uaccess_flush_get(void * data,u64 * val)833 static int uaccess_flush_get(void *data, u64 *val)
834 {
835 	*val = uaccess_flush ? 1 : 0;
836 	return 0;
837 }
838 
839 DEFINE_SIMPLE_ATTRIBUTE(fops_uaccess_flush, uaccess_flush_get, uaccess_flush_set, "%llu\n");
840 
rfi_flush_debugfs_init(void)841 static __init int rfi_flush_debugfs_init(void)
842 {
843 	debugfs_create_file("rfi_flush", 0600, arch_debugfs_dir, NULL, &fops_rfi_flush);
844 	debugfs_create_file("entry_flush", 0600, arch_debugfs_dir, NULL, &fops_entry_flush);
845 	debugfs_create_file("uaccess_flush", 0600, arch_debugfs_dir, NULL, &fops_uaccess_flush);
846 	return 0;
847 }
848 device_initcall(rfi_flush_debugfs_init);
849 #endif /* CONFIG_DEBUG_FS */
850 #endif /* CONFIG_PPC_BOOK3S_64 */
851