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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
3 
4 #ifndef _IONIC_DEV_H_
5 #define _IONIC_DEV_H_
6 
7 #include <linux/atomic.h>
8 #include <linux/mutex.h>
9 #include <linux/workqueue.h>
10 
11 #include "ionic_if.h"
12 #include "ionic_regs.h"
13 
14 #define IONIC_MAX_TX_DESC		8192
15 #define IONIC_MAX_RX_DESC		16384
16 #define IONIC_MIN_TXRX_DESC		64
17 #define IONIC_DEF_TXRX_DESC		4096
18 #define IONIC_RX_FILL_THRESHOLD		16
19 #define IONIC_RX_FILL_DIV		8
20 #define IONIC_LIFS_MAX			1024
21 #define IONIC_WATCHDOG_SECS		5
22 #define IONIC_ITR_COAL_USEC_DEFAULT	64
23 
24 #define IONIC_DEV_CMD_REG_VERSION	1
25 #define IONIC_DEV_INFO_REG_COUNT	32
26 #define IONIC_DEV_CMD_REG_COUNT		32
27 
28 struct ionic_dev_bar {
29 	void __iomem *vaddr;
30 	phys_addr_t bus_addr;
31 	unsigned long len;
32 	int res_index;
33 };
34 
35 #ifndef __CHECKER__
36 /* Registers */
37 static_assert(sizeof(struct ionic_intr) == 32);
38 
39 static_assert(sizeof(struct ionic_doorbell) == 8);
40 static_assert(sizeof(struct ionic_intr_status) == 8);
41 static_assert(sizeof(union ionic_dev_regs) == 4096);
42 static_assert(sizeof(union ionic_dev_info_regs) == 2048);
43 static_assert(sizeof(union ionic_dev_cmd_regs) == 2048);
44 static_assert(sizeof(struct ionic_lif_stats) == 1024);
45 
46 static_assert(sizeof(struct ionic_admin_cmd) == 64);
47 static_assert(sizeof(struct ionic_admin_comp) == 16);
48 static_assert(sizeof(struct ionic_nop_cmd) == 64);
49 static_assert(sizeof(struct ionic_nop_comp) == 16);
50 
51 /* Device commands */
52 static_assert(sizeof(struct ionic_dev_identify_cmd) == 64);
53 static_assert(sizeof(struct ionic_dev_identify_comp) == 16);
54 static_assert(sizeof(struct ionic_dev_init_cmd) == 64);
55 static_assert(sizeof(struct ionic_dev_init_comp) == 16);
56 static_assert(sizeof(struct ionic_dev_reset_cmd) == 64);
57 static_assert(sizeof(struct ionic_dev_reset_comp) == 16);
58 static_assert(sizeof(struct ionic_dev_getattr_cmd) == 64);
59 static_assert(sizeof(struct ionic_dev_getattr_comp) == 16);
60 static_assert(sizeof(struct ionic_dev_setattr_cmd) == 64);
61 static_assert(sizeof(struct ionic_dev_setattr_comp) == 16);
62 static_assert(sizeof(struct ionic_lif_setphc_cmd) == 64);
63 
64 /* Port commands */
65 static_assert(sizeof(struct ionic_port_identify_cmd) == 64);
66 static_assert(sizeof(struct ionic_port_identify_comp) == 16);
67 static_assert(sizeof(struct ionic_port_init_cmd) == 64);
68 static_assert(sizeof(struct ionic_port_init_comp) == 16);
69 static_assert(sizeof(struct ionic_port_reset_cmd) == 64);
70 static_assert(sizeof(struct ionic_port_reset_comp) == 16);
71 static_assert(sizeof(struct ionic_port_getattr_cmd) == 64);
72 static_assert(sizeof(struct ionic_port_getattr_comp) == 16);
73 static_assert(sizeof(struct ionic_port_setattr_cmd) == 64);
74 static_assert(sizeof(struct ionic_port_setattr_comp) == 16);
75 
76 /* LIF commands */
77 static_assert(sizeof(struct ionic_lif_init_cmd) == 64);
78 static_assert(sizeof(struct ionic_lif_init_comp) == 16);
79 static_assert(sizeof(struct ionic_lif_reset_cmd) == 64);
80 static_assert(sizeof(ionic_lif_reset_comp) == 16);
81 static_assert(sizeof(struct ionic_lif_getattr_cmd) == 64);
82 static_assert(sizeof(struct ionic_lif_getattr_comp) == 16);
83 static_assert(sizeof(struct ionic_lif_setattr_cmd) == 64);
84 static_assert(sizeof(struct ionic_lif_setattr_comp) == 16);
85 
86 static_assert(sizeof(struct ionic_q_init_cmd) == 64);
87 static_assert(sizeof(struct ionic_q_init_comp) == 16);
88 static_assert(sizeof(struct ionic_q_control_cmd) == 64);
89 static_assert(sizeof(ionic_q_control_comp) == 16);
90 static_assert(sizeof(struct ionic_q_identify_cmd) == 64);
91 static_assert(sizeof(struct ionic_q_identify_comp) == 16);
92 
93 static_assert(sizeof(struct ionic_rx_mode_set_cmd) == 64);
94 static_assert(sizeof(ionic_rx_mode_set_comp) == 16);
95 static_assert(sizeof(struct ionic_rx_filter_add_cmd) == 64);
96 static_assert(sizeof(struct ionic_rx_filter_add_comp) == 16);
97 static_assert(sizeof(struct ionic_rx_filter_del_cmd) == 64);
98 static_assert(sizeof(ionic_rx_filter_del_comp) == 16);
99 
100 /* RDMA commands */
101 static_assert(sizeof(struct ionic_rdma_reset_cmd) == 64);
102 static_assert(sizeof(struct ionic_rdma_queue_cmd) == 64);
103 
104 /* Events */
105 static_assert(sizeof(struct ionic_notifyq_cmd) == 4);
106 static_assert(sizeof(union ionic_notifyq_comp) == 64);
107 static_assert(sizeof(struct ionic_notifyq_event) == 64);
108 static_assert(sizeof(struct ionic_link_change_event) == 64);
109 static_assert(sizeof(struct ionic_reset_event) == 64);
110 static_assert(sizeof(struct ionic_heartbeat_event) == 64);
111 static_assert(sizeof(struct ionic_log_event) == 64);
112 
113 /* I/O */
114 static_assert(sizeof(struct ionic_txq_desc) == 16);
115 static_assert(sizeof(struct ionic_txq_sg_desc) == 128);
116 static_assert(sizeof(struct ionic_txq_comp) == 16);
117 
118 static_assert(sizeof(struct ionic_rxq_desc) == 16);
119 static_assert(sizeof(struct ionic_rxq_sg_desc) == 128);
120 static_assert(sizeof(struct ionic_rxq_comp) == 16);
121 
122 /* SR/IOV */
123 static_assert(sizeof(struct ionic_vf_setattr_cmd) == 64);
124 static_assert(sizeof(struct ionic_vf_setattr_comp) == 16);
125 static_assert(sizeof(struct ionic_vf_getattr_cmd) == 64);
126 static_assert(sizeof(struct ionic_vf_getattr_comp) == 16);
127 #endif /* __CHECKER__ */
128 
129 struct ionic_devinfo {
130 	u8 asic_type;
131 	u8 asic_rev;
132 	char fw_version[IONIC_DEVINFO_FWVERS_BUFLEN + 1];
133 	char serial_num[IONIC_DEVINFO_SERIAL_BUFLEN + 1];
134 };
135 
136 struct ionic_dev {
137 	union ionic_dev_info_regs __iomem *dev_info_regs;
138 	union ionic_dev_cmd_regs __iomem *dev_cmd_regs;
139 	struct ionic_hwstamp_regs __iomem *hwstamp_regs;
140 
141 	atomic_long_t last_check_time;
142 	unsigned long last_hb_time;
143 	u32 last_fw_hb;
144 	bool fw_hb_ready;
145 	bool fw_status_ready;
146 	u8 fw_generation;
147 	u8 opcode;
148 
149 	u64 __iomem *db_pages;
150 	dma_addr_t phy_db_pages;
151 
152 	struct ionic_intr __iomem *intr_ctrl;
153 	u64 __iomem *intr_status;
154 
155 	u32 port_info_sz;
156 	struct ionic_port_info *port_info;
157 	dma_addr_t port_info_pa;
158 
159 	struct ionic_devinfo dev_info;
160 };
161 
162 struct ionic_cq_info {
163 	union {
164 		void *cq_desc;
165 		struct ionic_admin_comp *admincq;
166 		struct ionic_notifyq_event *notifyq;
167 	};
168 };
169 
170 struct ionic_queue;
171 struct ionic_qcq;
172 struct ionic_desc_info;
173 
174 typedef void (*ionic_desc_cb)(struct ionic_queue *q,
175 			      struct ionic_desc_info *desc_info,
176 			      struct ionic_cq_info *cq_info, void *cb_arg);
177 
178 #define IONIC_MAX_BUF_LEN			((u16)-1)
179 #define IONIC_PAGE_SIZE				PAGE_SIZE
180 #define IONIC_PAGE_SPLIT_SZ			(PAGE_SIZE / 2)
181 #define IONIC_PAGE_GFP_MASK			(GFP_ATOMIC | __GFP_NOWARN |\
182 						 __GFP_COMP | __GFP_MEMALLOC)
183 
184 struct ionic_buf_info {
185 	struct page *page;
186 	dma_addr_t dma_addr;
187 	u32 page_offset;
188 	u32 len;
189 };
190 
191 #define IONIC_MAX_FRAGS			(1 + IONIC_TX_MAX_SG_ELEMS_V1)
192 
193 struct ionic_desc_info {
194 	union {
195 		void *desc;
196 		struct ionic_txq_desc *txq_desc;
197 		struct ionic_rxq_desc *rxq_desc;
198 		struct ionic_admin_cmd *adminq_desc;
199 	};
200 	union {
201 		void *sg_desc;
202 		struct ionic_txq_sg_desc *txq_sg_desc;
203 		struct ionic_rxq_sg_desc *rxq_sgl_desc;
204 	};
205 	unsigned int bytes;
206 	unsigned int nbufs;
207 	struct ionic_buf_info bufs[IONIC_MAX_FRAGS];
208 	ionic_desc_cb cb;
209 	void *cb_arg;
210 };
211 
212 #define IONIC_QUEUE_NAME_MAX_SZ		16
213 
214 struct ionic_queue {
215 	struct device *dev;
216 	struct ionic_lif *lif;
217 	struct ionic_desc_info *info;
218 	u64 dbval;
219 	u16 head_idx;
220 	u16 tail_idx;
221 	unsigned int index;
222 	unsigned int num_descs;
223 	unsigned int max_sg_elems;
224 	u64 features;
225 	u64 dbell_count;
226 	u64 stop;
227 	u64 wake;
228 	u64 drop;
229 	struct ionic_dev *idev;
230 	unsigned int type;
231 	unsigned int hw_index;
232 	unsigned int hw_type;
233 	union {
234 		void *base;
235 		struct ionic_txq_desc *txq;
236 		struct ionic_rxq_desc *rxq;
237 		struct ionic_admin_cmd *adminq;
238 	};
239 	union {
240 		void *sg_base;
241 		struct ionic_txq_sg_desc *txq_sgl;
242 		struct ionic_rxq_sg_desc *rxq_sgl;
243 	};
244 	dma_addr_t base_pa;
245 	dma_addr_t sg_base_pa;
246 	unsigned int desc_size;
247 	unsigned int sg_desc_size;
248 	unsigned int pid;
249 	char name[IONIC_QUEUE_NAME_MAX_SZ];
250 } ____cacheline_aligned_in_smp;
251 
252 #define IONIC_INTR_INDEX_NOT_ASSIGNED	-1
253 #define IONIC_INTR_NAME_MAX_SZ		32
254 
255 struct ionic_intr_info {
256 	char name[IONIC_INTR_NAME_MAX_SZ];
257 	unsigned int index;
258 	unsigned int vector;
259 	u64 rearm_count;
260 	unsigned int cpu;
261 	cpumask_t affinity_mask;
262 	u32 dim_coal_hw;
263 };
264 
265 struct ionic_cq {
266 	struct ionic_lif *lif;
267 	struct ionic_cq_info *info;
268 	struct ionic_queue *bound_q;
269 	struct ionic_intr_info *bound_intr;
270 	u16 tail_idx;
271 	bool done_color;
272 	unsigned int num_descs;
273 	unsigned int desc_size;
274 	u64 compl_count;
275 	void *base;
276 	dma_addr_t base_pa;
277 } ____cacheline_aligned_in_smp;
278 
279 struct ionic;
280 
ionic_intr_init(struct ionic_dev * idev,struct ionic_intr_info * intr,unsigned long index)281 static inline void ionic_intr_init(struct ionic_dev *idev,
282 				   struct ionic_intr_info *intr,
283 				   unsigned long index)
284 {
285 	ionic_intr_clean(idev->intr_ctrl, index);
286 	intr->index = index;
287 }
288 
ionic_q_space_avail(struct ionic_queue * q)289 static inline unsigned int ionic_q_space_avail(struct ionic_queue *q)
290 {
291 	unsigned int avail = q->tail_idx;
292 
293 	if (q->head_idx >= avail)
294 		avail += q->num_descs - q->head_idx - 1;
295 	else
296 		avail -= q->head_idx + 1;
297 
298 	return avail;
299 }
300 
ionic_q_has_space(struct ionic_queue * q,unsigned int want)301 static inline bool ionic_q_has_space(struct ionic_queue *q, unsigned int want)
302 {
303 	return ionic_q_space_avail(q) >= want;
304 }
305 
306 void ionic_init_devinfo(struct ionic *ionic);
307 int ionic_dev_setup(struct ionic *ionic);
308 
309 void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);
310 u8 ionic_dev_cmd_status(struct ionic_dev *idev);
311 bool ionic_dev_cmd_done(struct ionic_dev *idev);
312 void ionic_dev_cmd_comp(struct ionic_dev *idev, union ionic_dev_cmd_comp *comp);
313 
314 void ionic_dev_cmd_identify(struct ionic_dev *idev, u8 ver);
315 void ionic_dev_cmd_init(struct ionic_dev *idev);
316 void ionic_dev_cmd_reset(struct ionic_dev *idev);
317 
318 void ionic_dev_cmd_port_identify(struct ionic_dev *idev);
319 void ionic_dev_cmd_port_init(struct ionic_dev *idev);
320 void ionic_dev_cmd_port_reset(struct ionic_dev *idev);
321 void ionic_dev_cmd_port_state(struct ionic_dev *idev, u8 state);
322 void ionic_dev_cmd_port_speed(struct ionic_dev *idev, u32 speed);
323 void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, u8 an_enable);
324 void ionic_dev_cmd_port_fec(struct ionic_dev *idev, u8 fec_type);
325 void ionic_dev_cmd_port_pause(struct ionic_dev *idev, u8 pause_type);
326 
327 int ionic_set_vf_config(struct ionic *ionic, int vf, u8 attr, u8 *data);
328 void ionic_dev_cmd_queue_identify(struct ionic_dev *idev,
329 				  u16 lif_type, u8 qtype, u8 qver);
330 void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, u8 type, u8 ver);
331 void ionic_dev_cmd_lif_init(struct ionic_dev *idev, u16 lif_index,
332 			    dma_addr_t addr);
333 void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, u16 lif_index);
334 void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq,
335 			       u16 lif_index, u16 intr_index);
336 
337 int ionic_db_page_num(struct ionic_lif *lif, int pid);
338 
339 int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq,
340 		  struct ionic_intr_info *intr,
341 		  unsigned int num_descs, size_t desc_size);
342 void ionic_cq_map(struct ionic_cq *cq, void *base, dma_addr_t base_pa);
343 void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q);
344 typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, struct ionic_cq_info *cq_info);
345 typedef void (*ionic_cq_done_cb)(void *done_arg);
346 unsigned int ionic_cq_service(struct ionic_cq *cq, unsigned int work_to_do,
347 			      ionic_cq_cb cb, ionic_cq_done_cb done_cb,
348 			      void *done_arg);
349 
350 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
351 		 struct ionic_queue *q, unsigned int index, const char *name,
352 		 unsigned int num_descs, size_t desc_size,
353 		 size_t sg_desc_size, unsigned int pid);
354 void ionic_q_map(struct ionic_queue *q, void *base, dma_addr_t base_pa);
355 void ionic_q_sg_map(struct ionic_queue *q, void *base, dma_addr_t base_pa);
356 void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, ionic_desc_cb cb,
357 		  void *cb_arg);
358 void ionic_q_rewind(struct ionic_queue *q, struct ionic_desc_info *start);
359 void ionic_q_service(struct ionic_queue *q, struct ionic_cq_info *cq_info,
360 		     unsigned int stop_index);
361 int ionic_heartbeat_check(struct ionic *ionic);
362 bool ionic_is_fw_running(struct ionic_dev *idev);
363 
364 #endif /* _IONIC_DEV_H_ */
365