1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2016 MediaTek Inc.
4 *
5 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
6 */
7
8 #include <linux/dma-mapping.h>
9 #include <linux/iopoll.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/of_address.h>
13 #include <linux/of_irq.h>
14 #include <linux/platform_device.h>
15 #include <linux/pm_wakeirq.h>
16
17 #include "mtu3.h"
18 #include "mtu3_dr.h"
19 #include "mtu3_debug.h"
20
21 /* u2-port0 should be powered on and enabled; */
ssusb_check_clocks(struct ssusb_mtk * ssusb,u32 ex_clks)22 int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
23 {
24 void __iomem *ibase = ssusb->ippc_base;
25 u32 value, check_val;
26 int ret;
27
28 check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
29 SSUSB_REF_RST_B_STS;
30
31 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
32 (check_val == (value & check_val)), 100, 20000);
33 if (ret) {
34 dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
35 return ret;
36 }
37
38 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
39 (value & SSUSB_U2_MAC_SYS_RST_B_STS), 100, 10000);
40 if (ret) {
41 dev_err(ssusb->dev, "mac2 clock is not stable\n");
42 return ret;
43 }
44
45 return 0;
46 }
47
wait_for_ip_sleep(struct ssusb_mtk * ssusb)48 static int wait_for_ip_sleep(struct ssusb_mtk *ssusb)
49 {
50 bool sleep_check = true;
51 u32 value;
52 int ret;
53
54 if (!ssusb->is_host)
55 sleep_check = ssusb_gadget_ip_sleep_check(ssusb);
56
57 if (!sleep_check)
58 return 0;
59
60 /* wait for ip enter sleep mode */
61 ret = readl_poll_timeout(ssusb->ippc_base + U3D_SSUSB_IP_PW_STS1, value,
62 (value & SSUSB_IP_SLEEP_STS), 100, 100000);
63 if (ret) {
64 dev_err(ssusb->dev, "ip sleep failed!!!\n");
65 ret = -EBUSY;
66 } else {
67 /* workaround: avoid wrong wakeup signal latch for some soc */
68 usleep_range(100, 200);
69 }
70
71 return ret;
72 }
73
ssusb_phy_init(struct ssusb_mtk * ssusb)74 static int ssusb_phy_init(struct ssusb_mtk *ssusb)
75 {
76 int i;
77 int ret;
78
79 for (i = 0; i < ssusb->num_phys; i++) {
80 ret = phy_init(ssusb->phys[i]);
81 if (ret)
82 goto exit_phy;
83 }
84 return 0;
85
86 exit_phy:
87 for (; i > 0; i--)
88 phy_exit(ssusb->phys[i - 1]);
89
90 return ret;
91 }
92
ssusb_phy_exit(struct ssusb_mtk * ssusb)93 static int ssusb_phy_exit(struct ssusb_mtk *ssusb)
94 {
95 int i;
96
97 for (i = 0; i < ssusb->num_phys; i++)
98 phy_exit(ssusb->phys[i]);
99
100 return 0;
101 }
102
ssusb_phy_power_on(struct ssusb_mtk * ssusb)103 static int ssusb_phy_power_on(struct ssusb_mtk *ssusb)
104 {
105 int i;
106 int ret;
107
108 for (i = 0; i < ssusb->num_phys; i++) {
109 ret = phy_power_on(ssusb->phys[i]);
110 if (ret)
111 goto power_off_phy;
112 }
113 return 0;
114
115 power_off_phy:
116 for (; i > 0; i--)
117 phy_power_off(ssusb->phys[i - 1]);
118
119 return ret;
120 }
121
ssusb_phy_power_off(struct ssusb_mtk * ssusb)122 static void ssusb_phy_power_off(struct ssusb_mtk *ssusb)
123 {
124 unsigned int i;
125
126 for (i = 0; i < ssusb->num_phys; i++)
127 phy_power_off(ssusb->phys[i]);
128 }
129
ssusb_rscs_init(struct ssusb_mtk * ssusb)130 static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
131 {
132 int ret = 0;
133
134 ret = regulator_enable(ssusb->vusb33);
135 if (ret) {
136 dev_err(ssusb->dev, "failed to enable vusb33\n");
137 goto vusb33_err;
138 }
139
140 ret = clk_bulk_prepare_enable(BULK_CLKS_CNT, ssusb->clks);
141 if (ret)
142 goto clks_err;
143
144 ret = ssusb_phy_init(ssusb);
145 if (ret) {
146 dev_err(ssusb->dev, "failed to init phy\n");
147 goto phy_init_err;
148 }
149
150 ret = ssusb_phy_power_on(ssusb);
151 if (ret) {
152 dev_err(ssusb->dev, "failed to power on phy\n");
153 goto phy_err;
154 }
155
156 return 0;
157
158 phy_err:
159 ssusb_phy_exit(ssusb);
160 phy_init_err:
161 clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
162 clks_err:
163 regulator_disable(ssusb->vusb33);
164 vusb33_err:
165 return ret;
166 }
167
ssusb_rscs_exit(struct ssusb_mtk * ssusb)168 static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
169 {
170 clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
171 regulator_disable(ssusb->vusb33);
172 ssusb_phy_power_off(ssusb);
173 ssusb_phy_exit(ssusb);
174 }
175
ssusb_ip_sw_reset(struct ssusb_mtk * ssusb)176 static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
177 {
178 /* reset whole ip (xhci & u3d) */
179 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
180 udelay(1);
181 mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
182
183 /*
184 * device ip may be powered on in firmware/BROM stage before entering
185 * kernel stage;
186 * power down device ip, otherwise ip-sleep will fail when working as
187 * host only mode
188 */
189 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
190 }
191
get_ssusb_rscs(struct platform_device * pdev,struct ssusb_mtk * ssusb)192 static int get_ssusb_rscs(struct platform_device *pdev, struct ssusb_mtk *ssusb)
193 {
194 struct device_node *node = pdev->dev.of_node;
195 struct otg_switch_mtk *otg_sx = &ssusb->otg_switch;
196 struct clk_bulk_data *clks = ssusb->clks;
197 struct device *dev = &pdev->dev;
198 int i;
199 int ret;
200
201 ssusb->vusb33 = devm_regulator_get(dev, "vusb33");
202 if (IS_ERR(ssusb->vusb33)) {
203 dev_err(dev, "failed to get vusb33\n");
204 return PTR_ERR(ssusb->vusb33);
205 }
206
207 clks[0].id = "sys_ck";
208 clks[1].id = "ref_ck";
209 clks[2].id = "mcu_ck";
210 clks[3].id = "dma_ck";
211 ret = devm_clk_bulk_get_optional(dev, BULK_CLKS_CNT, clks);
212 if (ret)
213 return ret;
214
215 ssusb->num_phys = of_count_phandle_with_args(node,
216 "phys", "#phy-cells");
217 if (ssusb->num_phys > 0) {
218 ssusb->phys = devm_kcalloc(dev, ssusb->num_phys,
219 sizeof(*ssusb->phys), GFP_KERNEL);
220 if (!ssusb->phys)
221 return -ENOMEM;
222 } else {
223 ssusb->num_phys = 0;
224 }
225
226 for (i = 0; i < ssusb->num_phys; i++) {
227 ssusb->phys[i] = devm_of_phy_get_by_index(dev, node, i);
228 if (IS_ERR(ssusb->phys[i])) {
229 dev_err(dev, "failed to get phy-%d\n", i);
230 return PTR_ERR(ssusb->phys[i]);
231 }
232 }
233
234 ssusb->ippc_base = devm_platform_ioremap_resource_byname(pdev, "ippc");
235 if (IS_ERR(ssusb->ippc_base))
236 return PTR_ERR(ssusb->ippc_base);
237
238 ssusb->wakeup_irq = platform_get_irq_byname_optional(pdev, "wakeup");
239 if (ssusb->wakeup_irq == -EPROBE_DEFER)
240 return ssusb->wakeup_irq;
241
242 ssusb->dr_mode = usb_get_dr_mode(dev);
243 if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN)
244 ssusb->dr_mode = USB_DR_MODE_OTG;
245
246 if (ssusb->dr_mode == USB_DR_MODE_PERIPHERAL)
247 goto out;
248
249 /* if host role is supported */
250 ret = ssusb_wakeup_of_property_parse(ssusb, node);
251 if (ret) {
252 dev_err(dev, "failed to parse uwk property\n");
253 return ret;
254 }
255
256 /* optional property, ignore the error if it does not exist */
257 of_property_read_u32(node, "mediatek,u3p-dis-msk",
258 &ssusb->u3p_dis_msk);
259 of_property_read_u32(node, "mediatek,u2p-dis-msk",
260 &ssusb->u2p_dis_msk);
261
262 otg_sx->vbus = devm_regulator_get(dev, "vbus");
263 if (IS_ERR(otg_sx->vbus)) {
264 dev_err(dev, "failed to get vbus\n");
265 return PTR_ERR(otg_sx->vbus);
266 }
267
268 if (ssusb->dr_mode == USB_DR_MODE_HOST)
269 goto out;
270
271 /* if dual-role mode is supported */
272 otg_sx->is_u3_drd = of_property_read_bool(node, "mediatek,usb3-drd");
273 otg_sx->manual_drd_enabled =
274 of_property_read_bool(node, "enable-manual-drd");
275 otg_sx->role_sw_used = of_property_read_bool(node, "usb-role-switch");
276
277 /* can't disable port0 when use dual-role mode */
278 ssusb->u2p_dis_msk &= ~0x1;
279
280 if (otg_sx->role_sw_used || otg_sx->manual_drd_enabled)
281 goto out;
282
283 if (of_property_read_bool(node, "extcon")) {
284 otg_sx->edev = extcon_get_edev_by_phandle(ssusb->dev, 0);
285 if (IS_ERR(otg_sx->edev)) {
286 return dev_err_probe(dev, PTR_ERR(otg_sx->edev),
287 "couldn't get extcon device\n");
288 }
289 }
290
291 out:
292 dev_info(dev, "dr_mode: %d, is_u3_dr: %d, drd: %s\n",
293 ssusb->dr_mode, otg_sx->is_u3_drd,
294 otg_sx->manual_drd_enabled ? "manual" : "auto");
295 dev_info(dev, "u2p_dis_msk: %x, u3p_dis_msk: %x\n",
296 ssusb->u2p_dis_msk, ssusb->u3p_dis_msk);
297
298 return 0;
299 }
300
mtu3_probe(struct platform_device * pdev)301 static int mtu3_probe(struct platform_device *pdev)
302 {
303 struct device_node *node = pdev->dev.of_node;
304 struct device *dev = &pdev->dev;
305 struct ssusb_mtk *ssusb;
306 int ret = -ENOMEM;
307
308 /* all elements are set to ZERO as default value */
309 ssusb = devm_kzalloc(dev, sizeof(*ssusb), GFP_KERNEL);
310 if (!ssusb)
311 return -ENOMEM;
312
313 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
314 if (ret) {
315 dev_err(dev, "No suitable DMA config available\n");
316 return -ENOTSUPP;
317 }
318
319 platform_set_drvdata(pdev, ssusb);
320 ssusb->dev = dev;
321
322 ret = get_ssusb_rscs(pdev, ssusb);
323 if (ret)
324 return ret;
325
326 ssusb_debugfs_create_root(ssusb);
327
328 /* enable power domain */
329 pm_runtime_set_active(dev);
330 pm_runtime_use_autosuspend(dev);
331 pm_runtime_set_autosuspend_delay(dev, 4000);
332 pm_runtime_enable(dev);
333 pm_runtime_get_sync(dev);
334
335 device_init_wakeup(dev, true);
336
337 ret = ssusb_rscs_init(ssusb);
338 if (ret)
339 goto comm_init_err;
340
341 if (ssusb->wakeup_irq > 0) {
342 ret = dev_pm_set_dedicated_wake_irq(dev, ssusb->wakeup_irq);
343 if (ret) {
344 dev_err(dev, "failed to set wakeup irq %d\n", ssusb->wakeup_irq);
345 goto comm_exit;
346 }
347 dev_info(dev, "wakeup irq %d\n", ssusb->wakeup_irq);
348 }
349
350 ssusb_ip_sw_reset(ssusb);
351
352 if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
353 ssusb->dr_mode = USB_DR_MODE_HOST;
354 else if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
355 ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
356
357 /* default as host */
358 ssusb->is_host = !(ssusb->dr_mode == USB_DR_MODE_PERIPHERAL);
359
360 switch (ssusb->dr_mode) {
361 case USB_DR_MODE_PERIPHERAL:
362 ret = ssusb_gadget_init(ssusb);
363 if (ret) {
364 dev_err(dev, "failed to initialize gadget\n");
365 goto comm_exit;
366 }
367 break;
368 case USB_DR_MODE_HOST:
369 ret = ssusb_host_init(ssusb, node);
370 if (ret) {
371 dev_err(dev, "failed to initialize host\n");
372 goto comm_exit;
373 }
374 break;
375 case USB_DR_MODE_OTG:
376 ret = ssusb_gadget_init(ssusb);
377 if (ret) {
378 dev_err(dev, "failed to initialize gadget\n");
379 goto comm_exit;
380 }
381
382 ret = ssusb_host_init(ssusb, node);
383 if (ret) {
384 dev_err(dev, "failed to initialize host\n");
385 goto gadget_exit;
386 }
387
388 ret = ssusb_otg_switch_init(ssusb);
389 if (ret) {
390 dev_err(dev, "failed to initialize switch\n");
391 goto host_exit;
392 }
393 break;
394 default:
395 dev_err(dev, "unsupported mode: %d\n", ssusb->dr_mode);
396 ret = -EINVAL;
397 goto comm_exit;
398 }
399
400 device_enable_async_suspend(dev);
401 pm_runtime_mark_last_busy(dev);
402 pm_runtime_put_autosuspend(dev);
403 pm_runtime_forbid(dev);
404
405 return 0;
406
407 host_exit:
408 ssusb_host_exit(ssusb);
409 gadget_exit:
410 ssusb_gadget_exit(ssusb);
411 comm_exit:
412 ssusb_rscs_exit(ssusb);
413 comm_init_err:
414 pm_runtime_put_noidle(dev);
415 pm_runtime_disable(dev);
416 ssusb_debugfs_remove_root(ssusb);
417
418 return ret;
419 }
420
mtu3_remove(struct platform_device * pdev)421 static int mtu3_remove(struct platform_device *pdev)
422 {
423 struct ssusb_mtk *ssusb = platform_get_drvdata(pdev);
424
425 pm_runtime_get_sync(&pdev->dev);
426
427 switch (ssusb->dr_mode) {
428 case USB_DR_MODE_PERIPHERAL:
429 ssusb_gadget_exit(ssusb);
430 break;
431 case USB_DR_MODE_HOST:
432 ssusb_host_exit(ssusb);
433 break;
434 case USB_DR_MODE_OTG:
435 ssusb_otg_switch_exit(ssusb);
436 ssusb_gadget_exit(ssusb);
437 ssusb_host_exit(ssusb);
438 break;
439 default:
440 return -EINVAL;
441 }
442
443 ssusb_rscs_exit(ssusb);
444 ssusb_debugfs_remove_root(ssusb);
445 pm_runtime_disable(&pdev->dev);
446 pm_runtime_put_noidle(&pdev->dev);
447 pm_runtime_set_suspended(&pdev->dev);
448
449 return 0;
450 }
451
resume_ip_and_ports(struct ssusb_mtk * ssusb,pm_message_t msg)452 static int resume_ip_and_ports(struct ssusb_mtk *ssusb, pm_message_t msg)
453 {
454 switch (ssusb->dr_mode) {
455 case USB_DR_MODE_PERIPHERAL:
456 ssusb_gadget_resume(ssusb, msg);
457 break;
458 case USB_DR_MODE_HOST:
459 ssusb_host_resume(ssusb, false);
460 break;
461 case USB_DR_MODE_OTG:
462 ssusb_host_resume(ssusb, !ssusb->is_host);
463 if (!ssusb->is_host)
464 ssusb_gadget_resume(ssusb, msg);
465
466 break;
467 default:
468 return -EINVAL;
469 }
470
471 return 0;
472 }
473
mtu3_suspend_common(struct device * dev,pm_message_t msg)474 static int mtu3_suspend_common(struct device *dev, pm_message_t msg)
475 {
476 struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
477 int ret = 0;
478
479 dev_dbg(dev, "%s\n", __func__);
480
481 switch (ssusb->dr_mode) {
482 case USB_DR_MODE_PERIPHERAL:
483 ret = ssusb_gadget_suspend(ssusb, msg);
484 if (ret)
485 goto err;
486
487 break;
488 case USB_DR_MODE_HOST:
489 ssusb_host_suspend(ssusb);
490 break;
491 case USB_DR_MODE_OTG:
492 if (!ssusb->is_host) {
493 ret = ssusb_gadget_suspend(ssusb, msg);
494 if (ret)
495 goto err;
496 }
497 ssusb_host_suspend(ssusb);
498 break;
499 default:
500 return -EINVAL;
501 }
502
503 ret = wait_for_ip_sleep(ssusb);
504 if (ret)
505 goto sleep_err;
506
507 ssusb_phy_power_off(ssusb);
508 clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
509 ssusb_wakeup_set(ssusb, true);
510 return 0;
511
512 sleep_err:
513 resume_ip_and_ports(ssusb, msg);
514 err:
515 return ret;
516 }
517
mtu3_resume_common(struct device * dev,pm_message_t msg)518 static int mtu3_resume_common(struct device *dev, pm_message_t msg)
519 {
520 struct ssusb_mtk *ssusb = dev_get_drvdata(dev);
521 int ret;
522
523 dev_dbg(dev, "%s\n", __func__);
524
525 ssusb_wakeup_set(ssusb, false);
526 ret = clk_bulk_prepare_enable(BULK_CLKS_CNT, ssusb->clks);
527 if (ret)
528 goto clks_err;
529
530 ret = ssusb_phy_power_on(ssusb);
531 if (ret)
532 goto phy_err;
533
534 return resume_ip_and_ports(ssusb, msg);
535
536 phy_err:
537 clk_bulk_disable_unprepare(BULK_CLKS_CNT, ssusb->clks);
538 clks_err:
539 return ret;
540 }
541
mtu3_suspend(struct device * dev)542 static int __maybe_unused mtu3_suspend(struct device *dev)
543 {
544 return mtu3_suspend_common(dev, PMSG_SUSPEND);
545 }
546
mtu3_resume(struct device * dev)547 static int __maybe_unused mtu3_resume(struct device *dev)
548 {
549 return mtu3_resume_common(dev, PMSG_SUSPEND);
550 }
551
mtu3_runtime_suspend(struct device * dev)552 static int __maybe_unused mtu3_runtime_suspend(struct device *dev)
553 {
554 if (!device_may_wakeup(dev))
555 return 0;
556
557 return mtu3_suspend_common(dev, PMSG_AUTO_SUSPEND);
558 }
559
mtu3_runtime_resume(struct device * dev)560 static int __maybe_unused mtu3_runtime_resume(struct device *dev)
561 {
562 if (!device_may_wakeup(dev))
563 return 0;
564
565 return mtu3_resume_common(dev, PMSG_AUTO_SUSPEND);
566 }
567
568 static const struct dev_pm_ops mtu3_pm_ops = {
569 SET_SYSTEM_SLEEP_PM_OPS(mtu3_suspend, mtu3_resume)
570 SET_RUNTIME_PM_OPS(mtu3_runtime_suspend,
571 mtu3_runtime_resume, NULL)
572 };
573
574 #define DEV_PM_OPS (IS_ENABLED(CONFIG_PM) ? &mtu3_pm_ops : NULL)
575
576 static const struct of_device_id mtu3_of_match[] = {
577 {.compatible = "mediatek,mt8173-mtu3",},
578 {.compatible = "mediatek,mtu3",},
579 {},
580 };
581 MODULE_DEVICE_TABLE(of, mtu3_of_match);
582
583 static struct platform_driver mtu3_driver = {
584 .probe = mtu3_probe,
585 .remove = mtu3_remove,
586 .driver = {
587 .name = MTU3_DRIVER_NAME,
588 .pm = DEV_PM_OPS,
589 .of_match_table = mtu3_of_match,
590 },
591 };
592 module_platform_driver(mtu3_driver);
593
594 MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
595 MODULE_LICENSE("GPL v2");
596 MODULE_DESCRIPTION("MediaTek USB3 DRD Controller Driver");
597