Home
last modified time | relevance | path

Searched defs:field_name (Results 1 – 25 of 135) sorted by relevance

123456

/drivers/gpu/drm/amd/display/dc/gpio/dcn20/
Dhw_factory_dcn20.c62 #define SF_HPD(reg_name, field_name, post_fix)\ argument
69 #define SF(reg_name, field_name, post_fix)\ argument
102 #define SF_DDC(reg_name, field_name, post_fix)\ argument
156 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/drivers/gpu/drm/amd/display/dc/gpio/dcn21/
Dhw_factory_dcn21.c60 #define SF_HPD(reg_name, field_name, post_fix)\ argument
67 #define SF(reg_name, field_name, post_fix)\ argument
99 #define SF_DDC(reg_name, field_name, post_fix)\ argument
139 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/drivers/gpu/drm/amd/display/dc/gpio/dcn30/
Dhw_factory_dcn30.c70 #define SF_HPD(reg_name, field_name, post_fix)\ argument
77 #define SF(reg_name, field_name, post_fix)\ argument
110 #define SF_DDC(reg_name, field_name, post_fix)\ argument
164 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/drivers/clk/bcm/
Dclk-kona-setup.c179 static bool bit_posn_valid(u32 bit_posn, const char *field_name, in bit_posn_valid()
199 static bool bitfield_valid(u32 shift, u32 width, const char *field_name, in bitfield_valid()
253 static bool gate_valid(struct bcm_clk_gate *gate, const char *field_name, in gate_valid()
291 static bool sel_valid(struct bcm_clk_sel *sel, const char *field_name, in sel_valid()
335 static bool div_valid(struct bcm_clk_div *div, const char *field_name, in div_valid()
392 static bool trig_valid(struct bcm_clk_trig *trig, const char *field_name, in trig_valid()
/drivers/gpu/drm/amd/display/dc/gpio/dce120/
Dhw_factory_dce120.c46 #define SF_HPD(reg_name, field_name, post_fix)\ argument
50 #define SF_HPD(reg_name, field_name, post_fix)\ argument
96 #define SF_DDC(reg_name, field_name, post_fix)\ argument
/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
Dhw_factory_dcn10.c47 #define SF_HPD(reg_name, field_name, post_fix)\ argument
92 #define SF_DDC(reg_name, field_name, post_fix)\ argument
128 #define SF_GENERIC(reg_name, field_name, post_fix)\ argument
/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_hubbub.c37 #define FN(reg_name, field_name) \ argument
47 #define FN(reg_name, field_name) \ argument
Ddcn301_hwseq.c39 #define FN(reg_name, field_name) \ argument
Ddcn301_dccg.c37 #define FN(reg_name, field_name) \ argument
Ddcn301_panel_cntl.h42 #define DCN301_PANEL_CNTL_SF(reg_name, field_name, post_fix)\ argument
Ddcn301_dio_link_encoder.c45 #define FN(reg_name, field_name) \ argument
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dccg.h51 #define DCCG_SF(reg_name, field_name, post_fix)\ argument
54 #define DCCG_SFI(reg_name, field_name, field_prefix, inst, post_fix)\ argument
57 #define DCCG_SFII(block, reg_name, field_prefix, field_name, inst, post_fix)\ argument
Ddcn20_hubbub.c38 #define FN(reg_name, field_name) \ argument
48 #define FN(reg_name, field_name) \ argument
Ddcn20_vmid.c38 #define FN(reg_name, field_name) \ argument
/drivers/gpu/drm/amd/display/dc/gpio/dce110/
Dhw_factory_dce110.c42 #define SF_HPD(reg_name, field_name, post_fix)\ argument
79 #define SF_DDC(reg_name, field_name, post_fix)\ argument
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_dpp.h37 #define TF_SF(reg_name, field_name, post_fix)\ argument
41 #define TF2_SF(reg_name, field_name, post_fix)\ argument
Ddcn10_ipp.c36 #define FN(reg_name, field_name) \ argument
/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubbub.c39 #define FN(reg_name, field_name) \ argument
49 #define FN(reg_name, field_name) \ argument
/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_dccg.h31 #define DCCG_SFII(block, reg_name, field_prefix, field_name, inst, post_fix)\ argument
Ddcn31_hubp.c39 #define FN(reg_name, field_name) \ argument
/drivers/gpu/drm/amd/display/dc/bios/
Dbios_parser_helper.c54 #define FN(reg_name, field_name) \ argument
/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_hw_sequencer.c46 #define FN(reg_name, field_name) \ argument
/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_hwseq.c23 #define FN(reg_name, field_name) \ argument
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_vpg.c38 #define FN(reg_name, field_name) \ argument
Ddcn30_dccg.c37 #define FN(reg_name, field_name) \ argument

123456