1 /*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #include <drm/drm_dp_helper.h>
29
30 #include "display/intel_display.h"
31 #include "display/intel_display_types.h"
32 #include "display/intel_gmbus.h"
33
34 #include "i915_drv.h"
35
36 #define _INTEL_BIOS_PRIVATE
37 #include "intel_vbt_defs.h"
38
39 /**
40 * DOC: Video BIOS Table (VBT)
41 *
42 * The Video BIOS Table, or VBT, provides platform and board specific
43 * configuration information to the driver that is not discoverable or available
44 * through other means. The configuration is mostly related to display
45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
46 * the PCI ROM.
47 *
48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
50 * contain the actual configuration information. The VBT Header, and thus the
51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
52 * BDB Header. The data blocks are concatenated after the BDB Header. The data
53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
54 * data. (Block 53, the MIPI Sequence Block is an exception.)
55 *
56 * The driver parses the VBT during load. The relevant information is stored in
57 * driver private data for ease of use, and the actual VBT is not read after
58 * that.
59 */
60
61 /* Wrapper for VBT child device config */
62 struct intel_bios_encoder_data {
63 struct drm_i915_private *i915;
64
65 struct child_device_config child;
66 struct dsc_compression_parameters_entry *dsc;
67 struct list_head node;
68 };
69
70 #define SLAVE_ADDR1 0x70
71 #define SLAVE_ADDR2 0x72
72
73 /* Get BDB block size given a pointer to Block ID. */
_get_blocksize(const u8 * block_base)74 static u32 _get_blocksize(const u8 *block_base)
75 {
76 /* The MIPI Sequence Block v3+ has a separate size field. */
77 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
78 return *((const u32 *)(block_base + 4));
79 else
80 return *((const u16 *)(block_base + 1));
81 }
82
83 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
get_blocksize(const void * block_data)84 static u32 get_blocksize(const void *block_data)
85 {
86 return _get_blocksize(block_data - 3);
87 }
88
89 static const void *
find_section(const void * _bdb,enum bdb_block_id section_id)90 find_section(const void *_bdb, enum bdb_block_id section_id)
91 {
92 const struct bdb_header *bdb = _bdb;
93 const u8 *base = _bdb;
94 int index = 0;
95 u32 total, current_size;
96 enum bdb_block_id current_id;
97
98 /* skip to first section */
99 index += bdb->header_size;
100 total = bdb->bdb_size;
101
102 /* walk the sections looking for section_id */
103 while (index + 3 < total) {
104 current_id = *(base + index);
105 current_size = _get_blocksize(base + index);
106 index += 3;
107
108 if (index + current_size > total)
109 return NULL;
110
111 if (current_id == section_id)
112 return base + index;
113
114 index += current_size;
115 }
116
117 return NULL;
118 }
119
120 static void
fill_detail_timing_data(struct drm_display_mode * panel_fixed_mode,const struct lvds_dvo_timing * dvo_timing)121 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
122 const struct lvds_dvo_timing *dvo_timing)
123 {
124 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
125 dvo_timing->hactive_lo;
126 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
127 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
128 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
129 ((dvo_timing->hsync_pulse_width_hi << 8) |
130 dvo_timing->hsync_pulse_width_lo);
131 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
132 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
133
134 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
135 dvo_timing->vactive_lo;
136 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
137 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
138 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
139 ((dvo_timing->vsync_pulse_width_hi << 4) |
140 dvo_timing->vsync_pulse_width_lo);
141 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
142 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
143 panel_fixed_mode->clock = dvo_timing->clock * 10;
144 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
145
146 if (dvo_timing->hsync_positive)
147 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
148 else
149 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
150
151 if (dvo_timing->vsync_positive)
152 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
153 else
154 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
155
156 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
157 dvo_timing->himage_lo;
158 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
159 dvo_timing->vimage_lo;
160
161 /* Some VBTs have bogus h/vtotal values */
162 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
163 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
164 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
165 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
166
167 drm_mode_set_name(panel_fixed_mode);
168 }
169
170 static const struct lvds_dvo_timing *
get_lvds_dvo_timing(const struct bdb_lvds_lfp_data * lvds_lfp_data,const struct bdb_lvds_lfp_data_ptrs * lvds_lfp_data_ptrs,int index)171 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
172 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
173 int index)
174 {
175 /*
176 * the size of fp_timing varies on the different platform.
177 * So calculate the DVO timing relative offset in LVDS data
178 * entry to get the DVO timing entry
179 */
180
181 int lfp_data_size =
182 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
183 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
184 int dvo_timing_offset =
185 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
186 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
187 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
188
189 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
190 }
191
192 /* get lvds_fp_timing entry
193 * this function may return NULL if the corresponding entry is invalid
194 */
195 static const struct lvds_fp_timing *
get_lvds_fp_timing(const struct bdb_header * bdb,const struct bdb_lvds_lfp_data * data,const struct bdb_lvds_lfp_data_ptrs * ptrs,int index)196 get_lvds_fp_timing(const struct bdb_header *bdb,
197 const struct bdb_lvds_lfp_data *data,
198 const struct bdb_lvds_lfp_data_ptrs *ptrs,
199 int index)
200 {
201 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
202 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
203 size_t ofs;
204
205 if (index >= ARRAY_SIZE(ptrs->ptr))
206 return NULL;
207 ofs = ptrs->ptr[index].fp_timing_offset;
208 if (ofs < data_ofs ||
209 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
210 return NULL;
211 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
212 }
213
214 /* Parse general panel options */
215 static void
parse_panel_options(struct drm_i915_private * i915,const struct bdb_header * bdb)216 parse_panel_options(struct drm_i915_private *i915,
217 const struct bdb_header *bdb)
218 {
219 const struct bdb_lvds_options *lvds_options;
220 int panel_type;
221 int drrs_mode;
222 int ret;
223
224 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
225 if (!lvds_options)
226 return;
227
228 i915->vbt.lvds_dither = lvds_options->pixel_dither;
229
230 ret = intel_opregion_get_panel_type(i915);
231 if (ret >= 0) {
232 drm_WARN_ON(&i915->drm, ret > 0xf);
233 panel_type = ret;
234 drm_dbg_kms(&i915->drm, "Panel type: %d (OpRegion)\n",
235 panel_type);
236 } else {
237 if (lvds_options->panel_type > 0xf) {
238 drm_dbg_kms(&i915->drm,
239 "Invalid VBT panel type 0x%x\n",
240 lvds_options->panel_type);
241 return;
242 }
243 panel_type = lvds_options->panel_type;
244 drm_dbg_kms(&i915->drm, "Panel type: %d (VBT)\n",
245 panel_type);
246 }
247
248 i915->vbt.panel_type = panel_type;
249
250 drrs_mode = (lvds_options->dps_panel_type_bits
251 >> (panel_type * 2)) & MODE_MASK;
252 /*
253 * VBT has static DRRS = 0 and seamless DRRS = 2.
254 * The below piece of code is required to adjust vbt.drrs_type
255 * to match the enum drrs_support_type.
256 */
257 switch (drrs_mode) {
258 case 0:
259 i915->vbt.drrs_type = STATIC_DRRS_SUPPORT;
260 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
261 break;
262 case 2:
263 i915->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
264 drm_dbg_kms(&i915->drm,
265 "DRRS supported mode is seamless\n");
266 break;
267 default:
268 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
269 drm_dbg_kms(&i915->drm,
270 "DRRS not supported (VBT input)\n");
271 break;
272 }
273 }
274
275 /* Try to find integrated panel timing data */
276 static void
parse_lfp_panel_dtd(struct drm_i915_private * i915,const struct bdb_header * bdb)277 parse_lfp_panel_dtd(struct drm_i915_private *i915,
278 const struct bdb_header *bdb)
279 {
280 const struct bdb_lvds_lfp_data *lvds_lfp_data;
281 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
282 const struct lvds_dvo_timing *panel_dvo_timing;
283 const struct lvds_fp_timing *fp_timing;
284 struct drm_display_mode *panel_fixed_mode;
285 int panel_type = i915->vbt.panel_type;
286
287 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
288 if (!lvds_lfp_data)
289 return;
290
291 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
292 if (!lvds_lfp_data_ptrs)
293 return;
294
295 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
296 lvds_lfp_data_ptrs,
297 panel_type);
298
299 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
300 if (!panel_fixed_mode)
301 return;
302
303 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
304
305 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
306
307 drm_dbg_kms(&i915->drm,
308 "Found panel mode in BIOS VBT legacy lfp table:\n");
309 drm_mode_debug_printmodeline(panel_fixed_mode);
310
311 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
312 lvds_lfp_data_ptrs,
313 panel_type);
314 if (fp_timing) {
315 /* check the resolution, just to be sure */
316 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
317 fp_timing->y_res == panel_fixed_mode->vdisplay) {
318 i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
319 drm_dbg_kms(&i915->drm,
320 "VBT initial LVDS value %x\n",
321 i915->vbt.bios_lvds_val);
322 }
323 }
324 }
325
326 static void
parse_generic_dtd(struct drm_i915_private * i915,const struct bdb_header * bdb)327 parse_generic_dtd(struct drm_i915_private *i915,
328 const struct bdb_header *bdb)
329 {
330 const struct bdb_generic_dtd *generic_dtd;
331 const struct generic_dtd_entry *dtd;
332 struct drm_display_mode *panel_fixed_mode;
333 int num_dtd;
334
335 generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
336 if (!generic_dtd)
337 return;
338
339 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
340 drm_err(&i915->drm, "GDTD size %u is too small.\n",
341 generic_dtd->gdtd_size);
342 return;
343 } else if (generic_dtd->gdtd_size !=
344 sizeof(struct generic_dtd_entry)) {
345 drm_err(&i915->drm, "Unexpected GDTD size %u\n",
346 generic_dtd->gdtd_size);
347 /* DTD has unknown fields, but keep going */
348 }
349
350 num_dtd = (get_blocksize(generic_dtd) -
351 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
352 if (i915->vbt.panel_type >= num_dtd) {
353 drm_err(&i915->drm,
354 "Panel type %d not found in table of %d DTD's\n",
355 i915->vbt.panel_type, num_dtd);
356 return;
357 }
358
359 dtd = &generic_dtd->dtd[i915->vbt.panel_type];
360
361 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
362 if (!panel_fixed_mode)
363 return;
364
365 panel_fixed_mode->hdisplay = dtd->hactive;
366 panel_fixed_mode->hsync_start =
367 panel_fixed_mode->hdisplay + dtd->hfront_porch;
368 panel_fixed_mode->hsync_end =
369 panel_fixed_mode->hsync_start + dtd->hsync;
370 panel_fixed_mode->htotal =
371 panel_fixed_mode->hdisplay + dtd->hblank;
372
373 panel_fixed_mode->vdisplay = dtd->vactive;
374 panel_fixed_mode->vsync_start =
375 panel_fixed_mode->vdisplay + dtd->vfront_porch;
376 panel_fixed_mode->vsync_end =
377 panel_fixed_mode->vsync_start + dtd->vsync;
378 panel_fixed_mode->vtotal =
379 panel_fixed_mode->vdisplay + dtd->vblank;
380
381 panel_fixed_mode->clock = dtd->pixel_clock;
382 panel_fixed_mode->width_mm = dtd->width_mm;
383 panel_fixed_mode->height_mm = dtd->height_mm;
384
385 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
386 drm_mode_set_name(panel_fixed_mode);
387
388 if (dtd->hsync_positive_polarity)
389 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
390 else
391 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
392
393 if (dtd->vsync_positive_polarity)
394 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
395 else
396 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
397
398 drm_dbg_kms(&i915->drm,
399 "Found panel mode in BIOS VBT generic dtd table:\n");
400 drm_mode_debug_printmodeline(panel_fixed_mode);
401
402 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
403 }
404
405 static void
parse_panel_dtd(struct drm_i915_private * i915,const struct bdb_header * bdb)406 parse_panel_dtd(struct drm_i915_private *i915,
407 const struct bdb_header *bdb)
408 {
409 /*
410 * Older VBTs provided provided DTD information for internal displays
411 * through the "LFP panel DTD" block (42). As of VBT revision 229,
412 * that block is now deprecated and DTD information should be provided
413 * via a newer "generic DTD" block (58). Just to be safe, we'll
414 * try the new generic DTD block first on VBT >= 229, but still fall
415 * back to trying the old LFP block if that fails.
416 */
417 if (bdb->version >= 229)
418 parse_generic_dtd(i915, bdb);
419 if (!i915->vbt.lfp_lvds_vbt_mode)
420 parse_lfp_panel_dtd(i915, bdb);
421 }
422
423 static void
parse_lfp_backlight(struct drm_i915_private * i915,const struct bdb_header * bdb)424 parse_lfp_backlight(struct drm_i915_private *i915,
425 const struct bdb_header *bdb)
426 {
427 const struct bdb_lfp_backlight_data *backlight_data;
428 const struct lfp_backlight_data_entry *entry;
429 int panel_type = i915->vbt.panel_type;
430 u16 level;
431
432 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
433 if (!backlight_data)
434 return;
435
436 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
437 drm_dbg_kms(&i915->drm,
438 "Unsupported backlight data entry size %u\n",
439 backlight_data->entry_size);
440 return;
441 }
442
443 entry = &backlight_data->data[panel_type];
444
445 i915->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
446 if (!i915->vbt.backlight.present) {
447 drm_dbg_kms(&i915->drm,
448 "PWM backlight not present in VBT (type %u)\n",
449 entry->type);
450 return;
451 }
452
453 i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
454 if (bdb->version >= 191) {
455 size_t exp_size;
456
457 if (bdb->version >= 236)
458 exp_size = sizeof(struct bdb_lfp_backlight_data);
459 else if (bdb->version >= 234)
460 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
461 else
462 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
463
464 if (get_blocksize(backlight_data) >= exp_size) {
465 const struct lfp_backlight_control_method *method;
466
467 method = &backlight_data->backlight_control[panel_type];
468 i915->vbt.backlight.type = method->type;
469 i915->vbt.backlight.controller = method->controller;
470 }
471 }
472
473 i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
474 i915->vbt.backlight.active_low_pwm = entry->active_low_pwm;
475
476 if (bdb->version >= 234) {
477 u16 min_level;
478 bool scale;
479
480 level = backlight_data->brightness_level[panel_type].level;
481 min_level = backlight_data->brightness_min_level[panel_type].level;
482
483 if (bdb->version >= 236)
484 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
485 else
486 scale = level > 255;
487
488 if (scale)
489 min_level = min_level / 255;
490
491 if (min_level > 255) {
492 drm_warn(&i915->drm, "Brightness min level > 255\n");
493 level = 255;
494 }
495 i915->vbt.backlight.min_brightness = min_level;
496 } else {
497 level = backlight_data->level[panel_type];
498 i915->vbt.backlight.min_brightness = entry->min_brightness;
499 }
500
501 drm_dbg_kms(&i915->drm,
502 "VBT backlight PWM modulation frequency %u Hz, "
503 "active %s, min brightness %u, level %u, controller %u\n",
504 i915->vbt.backlight.pwm_freq_hz,
505 i915->vbt.backlight.active_low_pwm ? "low" : "high",
506 i915->vbt.backlight.min_brightness,
507 level,
508 i915->vbt.backlight.controller);
509 }
510
511 /* Try to find sdvo panel data */
512 static void
parse_sdvo_panel_data(struct drm_i915_private * i915,const struct bdb_header * bdb)513 parse_sdvo_panel_data(struct drm_i915_private *i915,
514 const struct bdb_header *bdb)
515 {
516 const struct bdb_sdvo_panel_dtds *dtds;
517 struct drm_display_mode *panel_fixed_mode;
518 int index;
519
520 index = i915->params.vbt_sdvo_panel_type;
521 if (index == -2) {
522 drm_dbg_kms(&i915->drm,
523 "Ignore SDVO panel mode from BIOS VBT tables.\n");
524 return;
525 }
526
527 if (index == -1) {
528 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
529
530 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
531 if (!sdvo_lvds_options)
532 return;
533
534 index = sdvo_lvds_options->panel_type;
535 }
536
537 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
538 if (!dtds)
539 return;
540
541 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
542 if (!panel_fixed_mode)
543 return;
544
545 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
546
547 i915->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
548
549 drm_dbg_kms(&i915->drm,
550 "Found SDVO panel mode in BIOS VBT tables:\n");
551 drm_mode_debug_printmodeline(panel_fixed_mode);
552 }
553
intel_bios_ssc_frequency(struct drm_i915_private * i915,bool alternate)554 static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
555 bool alternate)
556 {
557 switch (DISPLAY_VER(i915)) {
558 case 2:
559 return alternate ? 66667 : 48000;
560 case 3:
561 case 4:
562 return alternate ? 100000 : 96000;
563 default:
564 return alternate ? 100000 : 120000;
565 }
566 }
567
568 static void
parse_general_features(struct drm_i915_private * i915,const struct bdb_header * bdb)569 parse_general_features(struct drm_i915_private *i915,
570 const struct bdb_header *bdb)
571 {
572 const struct bdb_general_features *general;
573
574 general = find_section(bdb, BDB_GENERAL_FEATURES);
575 if (!general)
576 return;
577
578 i915->vbt.int_tv_support = general->int_tv_support;
579 /* int_crt_support can't be trusted on earlier platforms */
580 if (bdb->version >= 155 &&
581 (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
582 i915->vbt.int_crt_support = general->int_crt_support;
583 i915->vbt.lvds_use_ssc = general->enable_ssc;
584 i915->vbt.lvds_ssc_freq =
585 intel_bios_ssc_frequency(i915, general->ssc_freq);
586 i915->vbt.display_clock_mode = general->display_clock_mode;
587 i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
588 if (bdb->version >= 181) {
589 i915->vbt.orientation = general->rotate_180 ?
590 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
591 DRM_MODE_PANEL_ORIENTATION_NORMAL;
592 } else {
593 i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
594 }
595 drm_dbg_kms(&i915->drm,
596 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
597 i915->vbt.int_tv_support,
598 i915->vbt.int_crt_support,
599 i915->vbt.lvds_use_ssc,
600 i915->vbt.lvds_ssc_freq,
601 i915->vbt.display_clock_mode,
602 i915->vbt.fdi_rx_polarity_inverted);
603 }
604
605 static const struct child_device_config *
child_device_ptr(const struct bdb_general_definitions * defs,int i)606 child_device_ptr(const struct bdb_general_definitions *defs, int i)
607 {
608 return (const void *) &defs->devices[i * defs->child_dev_size];
609 }
610
611 static void
parse_sdvo_device_mapping(struct drm_i915_private * i915)612 parse_sdvo_device_mapping(struct drm_i915_private *i915)
613 {
614 struct sdvo_device_mapping *mapping;
615 const struct intel_bios_encoder_data *devdata;
616 const struct child_device_config *child;
617 int count = 0;
618
619 /*
620 * Only parse SDVO mappings on gens that could have SDVO. This isn't
621 * accurate and doesn't have to be, as long as it's not too strict.
622 */
623 if (!IS_DISPLAY_VER(i915, 3, 7)) {
624 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
625 return;
626 }
627
628 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
629 child = &devdata->child;
630
631 if (child->slave_addr != SLAVE_ADDR1 &&
632 child->slave_addr != SLAVE_ADDR2) {
633 /*
634 * If the slave address is neither 0x70 nor 0x72,
635 * it is not a SDVO device. Skip it.
636 */
637 continue;
638 }
639 if (child->dvo_port != DEVICE_PORT_DVOB &&
640 child->dvo_port != DEVICE_PORT_DVOC) {
641 /* skip the incorrect SDVO port */
642 drm_dbg_kms(&i915->drm,
643 "Incorrect SDVO port. Skip it\n");
644 continue;
645 }
646 drm_dbg_kms(&i915->drm,
647 "the SDVO device with slave addr %2x is found on"
648 " %s port\n",
649 child->slave_addr,
650 (child->dvo_port == DEVICE_PORT_DVOB) ?
651 "SDVOB" : "SDVOC");
652 mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1];
653 if (!mapping->initialized) {
654 mapping->dvo_port = child->dvo_port;
655 mapping->slave_addr = child->slave_addr;
656 mapping->dvo_wiring = child->dvo_wiring;
657 mapping->ddc_pin = child->ddc_pin;
658 mapping->i2c_pin = child->i2c_pin;
659 mapping->initialized = 1;
660 drm_dbg_kms(&i915->drm,
661 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
662 mapping->dvo_port, mapping->slave_addr,
663 mapping->dvo_wiring, mapping->ddc_pin,
664 mapping->i2c_pin);
665 } else {
666 drm_dbg_kms(&i915->drm,
667 "Maybe one SDVO port is shared by "
668 "two SDVO device.\n");
669 }
670 if (child->slave2_addr) {
671 /* Maybe this is a SDVO device with multiple inputs */
672 /* And the mapping info is not added */
673 drm_dbg_kms(&i915->drm,
674 "there exists the slave2_addr. Maybe this"
675 " is a SDVO device with multiple inputs.\n");
676 }
677 count++;
678 }
679
680 if (!count) {
681 /* No SDVO device info is found */
682 drm_dbg_kms(&i915->drm,
683 "No SDVO device info is found in VBT\n");
684 }
685 }
686
687 static void
parse_driver_features(struct drm_i915_private * i915,const struct bdb_header * bdb)688 parse_driver_features(struct drm_i915_private *i915,
689 const struct bdb_header *bdb)
690 {
691 const struct bdb_driver_features *driver;
692
693 driver = find_section(bdb, BDB_DRIVER_FEATURES);
694 if (!driver)
695 return;
696
697 if (DISPLAY_VER(i915) >= 5) {
698 /*
699 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
700 * to mean "eDP". The VBT spec doesn't agree with that
701 * interpretation, but real world VBTs seem to.
702 */
703 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
704 i915->vbt.int_lvds_support = 0;
705 } else {
706 /*
707 * FIXME it's not clear which BDB version has the LVDS config
708 * bits defined. Revision history in the VBT spec says:
709 * "0.92 | Add two definitions for VBT value of LVDS Active
710 * Config (00b and 11b values defined) | 06/13/2005"
711 * but does not the specify the BDB version.
712 *
713 * So far version 134 (on i945gm) is the oldest VBT observed
714 * in the wild with the bits correctly populated. Version
715 * 108 (on i85x) does not have the bits correctly populated.
716 */
717 if (bdb->version >= 134 &&
718 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
719 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
720 i915->vbt.int_lvds_support = 0;
721 }
722
723 if (bdb->version < 228) {
724 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
725 driver->drrs_enabled);
726 /*
727 * If DRRS is not supported, drrs_type has to be set to 0.
728 * This is because, VBT is configured in such a way that
729 * static DRRS is 0 and DRRS not supported is represented by
730 * driver->drrs_enabled=false
731 */
732 if (!driver->drrs_enabled)
733 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
734
735 i915->vbt.psr.enable = driver->psr_enabled;
736 }
737 }
738
739 static void
parse_power_conservation_features(struct drm_i915_private * i915,const struct bdb_header * bdb)740 parse_power_conservation_features(struct drm_i915_private *i915,
741 const struct bdb_header *bdb)
742 {
743 const struct bdb_lfp_power *power;
744 u8 panel_type = i915->vbt.panel_type;
745
746 if (bdb->version < 228)
747 return;
748
749 power = find_section(bdb, BDB_LFP_POWER);
750 if (!power)
751 return;
752
753 i915->vbt.psr.enable = power->psr & BIT(panel_type);
754
755 /*
756 * If DRRS is not supported, drrs_type has to be set to 0.
757 * This is because, VBT is configured in such a way that
758 * static DRRS is 0 and DRRS not supported is represented by
759 * power->drrs & BIT(panel_type)=false
760 */
761 if (!(power->drrs & BIT(panel_type)))
762 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED;
763
764 if (bdb->version >= 232)
765 i915->vbt.edp.hobl = power->hobl & BIT(panel_type);
766 }
767
768 static void
parse_edp(struct drm_i915_private * i915,const struct bdb_header * bdb)769 parse_edp(struct drm_i915_private *i915, const struct bdb_header *bdb)
770 {
771 const struct bdb_edp *edp;
772 const struct edp_power_seq *edp_pps;
773 const struct edp_fast_link_params *edp_link_params;
774 int panel_type = i915->vbt.panel_type;
775
776 edp = find_section(bdb, BDB_EDP);
777 if (!edp)
778 return;
779
780 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
781 case EDP_18BPP:
782 i915->vbt.edp.bpp = 18;
783 break;
784 case EDP_24BPP:
785 i915->vbt.edp.bpp = 24;
786 break;
787 case EDP_30BPP:
788 i915->vbt.edp.bpp = 30;
789 break;
790 }
791
792 /* Get the eDP sequencing and link info */
793 edp_pps = &edp->power_seqs[panel_type];
794 edp_link_params = &edp->fast_link_params[panel_type];
795
796 i915->vbt.edp.pps = *edp_pps;
797
798 switch (edp_link_params->rate) {
799 case EDP_RATE_1_62:
800 i915->vbt.edp.rate = DP_LINK_BW_1_62;
801 break;
802 case EDP_RATE_2_7:
803 i915->vbt.edp.rate = DP_LINK_BW_2_7;
804 break;
805 default:
806 drm_dbg_kms(&i915->drm,
807 "VBT has unknown eDP link rate value %u\n",
808 edp_link_params->rate);
809 break;
810 }
811
812 switch (edp_link_params->lanes) {
813 case EDP_LANE_1:
814 i915->vbt.edp.lanes = 1;
815 break;
816 case EDP_LANE_2:
817 i915->vbt.edp.lanes = 2;
818 break;
819 case EDP_LANE_4:
820 i915->vbt.edp.lanes = 4;
821 break;
822 default:
823 drm_dbg_kms(&i915->drm,
824 "VBT has unknown eDP lane count value %u\n",
825 edp_link_params->lanes);
826 break;
827 }
828
829 switch (edp_link_params->preemphasis) {
830 case EDP_PREEMPHASIS_NONE:
831 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
832 break;
833 case EDP_PREEMPHASIS_3_5dB:
834 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
835 break;
836 case EDP_PREEMPHASIS_6dB:
837 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
838 break;
839 case EDP_PREEMPHASIS_9_5dB:
840 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
841 break;
842 default:
843 drm_dbg_kms(&i915->drm,
844 "VBT has unknown eDP pre-emphasis value %u\n",
845 edp_link_params->preemphasis);
846 break;
847 }
848
849 switch (edp_link_params->vswing) {
850 case EDP_VSWING_0_4V:
851 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
852 break;
853 case EDP_VSWING_0_6V:
854 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
855 break;
856 case EDP_VSWING_0_8V:
857 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
858 break;
859 case EDP_VSWING_1_2V:
860 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
861 break;
862 default:
863 drm_dbg_kms(&i915->drm,
864 "VBT has unknown eDP voltage swing value %u\n",
865 edp_link_params->vswing);
866 break;
867 }
868
869 if (bdb->version >= 173) {
870 u8 vswing;
871
872 /* Don't read from VBT if module parameter has valid value*/
873 if (i915->params.edp_vswing) {
874 i915->vbt.edp.low_vswing =
875 i915->params.edp_vswing == 1;
876 } else {
877 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
878 i915->vbt.edp.low_vswing = vswing == 0;
879 }
880 }
881 }
882
883 static void
parse_psr(struct drm_i915_private * i915,const struct bdb_header * bdb)884 parse_psr(struct drm_i915_private *i915, const struct bdb_header *bdb)
885 {
886 const struct bdb_psr *psr;
887 const struct psr_table *psr_table;
888 int panel_type = i915->vbt.panel_type;
889
890 psr = find_section(bdb, BDB_PSR);
891 if (!psr) {
892 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
893 return;
894 }
895
896 psr_table = &psr->psr_table[panel_type];
897
898 i915->vbt.psr.full_link = psr_table->full_link;
899 i915->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
900
901 /* Allowed VBT values goes from 0 to 15 */
902 i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
903 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
904
905 switch (psr_table->lines_to_wait) {
906 case 0:
907 i915->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
908 break;
909 case 1:
910 i915->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
911 break;
912 case 2:
913 i915->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
914 break;
915 case 3:
916 i915->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
917 break;
918 default:
919 drm_dbg_kms(&i915->drm,
920 "VBT has unknown PSR lines to wait %u\n",
921 psr_table->lines_to_wait);
922 break;
923 }
924
925 /*
926 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
927 * Old decimal value is wake up time in multiples of 100 us.
928 */
929 if (bdb->version >= 205 &&
930 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
931 switch (psr_table->tp1_wakeup_time) {
932 case 0:
933 i915->vbt.psr.tp1_wakeup_time_us = 500;
934 break;
935 case 1:
936 i915->vbt.psr.tp1_wakeup_time_us = 100;
937 break;
938 case 3:
939 i915->vbt.psr.tp1_wakeup_time_us = 0;
940 break;
941 default:
942 drm_dbg_kms(&i915->drm,
943 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
944 psr_table->tp1_wakeup_time);
945 fallthrough;
946 case 2:
947 i915->vbt.psr.tp1_wakeup_time_us = 2500;
948 break;
949 }
950
951 switch (psr_table->tp2_tp3_wakeup_time) {
952 case 0:
953 i915->vbt.psr.tp2_tp3_wakeup_time_us = 500;
954 break;
955 case 1:
956 i915->vbt.psr.tp2_tp3_wakeup_time_us = 100;
957 break;
958 case 3:
959 i915->vbt.psr.tp2_tp3_wakeup_time_us = 0;
960 break;
961 default:
962 drm_dbg_kms(&i915->drm,
963 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
964 psr_table->tp2_tp3_wakeup_time);
965 fallthrough;
966 case 2:
967 i915->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
968 break;
969 }
970 } else {
971 i915->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
972 i915->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
973 }
974
975 if (bdb->version >= 226) {
976 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
977
978 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
979 switch (wakeup_time) {
980 case 0:
981 wakeup_time = 500;
982 break;
983 case 1:
984 wakeup_time = 100;
985 break;
986 case 3:
987 wakeup_time = 50;
988 break;
989 default:
990 case 2:
991 wakeup_time = 2500;
992 break;
993 }
994 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
995 } else {
996 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
997 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = i915->vbt.psr.tp2_tp3_wakeup_time_us;
998 }
999 }
1000
parse_dsi_backlight_ports(struct drm_i915_private * i915,u16 version,enum port port)1001 static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1002 u16 version, enum port port)
1003 {
1004 if (!i915->vbt.dsi.config->dual_link || version < 197) {
1005 i915->vbt.dsi.bl_ports = BIT(port);
1006 if (i915->vbt.dsi.config->cabc_supported)
1007 i915->vbt.dsi.cabc_ports = BIT(port);
1008
1009 return;
1010 }
1011
1012 switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) {
1013 case DL_DCS_PORT_A:
1014 i915->vbt.dsi.bl_ports = BIT(PORT_A);
1015 break;
1016 case DL_DCS_PORT_C:
1017 i915->vbt.dsi.bl_ports = BIT(PORT_C);
1018 break;
1019 default:
1020 case DL_DCS_PORT_A_AND_C:
1021 i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
1022 break;
1023 }
1024
1025 if (!i915->vbt.dsi.config->cabc_supported)
1026 return;
1027
1028 switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) {
1029 case DL_DCS_PORT_A:
1030 i915->vbt.dsi.cabc_ports = BIT(PORT_A);
1031 break;
1032 case DL_DCS_PORT_C:
1033 i915->vbt.dsi.cabc_ports = BIT(PORT_C);
1034 break;
1035 default:
1036 case DL_DCS_PORT_A_AND_C:
1037 i915->vbt.dsi.cabc_ports =
1038 BIT(PORT_A) | BIT(PORT_C);
1039 break;
1040 }
1041 }
1042
1043 static void
parse_mipi_config(struct drm_i915_private * i915,const struct bdb_header * bdb)1044 parse_mipi_config(struct drm_i915_private *i915,
1045 const struct bdb_header *bdb)
1046 {
1047 const struct bdb_mipi_config *start;
1048 const struct mipi_config *config;
1049 const struct mipi_pps_data *pps;
1050 int panel_type = i915->vbt.panel_type;
1051 enum port port;
1052
1053 /* parse MIPI blocks only if LFP type is MIPI */
1054 if (!intel_bios_is_dsi_present(i915, &port))
1055 return;
1056
1057 /* Initialize this to undefined indicating no generic MIPI support */
1058 i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1059
1060 /* Block #40 is already parsed and panel_fixed_mode is
1061 * stored in i915->lfp_lvds_vbt_mode
1062 * resuse this when needed
1063 */
1064
1065 /* Parse #52 for panel index used from panel_type already
1066 * parsed
1067 */
1068 start = find_section(bdb, BDB_MIPI_CONFIG);
1069 if (!start) {
1070 drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1071 return;
1072 }
1073
1074 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1075 panel_type);
1076
1077 /*
1078 * get hold of the correct configuration block and pps data as per
1079 * the panel_type as index
1080 */
1081 config = &start->config[panel_type];
1082 pps = &start->pps[panel_type];
1083
1084 /* store as of now full data. Trim when we realise all is not needed */
1085 i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1086 if (!i915->vbt.dsi.config)
1087 return;
1088
1089 i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1090 if (!i915->vbt.dsi.pps) {
1091 kfree(i915->vbt.dsi.config);
1092 return;
1093 }
1094
1095 parse_dsi_backlight_ports(i915, bdb->version, port);
1096
1097 /* FIXME is the 90 vs. 270 correct? */
1098 switch (config->rotation) {
1099 case ENABLE_ROTATION_0:
1100 /*
1101 * Most (all?) VBTs claim 0 degrees despite having
1102 * an upside down panel, thus we do not trust this.
1103 */
1104 i915->vbt.dsi.orientation =
1105 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1106 break;
1107 case ENABLE_ROTATION_90:
1108 i915->vbt.dsi.orientation =
1109 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1110 break;
1111 case ENABLE_ROTATION_180:
1112 i915->vbt.dsi.orientation =
1113 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1114 break;
1115 case ENABLE_ROTATION_270:
1116 i915->vbt.dsi.orientation =
1117 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1118 break;
1119 }
1120
1121 /* We have mandatory mipi config blocks. Initialize as generic panel */
1122 i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1123 }
1124
1125 /* Find the sequence block and size for the given panel. */
1126 static const u8 *
find_panel_sequence_block(const struct bdb_mipi_sequence * sequence,u16 panel_id,u32 * seq_size)1127 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1128 u16 panel_id, u32 *seq_size)
1129 {
1130 u32 total = get_blocksize(sequence);
1131 const u8 *data = &sequence->data[0];
1132 u8 current_id;
1133 u32 current_size;
1134 int header_size = sequence->version >= 3 ? 5 : 3;
1135 int index = 0;
1136 int i;
1137
1138 /* skip new block size */
1139 if (sequence->version >= 3)
1140 data += 4;
1141
1142 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1143 if (index + header_size > total) {
1144 DRM_ERROR("Invalid sequence block (header)\n");
1145 return NULL;
1146 }
1147
1148 current_id = *(data + index);
1149 if (sequence->version >= 3)
1150 current_size = *((const u32 *)(data + index + 1));
1151 else
1152 current_size = *((const u16 *)(data + index + 1));
1153
1154 index += header_size;
1155
1156 if (index + current_size > total) {
1157 DRM_ERROR("Invalid sequence block\n");
1158 return NULL;
1159 }
1160
1161 if (current_id == panel_id) {
1162 *seq_size = current_size;
1163 return data + index;
1164 }
1165
1166 index += current_size;
1167 }
1168
1169 DRM_ERROR("Sequence block detected but no valid configuration\n");
1170
1171 return NULL;
1172 }
1173
goto_next_sequence(const u8 * data,int index,int total)1174 static int goto_next_sequence(const u8 *data, int index, int total)
1175 {
1176 u16 len;
1177
1178 /* Skip Sequence Byte. */
1179 for (index = index + 1; index < total; index += len) {
1180 u8 operation_byte = *(data + index);
1181 index++;
1182
1183 switch (operation_byte) {
1184 case MIPI_SEQ_ELEM_END:
1185 return index;
1186 case MIPI_SEQ_ELEM_SEND_PKT:
1187 if (index + 4 > total)
1188 return 0;
1189
1190 len = *((const u16 *)(data + index + 2)) + 4;
1191 break;
1192 case MIPI_SEQ_ELEM_DELAY:
1193 len = 4;
1194 break;
1195 case MIPI_SEQ_ELEM_GPIO:
1196 len = 2;
1197 break;
1198 case MIPI_SEQ_ELEM_I2C:
1199 if (index + 7 > total)
1200 return 0;
1201 len = *(data + index + 6) + 7;
1202 break;
1203 default:
1204 DRM_ERROR("Unknown operation byte\n");
1205 return 0;
1206 }
1207 }
1208
1209 return 0;
1210 }
1211
goto_next_sequence_v3(const u8 * data,int index,int total)1212 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1213 {
1214 int seq_end;
1215 u16 len;
1216 u32 size_of_sequence;
1217
1218 /*
1219 * Could skip sequence based on Size of Sequence alone, but also do some
1220 * checking on the structure.
1221 */
1222 if (total < 5) {
1223 DRM_ERROR("Too small sequence size\n");
1224 return 0;
1225 }
1226
1227 /* Skip Sequence Byte. */
1228 index++;
1229
1230 /*
1231 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1232 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1233 * byte.
1234 */
1235 size_of_sequence = *((const u32 *)(data + index));
1236 index += 4;
1237
1238 seq_end = index + size_of_sequence;
1239 if (seq_end > total) {
1240 DRM_ERROR("Invalid sequence size\n");
1241 return 0;
1242 }
1243
1244 for (; index < total; index += len) {
1245 u8 operation_byte = *(data + index);
1246 index++;
1247
1248 if (operation_byte == MIPI_SEQ_ELEM_END) {
1249 if (index != seq_end) {
1250 DRM_ERROR("Invalid element structure\n");
1251 return 0;
1252 }
1253 return index;
1254 }
1255
1256 len = *(data + index);
1257 index++;
1258
1259 /*
1260 * FIXME: Would be nice to check elements like for v1/v2 in
1261 * goto_next_sequence() above.
1262 */
1263 switch (operation_byte) {
1264 case MIPI_SEQ_ELEM_SEND_PKT:
1265 case MIPI_SEQ_ELEM_DELAY:
1266 case MIPI_SEQ_ELEM_GPIO:
1267 case MIPI_SEQ_ELEM_I2C:
1268 case MIPI_SEQ_ELEM_SPI:
1269 case MIPI_SEQ_ELEM_PMIC:
1270 break;
1271 default:
1272 DRM_ERROR("Unknown operation byte %u\n",
1273 operation_byte);
1274 break;
1275 }
1276 }
1277
1278 return 0;
1279 }
1280
1281 /*
1282 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1283 * skip all delay + gpio operands and stop at the first DSI packet op.
1284 */
get_init_otp_deassert_fragment_len(struct drm_i915_private * i915)1285 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915)
1286 {
1287 const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1288 int index, len;
1289
1290 if (drm_WARN_ON(&i915->drm,
1291 !data || i915->vbt.dsi.seq_version != 1))
1292 return 0;
1293
1294 /* index = 1 to skip sequence byte */
1295 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1296 switch (data[index]) {
1297 case MIPI_SEQ_ELEM_SEND_PKT:
1298 return index == 1 ? 0 : index;
1299 case MIPI_SEQ_ELEM_DELAY:
1300 len = 5; /* 1 byte for operand + uint32 */
1301 break;
1302 case MIPI_SEQ_ELEM_GPIO:
1303 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1304 break;
1305 default:
1306 return 0;
1307 }
1308 }
1309
1310 return 0;
1311 }
1312
1313 /*
1314 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1315 * The deassert must be done before calling intel_dsi_device_ready, so for
1316 * these devices we split the init OTP sequence into a deassert sequence and
1317 * the actual init OTP part.
1318 */
fixup_mipi_sequences(struct drm_i915_private * i915)1319 static void fixup_mipi_sequences(struct drm_i915_private *i915)
1320 {
1321 u8 *init_otp;
1322 int len;
1323
1324 /* Limit this to VLV for now. */
1325 if (!IS_VALLEYVIEW(i915))
1326 return;
1327
1328 /* Limit this to v1 vid-mode sequences */
1329 if (i915->vbt.dsi.config->is_cmd_mode ||
1330 i915->vbt.dsi.seq_version != 1)
1331 return;
1332
1333 /* Only do this if there are otp and assert seqs and no deassert seq */
1334 if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1335 !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1336 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1337 return;
1338
1339 /* The deassert-sequence ends at the first DSI packet */
1340 len = get_init_otp_deassert_fragment_len(i915);
1341 if (!len)
1342 return;
1343
1344 drm_dbg_kms(&i915->drm,
1345 "Using init OTP fragment to deassert reset\n");
1346
1347 /* Copy the fragment, update seq byte and terminate it */
1348 init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1349 i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1350 if (!i915->vbt.dsi.deassert_seq)
1351 return;
1352 i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1353 i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1354 /* Use the copy for deassert */
1355 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1356 i915->vbt.dsi.deassert_seq;
1357 /* Replace the last byte of the fragment with init OTP seq byte */
1358 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1359 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1360 i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1361 }
1362
1363 static void
parse_mipi_sequence(struct drm_i915_private * i915,const struct bdb_header * bdb)1364 parse_mipi_sequence(struct drm_i915_private *i915,
1365 const struct bdb_header *bdb)
1366 {
1367 int panel_type = i915->vbt.panel_type;
1368 const struct bdb_mipi_sequence *sequence;
1369 const u8 *seq_data;
1370 u32 seq_size;
1371 u8 *data;
1372 int index = 0;
1373
1374 /* Only our generic panel driver uses the sequence block. */
1375 if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1376 return;
1377
1378 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1379 if (!sequence) {
1380 drm_dbg_kms(&i915->drm,
1381 "No MIPI Sequence found, parsing complete\n");
1382 return;
1383 }
1384
1385 /* Fail gracefully for forward incompatible sequence block. */
1386 if (sequence->version >= 4) {
1387 drm_err(&i915->drm,
1388 "Unable to parse MIPI Sequence Block v%u\n",
1389 sequence->version);
1390 return;
1391 }
1392
1393 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
1394 sequence->version);
1395
1396 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1397 if (!seq_data)
1398 return;
1399
1400 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1401 if (!data)
1402 return;
1403
1404 /* Parse the sequences, store pointers to each sequence. */
1405 for (;;) {
1406 u8 seq_id = *(data + index);
1407 if (seq_id == MIPI_SEQ_END)
1408 break;
1409
1410 if (seq_id >= MIPI_SEQ_MAX) {
1411 drm_err(&i915->drm, "Unknown sequence %u\n",
1412 seq_id);
1413 goto err;
1414 }
1415
1416 /* Log about presence of sequences we won't run. */
1417 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1418 drm_dbg_kms(&i915->drm,
1419 "Unsupported sequence %u\n", seq_id);
1420
1421 i915->vbt.dsi.sequence[seq_id] = data + index;
1422
1423 if (sequence->version >= 3)
1424 index = goto_next_sequence_v3(data, index, seq_size);
1425 else
1426 index = goto_next_sequence(data, index, seq_size);
1427 if (!index) {
1428 drm_err(&i915->drm, "Invalid sequence %u\n",
1429 seq_id);
1430 goto err;
1431 }
1432 }
1433
1434 i915->vbt.dsi.data = data;
1435 i915->vbt.dsi.size = seq_size;
1436 i915->vbt.dsi.seq_version = sequence->version;
1437
1438 fixup_mipi_sequences(i915);
1439
1440 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
1441 return;
1442
1443 err:
1444 kfree(data);
1445 memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence));
1446 }
1447
1448 static void
parse_compression_parameters(struct drm_i915_private * i915,const struct bdb_header * bdb)1449 parse_compression_parameters(struct drm_i915_private *i915,
1450 const struct bdb_header *bdb)
1451 {
1452 const struct bdb_compression_parameters *params;
1453 struct intel_bios_encoder_data *devdata;
1454 const struct child_device_config *child;
1455 u16 block_size;
1456 int index;
1457
1458 if (bdb->version < 198)
1459 return;
1460
1461 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1462 if (params) {
1463 /* Sanity checks */
1464 if (params->entry_size != sizeof(params->data[0])) {
1465 drm_dbg_kms(&i915->drm,
1466 "VBT: unsupported compression param entry size\n");
1467 return;
1468 }
1469
1470 block_size = get_blocksize(params);
1471 if (block_size < sizeof(*params)) {
1472 drm_dbg_kms(&i915->drm,
1473 "VBT: expected 16 compression param entries\n");
1474 return;
1475 }
1476 }
1477
1478 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1479 child = &devdata->child;
1480
1481 if (!child->compression_enable)
1482 continue;
1483
1484 if (!params) {
1485 drm_dbg_kms(&i915->drm,
1486 "VBT: compression params not available\n");
1487 continue;
1488 }
1489
1490 if (child->compression_method_cps) {
1491 drm_dbg_kms(&i915->drm,
1492 "VBT: CPS compression not supported\n");
1493 continue;
1494 }
1495
1496 index = child->compression_structure_index;
1497
1498 devdata->dsc = kmemdup(¶ms->data[index],
1499 sizeof(*devdata->dsc), GFP_KERNEL);
1500 }
1501 }
1502
translate_iboost(u8 val)1503 static u8 translate_iboost(u8 val)
1504 {
1505 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1506
1507 if (val >= ARRAY_SIZE(mapping)) {
1508 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1509 return 0;
1510 }
1511 return mapping[val];
1512 }
1513
get_port_by_ddc_pin(struct drm_i915_private * i915,u8 ddc_pin)1514 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1515 {
1516 const struct ddi_vbt_port_info *info;
1517 enum port port;
1518
1519 if (!ddc_pin)
1520 return PORT_NONE;
1521
1522 for_each_port(port) {
1523 info = &i915->vbt.ddi_port_info[port];
1524
1525 if (info->devdata && ddc_pin == info->alternate_ddc_pin)
1526 return port;
1527 }
1528
1529 return PORT_NONE;
1530 }
1531
sanitize_ddc_pin(struct drm_i915_private * i915,enum port port)1532 static void sanitize_ddc_pin(struct drm_i915_private *i915,
1533 enum port port)
1534 {
1535 struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
1536 struct child_device_config *child;
1537 enum port p;
1538
1539 p = get_port_by_ddc_pin(i915, info->alternate_ddc_pin);
1540 if (p == PORT_NONE)
1541 return;
1542
1543 drm_dbg_kms(&i915->drm,
1544 "port %c trying to use the same DDC pin (0x%x) as port %c, "
1545 "disabling port %c DVI/HDMI support\n",
1546 port_name(port), info->alternate_ddc_pin,
1547 port_name(p), port_name(p));
1548
1549 /*
1550 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
1551 * couldn't exist on the shared port. Otherwise they share the same ddc
1552 * pin and system couldn't communicate with them separately.
1553 *
1554 * Give inverse child device order the priority, last one wins. Yes,
1555 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
1556 * port A and port E with the same AUX ch and we must pick port E :(
1557 */
1558 info = &i915->vbt.ddi_port_info[p];
1559 child = &info->devdata->child;
1560
1561 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
1562 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
1563
1564 info->alternate_ddc_pin = 0;
1565 }
1566
get_port_by_aux_ch(struct drm_i915_private * i915,u8 aux_ch)1567 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1568 {
1569 const struct ddi_vbt_port_info *info;
1570 enum port port;
1571
1572 if (!aux_ch)
1573 return PORT_NONE;
1574
1575 for_each_port(port) {
1576 info = &i915->vbt.ddi_port_info[port];
1577
1578 if (info->devdata && aux_ch == info->alternate_aux_channel)
1579 return port;
1580 }
1581
1582 return PORT_NONE;
1583 }
1584
sanitize_aux_ch(struct drm_i915_private * i915,enum port port)1585 static void sanitize_aux_ch(struct drm_i915_private *i915,
1586 enum port port)
1587 {
1588 struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[port];
1589 struct child_device_config *child;
1590 enum port p;
1591
1592 p = get_port_by_aux_ch(i915, info->alternate_aux_channel);
1593 if (p == PORT_NONE)
1594 return;
1595
1596 drm_dbg_kms(&i915->drm,
1597 "port %c trying to use the same AUX CH (0x%x) as port %c, "
1598 "disabling port %c DP support\n",
1599 port_name(port), info->alternate_aux_channel,
1600 port_name(p), port_name(p));
1601
1602 /*
1603 * If we have multiple ports supposedly sharing the aux channel, then DP
1604 * couldn't exist on the shared port. Otherwise they share the same aux
1605 * channel and system couldn't communicate with them separately.
1606 *
1607 * Give inverse child device order the priority, last one wins. Yes,
1608 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
1609 * port A and port E with the same AUX ch and we must pick port E :(
1610 */
1611 info = &i915->vbt.ddi_port_info[p];
1612 child = &info->devdata->child;
1613
1614 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1615 info->alternate_aux_channel = 0;
1616 }
1617
1618 static const u8 cnp_ddc_pin_map[] = {
1619 [0] = 0, /* N/A */
1620 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1621 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1622 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1623 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1624 };
1625
1626 static const u8 icp_ddc_pin_map[] = {
1627 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1628 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1629 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1630 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1631 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1632 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1633 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1634 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1635 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1636 };
1637
1638 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
1639 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1640 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1641 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
1642 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
1643 };
1644
1645 static const u8 adls_ddc_pin_map[] = {
1646 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1647 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
1648 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
1649 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
1650 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
1651 };
1652
1653 static const u8 gen9bc_tgp_ddc_pin_map[] = {
1654 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1655 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
1656 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
1657 };
1658
map_ddc_pin(struct drm_i915_private * i915,u8 vbt_pin)1659 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
1660 {
1661 const u8 *ddc_pin_map;
1662 int n_entries;
1663
1664 if (IS_ALDERLAKE_S(i915)) {
1665 ddc_pin_map = adls_ddc_pin_map;
1666 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
1667 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
1668 return vbt_pin;
1669 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
1670 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
1671 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
1672 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
1673 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
1674 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
1675 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
1676 ddc_pin_map = icp_ddc_pin_map;
1677 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1678 } else if (HAS_PCH_CNP(i915)) {
1679 ddc_pin_map = cnp_ddc_pin_map;
1680 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1681 } else {
1682 /* Assuming direct map */
1683 return vbt_pin;
1684 }
1685
1686 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1687 return ddc_pin_map[vbt_pin];
1688
1689 drm_dbg_kms(&i915->drm,
1690 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1691 vbt_pin);
1692 return 0;
1693 }
1694
dvo_port_type(u8 dvo_port)1695 static u8 dvo_port_type(u8 dvo_port)
1696 {
1697 switch (dvo_port) {
1698 case DVO_PORT_HDMIA:
1699 case DVO_PORT_HDMIB:
1700 case DVO_PORT_HDMIC:
1701 case DVO_PORT_HDMID:
1702 case DVO_PORT_HDMIE:
1703 case DVO_PORT_HDMIF:
1704 case DVO_PORT_HDMIG:
1705 case DVO_PORT_HDMIH:
1706 case DVO_PORT_HDMII:
1707 return DVO_PORT_HDMIA;
1708 case DVO_PORT_DPA:
1709 case DVO_PORT_DPB:
1710 case DVO_PORT_DPC:
1711 case DVO_PORT_DPD:
1712 case DVO_PORT_DPE:
1713 case DVO_PORT_DPF:
1714 case DVO_PORT_DPG:
1715 case DVO_PORT_DPH:
1716 case DVO_PORT_DPI:
1717 return DVO_PORT_DPA;
1718 case DVO_PORT_MIPIA:
1719 case DVO_PORT_MIPIB:
1720 case DVO_PORT_MIPIC:
1721 case DVO_PORT_MIPID:
1722 return DVO_PORT_MIPIA;
1723 default:
1724 return dvo_port;
1725 }
1726 }
1727
__dvo_port_to_port(int n_ports,int n_dvo,const int port_mapping[][3],u8 dvo_port)1728 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1729 const int port_mapping[][3], u8 dvo_port)
1730 {
1731 enum port port;
1732 int i;
1733
1734 for (port = PORT_A; port < n_ports; port++) {
1735 for (i = 0; i < n_dvo; i++) {
1736 if (port_mapping[port][i] == -1)
1737 break;
1738
1739 if (dvo_port == port_mapping[port][i])
1740 return port;
1741 }
1742 }
1743
1744 return PORT_NONE;
1745 }
1746
dvo_port_to_port(struct drm_i915_private * i915,u8 dvo_port)1747 static enum port dvo_port_to_port(struct drm_i915_private *i915,
1748 u8 dvo_port)
1749 {
1750 /*
1751 * Each DDI port can have more than one value on the "DVO Port" field,
1752 * so look for all the possible values for each port.
1753 */
1754 static const int port_mapping[][3] = {
1755 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1756 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1757 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1758 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1759 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1760 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1761 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1762 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1763 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1764 };
1765 /*
1766 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
1767 * map to DDI A,B,TC1,TC2 respectively.
1768 */
1769 static const int rkl_port_mapping[][3] = {
1770 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1771 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1772 [PORT_C] = { -1 },
1773 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1774 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1775 };
1776 /*
1777 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
1778 * PORT_F and PORT_G, we need to map that to correct VBT sections.
1779 */
1780 static const int adls_port_mapping[][3] = {
1781 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1782 [PORT_B] = { -1 },
1783 [PORT_C] = { -1 },
1784 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1785 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1786 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1787 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
1788 };
1789 static const int xelpd_port_mapping[][3] = {
1790 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1791 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1792 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1793 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1794 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
1795 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1796 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1797 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1798 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1799 };
1800
1801 if (DISPLAY_VER(i915) == 13)
1802 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
1803 ARRAY_SIZE(xelpd_port_mapping[0]),
1804 xelpd_port_mapping,
1805 dvo_port);
1806 else if (IS_ALDERLAKE_S(i915))
1807 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
1808 ARRAY_SIZE(adls_port_mapping[0]),
1809 adls_port_mapping,
1810 dvo_port);
1811 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
1812 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1813 ARRAY_SIZE(rkl_port_mapping[0]),
1814 rkl_port_mapping,
1815 dvo_port);
1816 else
1817 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1818 ARRAY_SIZE(port_mapping[0]),
1819 port_mapping,
1820 dvo_port);
1821 }
1822
1823 static enum port
dsi_dvo_port_to_port(struct drm_i915_private * i915,u8 dvo_port)1824 dsi_dvo_port_to_port(struct drm_i915_private *i915, u8 dvo_port)
1825 {
1826 switch (dvo_port) {
1827 case DVO_PORT_MIPIA:
1828 return PORT_A;
1829 case DVO_PORT_MIPIC:
1830 if (DISPLAY_VER(i915) >= 11)
1831 return PORT_B;
1832 else
1833 return PORT_C;
1834 default:
1835 return PORT_NONE;
1836 }
1837 }
1838
parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)1839 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
1840 {
1841 switch (vbt_max_link_rate) {
1842 default:
1843 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
1844 return 0;
1845 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
1846 return 2000000;
1847 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
1848 return 1350000;
1849 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
1850 return 1000000;
1851 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
1852 return 810000;
1853 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
1854 return 540000;
1855 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
1856 return 270000;
1857 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
1858 return 162000;
1859 }
1860 }
1861
parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)1862 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
1863 {
1864 switch (vbt_max_link_rate) {
1865 default:
1866 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
1867 return 810000;
1868 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
1869 return 540000;
1870 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
1871 return 270000;
1872 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
1873 return 162000;
1874 }
1875 }
1876
sanitize_device_type(struct intel_bios_encoder_data * devdata,enum port port)1877 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
1878 enum port port)
1879 {
1880 struct drm_i915_private *i915 = devdata->i915;
1881 bool is_hdmi;
1882
1883 if (port != PORT_A || DISPLAY_VER(i915) >= 12)
1884 return;
1885
1886 if (!(devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING))
1887 return;
1888
1889 is_hdmi = !(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT);
1890
1891 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
1892 is_hdmi ? "/HDMI" : "");
1893
1894 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
1895 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
1896 }
1897
1898 static bool
intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data * devdata)1899 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
1900 {
1901 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1902 }
1903
1904 bool
intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data * devdata)1905 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
1906 {
1907 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1908 }
1909
1910 bool
intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data * devdata)1911 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
1912 {
1913 return intel_bios_encoder_supports_dvi(devdata) &&
1914 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1915 }
1916
1917 bool
intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data * devdata)1918 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
1919 {
1920 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1921 }
1922
1923 static bool
intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data * devdata)1924 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
1925 {
1926 return intel_bios_encoder_supports_dp(devdata) &&
1927 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
1928 }
1929
is_port_valid(struct drm_i915_private * i915,enum port port)1930 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
1931 {
1932 /*
1933 * On some ICL SKUs port F is not present, but broken VBTs mark
1934 * the port as present. Only try to initialize port F for the
1935 * SKUs that may actually have it.
1936 */
1937 if (port == PORT_F && IS_ICELAKE(i915))
1938 return IS_ICL_WITH_PORT_F(i915);
1939
1940 return true;
1941 }
1942
parse_ddi_port(struct drm_i915_private * i915,struct intel_bios_encoder_data * devdata)1943 static void parse_ddi_port(struct drm_i915_private *i915,
1944 struct intel_bios_encoder_data *devdata)
1945 {
1946 const struct child_device_config *child = &devdata->child;
1947 struct ddi_vbt_port_info *info;
1948 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
1949 int dp_boost_level, hdmi_boost_level;
1950 enum port port;
1951
1952 port = dvo_port_to_port(i915, child->dvo_port);
1953 if (port == PORT_NONE)
1954 return;
1955
1956 if (!is_port_valid(i915, port)) {
1957 drm_dbg_kms(&i915->drm,
1958 "VBT reports port %c as supported, but that can't be true: skipping\n",
1959 port_name(port));
1960 return;
1961 }
1962
1963 info = &i915->vbt.ddi_port_info[port];
1964
1965 if (info->devdata) {
1966 drm_dbg_kms(&i915->drm,
1967 "More than one child device for port %c in VBT, using the first.\n",
1968 port_name(port));
1969 return;
1970 }
1971
1972 sanitize_device_type(devdata, port);
1973
1974 is_dvi = intel_bios_encoder_supports_dvi(devdata);
1975 is_dp = intel_bios_encoder_supports_dp(devdata);
1976 is_crt = intel_bios_encoder_supports_crt(devdata);
1977 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
1978 is_edp = intel_bios_encoder_supports_edp(devdata);
1979
1980 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
1981 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
1982
1983 drm_dbg_kms(&i915->drm,
1984 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1985 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1986 HAS_LSPCON(i915) && child->lspcon,
1987 supports_typec_usb, supports_tbt,
1988 devdata->dsc != NULL);
1989
1990 if (is_dvi) {
1991 u8 ddc_pin;
1992
1993 ddc_pin = map_ddc_pin(i915, child->ddc_pin);
1994 if (intel_gmbus_is_valid_pin(i915, ddc_pin)) {
1995 info->alternate_ddc_pin = ddc_pin;
1996 sanitize_ddc_pin(i915, port);
1997 } else {
1998 drm_dbg_kms(&i915->drm,
1999 "Port %c has invalid DDC pin %d, "
2000 "sticking to defaults\n",
2001 port_name(port), ddc_pin);
2002 }
2003 }
2004
2005 if (is_dp) {
2006 info->alternate_aux_channel = child->aux_channel;
2007
2008 sanitize_aux_ch(i915, port);
2009 }
2010
2011 if (i915->vbt.version >= 158) {
2012 /* The VBT HDMI level shift values match the table we have. */
2013 u8 hdmi_level_shift = child->hdmi_level_shifter_value;
2014 drm_dbg_kms(&i915->drm,
2015 "Port %c VBT HDMI level shift: %d\n",
2016 port_name(port),
2017 hdmi_level_shift);
2018 info->hdmi_level_shift = hdmi_level_shift;
2019 info->hdmi_level_shift_set = true;
2020 }
2021
2022 if (i915->vbt.version >= 204) {
2023 int max_tmds_clock;
2024
2025 switch (child->hdmi_max_data_rate) {
2026 default:
2027 MISSING_CASE(child->hdmi_max_data_rate);
2028 fallthrough;
2029 case HDMI_MAX_DATA_RATE_PLATFORM:
2030 max_tmds_clock = 0;
2031 break;
2032 case HDMI_MAX_DATA_RATE_297:
2033 max_tmds_clock = 297000;
2034 break;
2035 case HDMI_MAX_DATA_RATE_165:
2036 max_tmds_clock = 165000;
2037 break;
2038 }
2039
2040 if (max_tmds_clock)
2041 drm_dbg_kms(&i915->drm,
2042 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2043 port_name(port), max_tmds_clock);
2044 info->max_tmds_clock = max_tmds_clock;
2045 }
2046
2047 /* I_boost config for SKL and above */
2048 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
2049 if (dp_boost_level)
2050 drm_dbg_kms(&i915->drm,
2051 "Port %c VBT (e)DP boost level: %d\n",
2052 port_name(port), dp_boost_level);
2053
2054 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata);
2055 if (hdmi_boost_level)
2056 drm_dbg_kms(&i915->drm,
2057 "Port %c VBT HDMI boost level: %d\n",
2058 port_name(port), hdmi_boost_level);
2059
2060 /* DP max link rate for GLK+ */
2061 if (i915->vbt.version >= 216) {
2062 if (i915->vbt.version >= 230)
2063 info->dp_max_link_rate = parse_bdb_230_dp_max_link_rate(child->dp_max_link_rate);
2064 else
2065 info->dp_max_link_rate = parse_bdb_216_dp_max_link_rate(child->dp_max_link_rate);
2066
2067 drm_dbg_kms(&i915->drm,
2068 "Port %c VBT DP max link rate: %d\n",
2069 port_name(port), info->dp_max_link_rate);
2070 }
2071
2072 info->devdata = devdata;
2073 }
2074
parse_ddi_ports(struct drm_i915_private * i915)2075 static void parse_ddi_ports(struct drm_i915_private *i915)
2076 {
2077 struct intel_bios_encoder_data *devdata;
2078
2079 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2080 return;
2081
2082 if (i915->vbt.version < 155)
2083 return;
2084
2085 list_for_each_entry(devdata, &i915->vbt.display_devices, node)
2086 parse_ddi_port(i915, devdata);
2087 }
2088
2089 static void
parse_general_definitions(struct drm_i915_private * i915,const struct bdb_header * bdb)2090 parse_general_definitions(struct drm_i915_private *i915,
2091 const struct bdb_header *bdb)
2092 {
2093 const struct bdb_general_definitions *defs;
2094 struct intel_bios_encoder_data *devdata;
2095 const struct child_device_config *child;
2096 int i, child_device_num;
2097 u8 expected_size;
2098 u16 block_size;
2099 int bus_pin;
2100
2101 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
2102 if (!defs) {
2103 drm_dbg_kms(&i915->drm,
2104 "No general definition block is found, no devices defined.\n");
2105 return;
2106 }
2107
2108 block_size = get_blocksize(defs);
2109 if (block_size < sizeof(*defs)) {
2110 drm_dbg_kms(&i915->drm,
2111 "General definitions block too small (%u)\n",
2112 block_size);
2113 return;
2114 }
2115
2116 bus_pin = defs->crt_ddc_gmbus_pin;
2117 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2118 if (intel_gmbus_is_valid_pin(i915, bus_pin))
2119 i915->vbt.crt_ddc_pin = bus_pin;
2120
2121 if (bdb->version < 106) {
2122 expected_size = 22;
2123 } else if (bdb->version < 111) {
2124 expected_size = 27;
2125 } else if (bdb->version < 195) {
2126 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2127 } else if (bdb->version == 195) {
2128 expected_size = 37;
2129 } else if (bdb->version <= 215) {
2130 expected_size = 38;
2131 } else if (bdb->version <= 237) {
2132 expected_size = 39;
2133 } else {
2134 expected_size = sizeof(*child);
2135 BUILD_BUG_ON(sizeof(*child) < 39);
2136 drm_dbg(&i915->drm,
2137 "Expected child device config size for VBT version %u not known; assuming %u\n",
2138 bdb->version, expected_size);
2139 }
2140
2141 /* Flag an error for unexpected size, but continue anyway. */
2142 if (defs->child_dev_size != expected_size)
2143 drm_err(&i915->drm,
2144 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
2145 defs->child_dev_size, expected_size, bdb->version);
2146
2147 /* The legacy sized child device config is the minimum we need. */
2148 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2149 drm_dbg_kms(&i915->drm,
2150 "Child device config size %u is too small.\n",
2151 defs->child_dev_size);
2152 return;
2153 }
2154
2155 /* get the number of child device */
2156 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2157
2158 for (i = 0; i < child_device_num; i++) {
2159 child = child_device_ptr(defs, i);
2160 if (!child->device_type)
2161 continue;
2162
2163 drm_dbg_kms(&i915->drm,
2164 "Found VBT child device with type 0x%x\n",
2165 child->device_type);
2166
2167 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2168 if (!devdata)
2169 break;
2170
2171 devdata->i915 = i915;
2172
2173 /*
2174 * Copy as much as we know (sizeof) and is available
2175 * (child_dev_size) of the child device config. Accessing the
2176 * data must depend on VBT version.
2177 */
2178 memcpy(&devdata->child, child,
2179 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2180
2181 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2182 }
2183
2184 if (list_empty(&i915->vbt.display_devices))
2185 drm_dbg_kms(&i915->drm,
2186 "no child dev is parsed from VBT\n");
2187 }
2188
2189 /* Common defaults which may be overridden by VBT. */
2190 static void
init_vbt_defaults(struct drm_i915_private * i915)2191 init_vbt_defaults(struct drm_i915_private *i915)
2192 {
2193 i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2194
2195 /* Default to having backlight */
2196 i915->vbt.backlight.present = true;
2197
2198 /* LFP panel data */
2199 i915->vbt.lvds_dither = 1;
2200
2201 /* SDVO panel data */
2202 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2203
2204 /* general features */
2205 i915->vbt.int_tv_support = 1;
2206 i915->vbt.int_crt_support = 1;
2207
2208 /* driver features */
2209 i915->vbt.int_lvds_support = 1;
2210
2211 /* Default to using SSC */
2212 i915->vbt.lvds_use_ssc = 1;
2213 /*
2214 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2215 * clock for LVDS.
2216 */
2217 i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2218 !HAS_PCH_SPLIT(i915));
2219 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2220 i915->vbt.lvds_ssc_freq);
2221 }
2222
2223 /* Defaults to initialize only if there is no VBT. */
2224 static void
init_vbt_missing_defaults(struct drm_i915_private * i915)2225 init_vbt_missing_defaults(struct drm_i915_private *i915)
2226 {
2227 enum port port;
2228 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2229 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2230
2231 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2232 return;
2233
2234 for_each_port_masked(port, ports) {
2235 struct intel_bios_encoder_data *devdata;
2236 struct child_device_config *child;
2237 enum phy phy = intel_port_to_phy(i915, port);
2238
2239 /*
2240 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2241 * to detect it.
2242 */
2243 if (intel_phy_is_tc(i915, phy))
2244 continue;
2245
2246 /* Create fake child device config */
2247 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2248 if (!devdata)
2249 break;
2250
2251 devdata->i915 = i915;
2252 child = &devdata->child;
2253
2254 if (port == PORT_F)
2255 child->dvo_port = DVO_PORT_HDMIF;
2256 else if (port == PORT_E)
2257 child->dvo_port = DVO_PORT_HDMIE;
2258 else
2259 child->dvo_port = DVO_PORT_HDMIA + port;
2260
2261 if (port != PORT_A && port != PORT_E)
2262 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2263
2264 if (port != PORT_E)
2265 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2266
2267 if (port == PORT_A)
2268 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2269
2270 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2271
2272 drm_dbg_kms(&i915->drm,
2273 "Generating default VBT child device with type 0x04%x on port %c\n",
2274 child->device_type, port_name(port));
2275 }
2276
2277 /* Bypass some minimum baseline VBT version checks */
2278 i915->vbt.version = 155;
2279 }
2280
get_bdb_header(const struct vbt_header * vbt)2281 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2282 {
2283 const void *_vbt = vbt;
2284
2285 return _vbt + vbt->bdb_offset;
2286 }
2287
2288 /**
2289 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2290 * @buf: pointer to a buffer to validate
2291 * @size: size of the buffer
2292 *
2293 * Returns true on valid VBT.
2294 */
intel_bios_is_valid_vbt(const void * buf,size_t size)2295 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2296 {
2297 const struct vbt_header *vbt = buf;
2298 const struct bdb_header *bdb;
2299
2300 if (!vbt)
2301 return false;
2302
2303 if (sizeof(struct vbt_header) > size) {
2304 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2305 return false;
2306 }
2307
2308 if (memcmp(vbt->signature, "$VBT", 4)) {
2309 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2310 return false;
2311 }
2312
2313 if (vbt->vbt_size > size) {
2314 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2315 return false;
2316 }
2317
2318 size = vbt->vbt_size;
2319
2320 if (range_overflows_t(size_t,
2321 vbt->bdb_offset,
2322 sizeof(struct bdb_header),
2323 size)) {
2324 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2325 return false;
2326 }
2327
2328 bdb = get_bdb_header(vbt);
2329 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2330 DRM_DEBUG_DRIVER("BDB incomplete\n");
2331 return false;
2332 }
2333
2334 return vbt;
2335 }
2336
oprom_get_vbt(struct drm_i915_private * i915)2337 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
2338 {
2339 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
2340 void __iomem *p = NULL, *oprom;
2341 struct vbt_header *vbt;
2342 u16 vbt_size;
2343 size_t i, size;
2344
2345 oprom = pci_map_rom(pdev, &size);
2346 if (!oprom)
2347 return NULL;
2348
2349 /* Scour memory looking for the VBT signature. */
2350 for (i = 0; i + 4 < size; i += 4) {
2351 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2352 continue;
2353
2354 p = oprom + i;
2355 size -= i;
2356 break;
2357 }
2358
2359 if (!p)
2360 goto err_unmap_oprom;
2361
2362 if (sizeof(struct vbt_header) > size) {
2363 drm_dbg(&i915->drm, "VBT header incomplete\n");
2364 goto err_unmap_oprom;
2365 }
2366
2367 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2368 if (vbt_size > size) {
2369 drm_dbg(&i915->drm,
2370 "VBT incomplete (vbt_size overflows)\n");
2371 goto err_unmap_oprom;
2372 }
2373
2374 /* The rest will be validated by intel_bios_is_valid_vbt() */
2375 vbt = kmalloc(vbt_size, GFP_KERNEL);
2376 if (!vbt)
2377 goto err_unmap_oprom;
2378
2379 memcpy_fromio(vbt, p, vbt_size);
2380
2381 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2382 goto err_free_vbt;
2383
2384 pci_unmap_rom(pdev, oprom);
2385
2386 return vbt;
2387
2388 err_free_vbt:
2389 kfree(vbt);
2390 err_unmap_oprom:
2391 pci_unmap_rom(pdev, oprom);
2392
2393 return NULL;
2394 }
2395
2396 /**
2397 * intel_bios_init - find VBT and initialize settings from the BIOS
2398 * @i915: i915 device instance
2399 *
2400 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2401 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2402 * initialize some defaults if the VBT is not present at all.
2403 */
intel_bios_init(struct drm_i915_private * i915)2404 void intel_bios_init(struct drm_i915_private *i915)
2405 {
2406 const struct vbt_header *vbt = i915->opregion.vbt;
2407 struct vbt_header *oprom_vbt = NULL;
2408 const struct bdb_header *bdb;
2409
2410 INIT_LIST_HEAD(&i915->vbt.display_devices);
2411
2412 if (!HAS_DISPLAY(i915)) {
2413 drm_dbg_kms(&i915->drm,
2414 "Skipping VBT init due to disabled display.\n");
2415 return;
2416 }
2417
2418 init_vbt_defaults(i915);
2419
2420 /* If the OpRegion does not have VBT, look in PCI ROM. */
2421 if (!vbt) {
2422 oprom_vbt = oprom_get_vbt(i915);
2423 if (!oprom_vbt)
2424 goto out;
2425
2426 vbt = oprom_vbt;
2427
2428 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
2429 }
2430
2431 bdb = get_bdb_header(vbt);
2432 i915->vbt.version = bdb->version;
2433
2434 drm_dbg_kms(&i915->drm,
2435 "VBT signature \"%.*s\", BDB version %d\n",
2436 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2437
2438 /* Grab useful general definitions */
2439 parse_general_features(i915, bdb);
2440 parse_general_definitions(i915, bdb);
2441 parse_panel_options(i915, bdb);
2442 parse_panel_dtd(i915, bdb);
2443 parse_lfp_backlight(i915, bdb);
2444 parse_sdvo_panel_data(i915, bdb);
2445 parse_driver_features(i915, bdb);
2446 parse_power_conservation_features(i915, bdb);
2447 parse_edp(i915, bdb);
2448 parse_psr(i915, bdb);
2449 parse_mipi_config(i915, bdb);
2450 parse_mipi_sequence(i915, bdb);
2451
2452 /* Depends on child device list */
2453 parse_compression_parameters(i915, bdb);
2454
2455 out:
2456 if (!vbt) {
2457 drm_info(&i915->drm,
2458 "Failed to find VBIOS tables (VBT)\n");
2459 init_vbt_missing_defaults(i915);
2460 }
2461
2462 /* Further processing on pre-parsed or generated child device data */
2463 parse_sdvo_device_mapping(i915);
2464 parse_ddi_ports(i915);
2465
2466 kfree(oprom_vbt);
2467 }
2468
2469 /**
2470 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2471 * @i915: i915 device instance
2472 */
intel_bios_driver_remove(struct drm_i915_private * i915)2473 void intel_bios_driver_remove(struct drm_i915_private *i915)
2474 {
2475 struct intel_bios_encoder_data *devdata, *n;
2476
2477 list_for_each_entry_safe(devdata, n, &i915->vbt.display_devices, node) {
2478 list_del(&devdata->node);
2479 kfree(devdata->dsc);
2480 kfree(devdata);
2481 }
2482
2483 kfree(i915->vbt.sdvo_lvds_vbt_mode);
2484 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2485 kfree(i915->vbt.lfp_lvds_vbt_mode);
2486 i915->vbt.lfp_lvds_vbt_mode = NULL;
2487 kfree(i915->vbt.dsi.data);
2488 i915->vbt.dsi.data = NULL;
2489 kfree(i915->vbt.dsi.pps);
2490 i915->vbt.dsi.pps = NULL;
2491 kfree(i915->vbt.dsi.config);
2492 i915->vbt.dsi.config = NULL;
2493 kfree(i915->vbt.dsi.deassert_seq);
2494 i915->vbt.dsi.deassert_seq = NULL;
2495 }
2496
2497 /**
2498 * intel_bios_is_tv_present - is integrated TV present in VBT
2499 * @i915: i915 device instance
2500 *
2501 * Return true if TV is present. If no child devices were parsed from VBT,
2502 * assume TV is present.
2503 */
intel_bios_is_tv_present(struct drm_i915_private * i915)2504 bool intel_bios_is_tv_present(struct drm_i915_private *i915)
2505 {
2506 const struct intel_bios_encoder_data *devdata;
2507 const struct child_device_config *child;
2508
2509 if (!i915->vbt.int_tv_support)
2510 return false;
2511
2512 if (list_empty(&i915->vbt.display_devices))
2513 return true;
2514
2515 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2516 child = &devdata->child;
2517
2518 /*
2519 * If the device type is not TV, continue.
2520 */
2521 switch (child->device_type) {
2522 case DEVICE_TYPE_INT_TV:
2523 case DEVICE_TYPE_TV:
2524 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2525 break;
2526 default:
2527 continue;
2528 }
2529 /* Only when the addin_offset is non-zero, it is regarded
2530 * as present.
2531 */
2532 if (child->addin_offset)
2533 return true;
2534 }
2535
2536 return false;
2537 }
2538
2539 /**
2540 * intel_bios_is_lvds_present - is LVDS present in VBT
2541 * @i915: i915 device instance
2542 * @i2c_pin: i2c pin for LVDS if present
2543 *
2544 * Return true if LVDS is present. If no child devices were parsed from VBT,
2545 * assume LVDS is present.
2546 */
intel_bios_is_lvds_present(struct drm_i915_private * i915,u8 * i2c_pin)2547 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
2548 {
2549 const struct intel_bios_encoder_data *devdata;
2550 const struct child_device_config *child;
2551
2552 if (list_empty(&i915->vbt.display_devices))
2553 return true;
2554
2555 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2556 child = &devdata->child;
2557
2558 /* If the device type is not LFP, continue.
2559 * We have to check both the new identifiers as well as the
2560 * old for compatibility with some BIOSes.
2561 */
2562 if (child->device_type != DEVICE_TYPE_INT_LFP &&
2563 child->device_type != DEVICE_TYPE_LFP)
2564 continue;
2565
2566 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
2567 *i2c_pin = child->i2c_pin;
2568
2569 /* However, we cannot trust the BIOS writers to populate
2570 * the VBT correctly. Since LVDS requires additional
2571 * information from AIM blocks, a non-zero addin offset is
2572 * a good indicator that the LVDS is actually present.
2573 */
2574 if (child->addin_offset)
2575 return true;
2576
2577 /* But even then some BIOS writers perform some black magic
2578 * and instantiate the device without reference to any
2579 * additional data. Trust that if the VBT was written into
2580 * the OpRegion then they have validated the LVDS's existence.
2581 */
2582 if (i915->opregion.vbt)
2583 return true;
2584 }
2585
2586 return false;
2587 }
2588
2589 /**
2590 * intel_bios_is_port_present - is the specified digital port present
2591 * @i915: i915 device instance
2592 * @port: port to check
2593 *
2594 * Return true if the device in %port is present.
2595 */
intel_bios_is_port_present(struct drm_i915_private * i915,enum port port)2596 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
2597 {
2598 const struct intel_bios_encoder_data *devdata;
2599 const struct child_device_config *child;
2600 static const struct {
2601 u16 dp, hdmi;
2602 } port_mapping[] = {
2603 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2604 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2605 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2606 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2607 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2608 };
2609
2610 if (HAS_DDI(i915)) {
2611 const struct ddi_vbt_port_info *port_info =
2612 &i915->vbt.ddi_port_info[port];
2613
2614 return port_info->devdata;
2615 }
2616
2617 /* FIXME maybe deal with port A as well? */
2618 if (drm_WARN_ON(&i915->drm,
2619 port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2620 return false;
2621
2622 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2623 child = &devdata->child;
2624
2625 if ((child->dvo_port == port_mapping[port].dp ||
2626 child->dvo_port == port_mapping[port].hdmi) &&
2627 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2628 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2629 return true;
2630 }
2631
2632 return false;
2633 }
2634
2635 /**
2636 * intel_bios_is_port_edp - is the device in given port eDP
2637 * @i915: i915 device instance
2638 * @port: port to check
2639 *
2640 * Return true if the device in %port is eDP.
2641 */
intel_bios_is_port_edp(struct drm_i915_private * i915,enum port port)2642 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
2643 {
2644 const struct intel_bios_encoder_data *devdata;
2645 const struct child_device_config *child;
2646 static const short port_mapping[] = {
2647 [PORT_B] = DVO_PORT_DPB,
2648 [PORT_C] = DVO_PORT_DPC,
2649 [PORT_D] = DVO_PORT_DPD,
2650 [PORT_E] = DVO_PORT_DPE,
2651 [PORT_F] = DVO_PORT_DPF,
2652 };
2653
2654 if (HAS_DDI(i915)) {
2655 const struct intel_bios_encoder_data *devdata;
2656
2657 devdata = intel_bios_encoder_data_lookup(i915, port);
2658
2659 return devdata && intel_bios_encoder_supports_edp(devdata);
2660 }
2661
2662 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2663 child = &devdata->child;
2664
2665 if (child->dvo_port == port_mapping[port] &&
2666 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2667 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2668 return true;
2669 }
2670
2671 return false;
2672 }
2673
child_dev_is_dp_dual_mode(const struct child_device_config * child)2674 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child)
2675 {
2676 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2677 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2678 return false;
2679
2680 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
2681 return true;
2682
2683 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2684 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
2685 child->aux_channel != 0)
2686 return true;
2687
2688 return false;
2689 }
2690
intel_bios_is_port_dp_dual_mode(struct drm_i915_private * i915,enum port port)2691 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
2692 enum port port)
2693 {
2694 static const struct {
2695 u16 dp, hdmi;
2696 } port_mapping[] = {
2697 /*
2698 * Buggy VBTs may declare DP ports as having
2699 * HDMI type dvo_port :( So let's check both.
2700 */
2701 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2702 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2703 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2704 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2705 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2706 };
2707 const struct intel_bios_encoder_data *devdata;
2708
2709 if (HAS_DDI(i915)) {
2710 const struct intel_bios_encoder_data *devdata;
2711
2712 devdata = intel_bios_encoder_data_lookup(i915, port);
2713
2714 return devdata && child_dev_is_dp_dual_mode(&devdata->child);
2715 }
2716
2717 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2718 return false;
2719
2720 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2721 if ((devdata->child.dvo_port == port_mapping[port].dp ||
2722 devdata->child.dvo_port == port_mapping[port].hdmi) &&
2723 child_dev_is_dp_dual_mode(&devdata->child))
2724 return true;
2725 }
2726
2727 return false;
2728 }
2729
2730 /**
2731 * intel_bios_is_dsi_present - is DSI present in VBT
2732 * @i915: i915 device instance
2733 * @port: port for DSI if present
2734 *
2735 * Return true if DSI is present, and return the port in %port.
2736 */
intel_bios_is_dsi_present(struct drm_i915_private * i915,enum port * port)2737 bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
2738 enum port *port)
2739 {
2740 const struct intel_bios_encoder_data *devdata;
2741 const struct child_device_config *child;
2742 u8 dvo_port;
2743
2744 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2745 child = &devdata->child;
2746
2747 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2748 continue;
2749
2750 dvo_port = child->dvo_port;
2751
2752 if (dsi_dvo_port_to_port(i915, dvo_port) == PORT_NONE) {
2753 drm_dbg_kms(&i915->drm,
2754 "VBT has unsupported DSI port %c\n",
2755 port_name(dvo_port - DVO_PORT_MIPIA));
2756 continue;
2757 }
2758
2759 if (port)
2760 *port = dsi_dvo_port_to_port(i915, dvo_port);
2761 return true;
2762 }
2763
2764 return false;
2765 }
2766
fill_dsc(struct intel_crtc_state * crtc_state,struct dsc_compression_parameters_entry * dsc,int dsc_max_bpc)2767 static void fill_dsc(struct intel_crtc_state *crtc_state,
2768 struct dsc_compression_parameters_entry *dsc,
2769 int dsc_max_bpc)
2770 {
2771 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2772 int bpc = 8;
2773
2774 vdsc_cfg->dsc_version_major = dsc->version_major;
2775 vdsc_cfg->dsc_version_minor = dsc->version_minor;
2776
2777 if (dsc->support_12bpc && dsc_max_bpc >= 12)
2778 bpc = 12;
2779 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2780 bpc = 10;
2781 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2782 bpc = 8;
2783 else
2784 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2785 dsc_max_bpc);
2786
2787 crtc_state->pipe_bpp = bpc * 3;
2788
2789 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2790 VBT_DSC_MAX_BPP(dsc->max_bpp));
2791
2792 /*
2793 * FIXME: This is ugly, and slice count should take DSC engine
2794 * throughput etc. into account.
2795 *
2796 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2797 */
2798 if (dsc->slices_per_line & BIT(2)) {
2799 crtc_state->dsc.slice_count = 4;
2800 } else if (dsc->slices_per_line & BIT(1)) {
2801 crtc_state->dsc.slice_count = 2;
2802 } else {
2803 /* FIXME */
2804 if (!(dsc->slices_per_line & BIT(0)))
2805 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2806
2807 crtc_state->dsc.slice_count = 1;
2808 }
2809
2810 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2811 crtc_state->dsc.slice_count != 0)
2812 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2813 crtc_state->hw.adjusted_mode.crtc_hdisplay,
2814 crtc_state->dsc.slice_count);
2815
2816 /*
2817 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2818 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
2819 */
2820 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
2821 dsc->rc_buffer_size);
2822
2823 /* FIXME: DSI spec says bpc + 1 for this one */
2824 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2825
2826 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2827
2828 vdsc_cfg->slice_height = dsc->slice_height;
2829 }
2830
2831 /* FIXME: initially DSI specific */
intel_bios_get_dsc_params(struct intel_encoder * encoder,struct intel_crtc_state * crtc_state,int dsc_max_bpc)2832 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2833 struct intel_crtc_state *crtc_state,
2834 int dsc_max_bpc)
2835 {
2836 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2837 const struct intel_bios_encoder_data *devdata;
2838 const struct child_device_config *child;
2839
2840 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2841 child = &devdata->child;
2842
2843 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2844 continue;
2845
2846 if (dsi_dvo_port_to_port(i915, child->dvo_port) == encoder->port) {
2847 if (!devdata->dsc)
2848 return false;
2849
2850 if (crtc_state)
2851 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2852
2853 return true;
2854 }
2855 }
2856
2857 return false;
2858 }
2859
2860 /**
2861 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2862 * @i915: i915 device instance
2863 * @port: port to check
2864 *
2865 * Return true if HPD should be inverted for %port.
2866 */
2867 bool
intel_bios_is_port_hpd_inverted(const struct drm_i915_private * i915,enum port port)2868 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2869 enum port port)
2870 {
2871 const struct intel_bios_encoder_data *devdata =
2872 i915->vbt.ddi_port_info[port].devdata;
2873
2874 if (drm_WARN_ON_ONCE(&i915->drm,
2875 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
2876 return false;
2877
2878 return devdata && devdata->child.hpd_invert;
2879 }
2880
2881 /**
2882 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2883 * @i915: i915 device instance
2884 * @port: port to check
2885 *
2886 * Return true if LSPCON is present on this port
2887 */
2888 bool
intel_bios_is_lspcon_present(const struct drm_i915_private * i915,enum port port)2889 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2890 enum port port)
2891 {
2892 const struct intel_bios_encoder_data *devdata =
2893 i915->vbt.ddi_port_info[port].devdata;
2894
2895 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon;
2896 }
2897
2898 /**
2899 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port
2900 * @i915: i915 device instance
2901 * @port: port to check
2902 *
2903 * Return true if port requires lane reversal
2904 */
2905 bool
intel_bios_is_lane_reversal_needed(const struct drm_i915_private * i915,enum port port)2906 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
2907 enum port port)
2908 {
2909 const struct intel_bios_encoder_data *devdata =
2910 i915->vbt.ddi_port_info[port].devdata;
2911
2912 return devdata && devdata->child.lane_reversal;
2913 }
2914
intel_bios_port_aux_ch(struct drm_i915_private * i915,enum port port)2915 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
2916 enum port port)
2917 {
2918 const struct ddi_vbt_port_info *info =
2919 &i915->vbt.ddi_port_info[port];
2920 enum aux_ch aux_ch;
2921
2922 if (!info->alternate_aux_channel) {
2923 aux_ch = (enum aux_ch)port;
2924
2925 drm_dbg_kms(&i915->drm,
2926 "using AUX %c for port %c (platform default)\n",
2927 aux_ch_name(aux_ch), port_name(port));
2928 return aux_ch;
2929 }
2930
2931 /*
2932 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
2933 * map to DDI A,B,TC1,TC2 respectively.
2934 *
2935 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
2936 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
2937 */
2938 switch (info->alternate_aux_channel) {
2939 case DP_AUX_A:
2940 aux_ch = AUX_CH_A;
2941 break;
2942 case DP_AUX_B:
2943 if (IS_ALDERLAKE_S(i915))
2944 aux_ch = AUX_CH_USBC1;
2945 else
2946 aux_ch = AUX_CH_B;
2947 break;
2948 case DP_AUX_C:
2949 if (IS_ALDERLAKE_S(i915))
2950 aux_ch = AUX_CH_USBC2;
2951 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2952 aux_ch = AUX_CH_USBC1;
2953 else
2954 aux_ch = AUX_CH_C;
2955 break;
2956 case DP_AUX_D:
2957 if (DISPLAY_VER(i915) == 13)
2958 aux_ch = AUX_CH_D_XELPD;
2959 else if (IS_ALDERLAKE_S(i915))
2960 aux_ch = AUX_CH_USBC3;
2961 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2962 aux_ch = AUX_CH_USBC2;
2963 else
2964 aux_ch = AUX_CH_D;
2965 break;
2966 case DP_AUX_E:
2967 if (DISPLAY_VER(i915) == 13)
2968 aux_ch = AUX_CH_E_XELPD;
2969 else if (IS_ALDERLAKE_S(i915))
2970 aux_ch = AUX_CH_USBC4;
2971 else
2972 aux_ch = AUX_CH_E;
2973 break;
2974 case DP_AUX_F:
2975 if (DISPLAY_VER(i915) == 13)
2976 aux_ch = AUX_CH_USBC1;
2977 else
2978 aux_ch = AUX_CH_F;
2979 break;
2980 case DP_AUX_G:
2981 if (DISPLAY_VER(i915) == 13)
2982 aux_ch = AUX_CH_USBC2;
2983 else
2984 aux_ch = AUX_CH_G;
2985 break;
2986 case DP_AUX_H:
2987 if (DISPLAY_VER(i915) == 13)
2988 aux_ch = AUX_CH_USBC3;
2989 else
2990 aux_ch = AUX_CH_H;
2991 break;
2992 case DP_AUX_I:
2993 if (DISPLAY_VER(i915) == 13)
2994 aux_ch = AUX_CH_USBC4;
2995 else
2996 aux_ch = AUX_CH_I;
2997 break;
2998 default:
2999 MISSING_CASE(info->alternate_aux_channel);
3000 aux_ch = AUX_CH_A;
3001 break;
3002 }
3003
3004 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n",
3005 aux_ch_name(aux_ch), port_name(port));
3006
3007 return aux_ch;
3008 }
3009
intel_bios_max_tmds_clock(struct intel_encoder * encoder)3010 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
3011 {
3012 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3013
3014 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
3015 }
3016
intel_bios_hdmi_level_shift(struct intel_encoder * encoder)3017 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
3018 {
3019 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3020 const struct ddi_vbt_port_info *info =
3021 &i915->vbt.ddi_port_info[encoder->port];
3022
3023 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
3024 }
3025
intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data * devdata)3026 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3027 {
3028 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
3029 return 0;
3030
3031 return translate_iboost(devdata->child.dp_iboost_level);
3032 }
3033
intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data * devdata)3034 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3035 {
3036 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
3037 return 0;
3038
3039 return translate_iboost(devdata->child.hdmi_iboost_level);
3040 }
3041
intel_bios_dp_max_link_rate(struct intel_encoder * encoder)3042 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
3043 {
3044 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3045
3046 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
3047 }
3048
intel_bios_alternate_ddc_pin(struct intel_encoder * encoder)3049 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
3050 {
3051 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3052
3053 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
3054 }
3055
intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data * devdata)3056 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3057 {
3058 return devdata->i915->vbt.version >= 195 && devdata->child.dp_usb_type_c;
3059 }
3060
intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data * devdata)3061 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3062 {
3063 return devdata->i915->vbt.version >= 209 && devdata->child.tbt;
3064 }
3065
3066 const struct intel_bios_encoder_data *
intel_bios_encoder_data_lookup(struct drm_i915_private * i915,enum port port)3067 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3068 {
3069 return i915->vbt.ddi_port_info[port].devdata;
3070 }
3071