1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 *
4 * Copyright IBM Corp. 2007
5 * Copyright 2010-2011 Freescale Semiconductor, Inc.
6 *
7 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
8 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
9 * Scott Wood <scottwood@freescale.com>
10 * Varun Sethi <varun.sethi@freescale.com>
11 */
12
13 #include <linux/errno.h>
14 #include <linux/err.h>
15 #include <linux/kvm_host.h>
16 #include <linux/gfp.h>
17 #include <linux/module.h>
18 #include <linux/vmalloc.h>
19 #include <linux/fs.h>
20
21 #include <asm/cputable.h>
22 #include <linux/uaccess.h>
23 #include <asm/interrupt.h>
24 #include <asm/kvm_ppc.h>
25 #include <asm/cacheflush.h>
26 #include <asm/dbell.h>
27 #include <asm/hw_irq.h>
28 #include <asm/irq.h>
29 #include <asm/time.h>
30
31 #include "timing.h"
32 #include "booke.h"
33
34 #define CREATE_TRACE_POINTS
35 #include "trace_booke.h"
36
37 unsigned long kvmppc_booke_handlers;
38
39 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
40 KVM_GENERIC_VM_STATS(),
41 STATS_DESC_ICOUNTER(VM, num_2M_pages),
42 STATS_DESC_ICOUNTER(VM, num_1G_pages)
43 };
44
45 const struct kvm_stats_header kvm_vm_stats_header = {
46 .name_size = KVM_STATS_NAME_SIZE,
47 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
48 .id_offset = sizeof(struct kvm_stats_header),
49 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
50 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
51 sizeof(kvm_vm_stats_desc),
52 };
53
54 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
55 KVM_GENERIC_VCPU_STATS(),
56 STATS_DESC_COUNTER(VCPU, sum_exits),
57 STATS_DESC_COUNTER(VCPU, mmio_exits),
58 STATS_DESC_COUNTER(VCPU, signal_exits),
59 STATS_DESC_COUNTER(VCPU, light_exits),
60 STATS_DESC_COUNTER(VCPU, itlb_real_miss_exits),
61 STATS_DESC_COUNTER(VCPU, itlb_virt_miss_exits),
62 STATS_DESC_COUNTER(VCPU, dtlb_real_miss_exits),
63 STATS_DESC_COUNTER(VCPU, dtlb_virt_miss_exits),
64 STATS_DESC_COUNTER(VCPU, syscall_exits),
65 STATS_DESC_COUNTER(VCPU, isi_exits),
66 STATS_DESC_COUNTER(VCPU, dsi_exits),
67 STATS_DESC_COUNTER(VCPU, emulated_inst_exits),
68 STATS_DESC_COUNTER(VCPU, dec_exits),
69 STATS_DESC_COUNTER(VCPU, ext_intr_exits),
70 STATS_DESC_COUNTER(VCPU, halt_successful_wait),
71 STATS_DESC_COUNTER(VCPU, dbell_exits),
72 STATS_DESC_COUNTER(VCPU, gdbell_exits),
73 STATS_DESC_COUNTER(VCPU, ld),
74 STATS_DESC_COUNTER(VCPU, st),
75 STATS_DESC_COUNTER(VCPU, pthru_all),
76 STATS_DESC_COUNTER(VCPU, pthru_host),
77 STATS_DESC_COUNTER(VCPU, pthru_bad_aff)
78 };
79
80 const struct kvm_stats_header kvm_vcpu_stats_header = {
81 .name_size = KVM_STATS_NAME_SIZE,
82 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
83 .id_offset = sizeof(struct kvm_stats_header),
84 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
85 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
86 sizeof(kvm_vcpu_stats_desc),
87 };
88
89 /* TODO: use vcpu_printf() */
kvmppc_dump_vcpu(struct kvm_vcpu * vcpu)90 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
91 {
92 int i;
93
94 printk("pc: %08lx msr: %08llx\n", vcpu->arch.regs.nip,
95 vcpu->arch.shared->msr);
96 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.regs.link,
97 vcpu->arch.regs.ctr);
98 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
99 vcpu->arch.shared->srr1);
100
101 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
102
103 for (i = 0; i < 32; i += 4) {
104 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
105 kvmppc_get_gpr(vcpu, i),
106 kvmppc_get_gpr(vcpu, i+1),
107 kvmppc_get_gpr(vcpu, i+2),
108 kvmppc_get_gpr(vcpu, i+3));
109 }
110 }
111
112 #ifdef CONFIG_SPE
kvmppc_vcpu_disable_spe(struct kvm_vcpu * vcpu)113 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
114 {
115 preempt_disable();
116 enable_kernel_spe();
117 kvmppc_save_guest_spe(vcpu);
118 disable_kernel_spe();
119 vcpu->arch.shadow_msr &= ~MSR_SPE;
120 preempt_enable();
121 }
122
kvmppc_vcpu_enable_spe(struct kvm_vcpu * vcpu)123 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
124 {
125 preempt_disable();
126 enable_kernel_spe();
127 kvmppc_load_guest_spe(vcpu);
128 disable_kernel_spe();
129 vcpu->arch.shadow_msr |= MSR_SPE;
130 preempt_enable();
131 }
132
kvmppc_vcpu_sync_spe(struct kvm_vcpu * vcpu)133 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
134 {
135 if (vcpu->arch.shared->msr & MSR_SPE) {
136 if (!(vcpu->arch.shadow_msr & MSR_SPE))
137 kvmppc_vcpu_enable_spe(vcpu);
138 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
139 kvmppc_vcpu_disable_spe(vcpu);
140 }
141 }
142 #else
kvmppc_vcpu_sync_spe(struct kvm_vcpu * vcpu)143 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
144 {
145 }
146 #endif
147
148 /*
149 * Load up guest vcpu FP state if it's needed.
150 * It also set the MSR_FP in thread so that host know
151 * we're holding FPU, and then host can help to save
152 * guest vcpu FP state if other threads require to use FPU.
153 * This simulates an FP unavailable fault.
154 *
155 * It requires to be called with preemption disabled.
156 */
kvmppc_load_guest_fp(struct kvm_vcpu * vcpu)157 static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu)
158 {
159 #ifdef CONFIG_PPC_FPU
160 if (!(current->thread.regs->msr & MSR_FP)) {
161 enable_kernel_fp();
162 load_fp_state(&vcpu->arch.fp);
163 disable_kernel_fp();
164 current->thread.fp_save_area = &vcpu->arch.fp;
165 current->thread.regs->msr |= MSR_FP;
166 }
167 #endif
168 }
169
170 /*
171 * Save guest vcpu FP state into thread.
172 * It requires to be called with preemption disabled.
173 */
kvmppc_save_guest_fp(struct kvm_vcpu * vcpu)174 static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu)
175 {
176 #ifdef CONFIG_PPC_FPU
177 if (current->thread.regs->msr & MSR_FP)
178 giveup_fpu(current);
179 current->thread.fp_save_area = NULL;
180 #endif
181 }
182
kvmppc_vcpu_sync_fpu(struct kvm_vcpu * vcpu)183 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
184 {
185 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
186 /* We always treat the FP bit as enabled from the host
187 perspective, so only need to adjust the shadow MSR */
188 vcpu->arch.shadow_msr &= ~MSR_FP;
189 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
190 #endif
191 }
192
193 /*
194 * Simulate AltiVec unavailable fault to load guest state
195 * from thread to AltiVec unit.
196 * It requires to be called with preemption disabled.
197 */
kvmppc_load_guest_altivec(struct kvm_vcpu * vcpu)198 static inline void kvmppc_load_guest_altivec(struct kvm_vcpu *vcpu)
199 {
200 #ifdef CONFIG_ALTIVEC
201 if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
202 if (!(current->thread.regs->msr & MSR_VEC)) {
203 enable_kernel_altivec();
204 load_vr_state(&vcpu->arch.vr);
205 disable_kernel_altivec();
206 current->thread.vr_save_area = &vcpu->arch.vr;
207 current->thread.regs->msr |= MSR_VEC;
208 }
209 }
210 #endif
211 }
212
213 /*
214 * Save guest vcpu AltiVec state into thread.
215 * It requires to be called with preemption disabled.
216 */
kvmppc_save_guest_altivec(struct kvm_vcpu * vcpu)217 static inline void kvmppc_save_guest_altivec(struct kvm_vcpu *vcpu)
218 {
219 #ifdef CONFIG_ALTIVEC
220 if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
221 if (current->thread.regs->msr & MSR_VEC)
222 giveup_altivec(current);
223 current->thread.vr_save_area = NULL;
224 }
225 #endif
226 }
227
kvmppc_vcpu_sync_debug(struct kvm_vcpu * vcpu)228 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
229 {
230 /* Synchronize guest's desire to get debug interrupts into shadow MSR */
231 #ifndef CONFIG_KVM_BOOKE_HV
232 vcpu->arch.shadow_msr &= ~MSR_DE;
233 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
234 #endif
235
236 /* Force enable debug interrupts when user space wants to debug */
237 if (vcpu->guest_debug) {
238 #ifdef CONFIG_KVM_BOOKE_HV
239 /*
240 * Since there is no shadow MSR, sync MSR_DE into the guest
241 * visible MSR.
242 */
243 vcpu->arch.shared->msr |= MSR_DE;
244 #else
245 vcpu->arch.shadow_msr |= MSR_DE;
246 vcpu->arch.shared->msr &= ~MSR_DE;
247 #endif
248 }
249 }
250
251 /*
252 * Helper function for "full" MSR writes. No need to call this if only
253 * EE/CE/ME/DE/RI are changing.
254 */
kvmppc_set_msr(struct kvm_vcpu * vcpu,u32 new_msr)255 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
256 {
257 u32 old_msr = vcpu->arch.shared->msr;
258
259 #ifdef CONFIG_KVM_BOOKE_HV
260 new_msr |= MSR_GS;
261 #endif
262
263 vcpu->arch.shared->msr = new_msr;
264
265 kvmppc_mmu_msr_notify(vcpu, old_msr);
266 kvmppc_vcpu_sync_spe(vcpu);
267 kvmppc_vcpu_sync_fpu(vcpu);
268 kvmppc_vcpu_sync_debug(vcpu);
269 }
270
kvmppc_booke_queue_irqprio(struct kvm_vcpu * vcpu,unsigned int priority)271 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
272 unsigned int priority)
273 {
274 trace_kvm_booke_queue_irqprio(vcpu, priority);
275 set_bit(priority, &vcpu->arch.pending_exceptions);
276 }
277
kvmppc_core_queue_dtlb_miss(struct kvm_vcpu * vcpu,ulong dear_flags,ulong esr_flags)278 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
279 ulong dear_flags, ulong esr_flags)
280 {
281 vcpu->arch.queued_dear = dear_flags;
282 vcpu->arch.queued_esr = esr_flags;
283 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
284 }
285
kvmppc_core_queue_data_storage(struct kvm_vcpu * vcpu,ulong dear_flags,ulong esr_flags)286 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
287 ulong dear_flags, ulong esr_flags)
288 {
289 vcpu->arch.queued_dear = dear_flags;
290 vcpu->arch.queued_esr = esr_flags;
291 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
292 }
293
kvmppc_core_queue_itlb_miss(struct kvm_vcpu * vcpu)294 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu)
295 {
296 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
297 }
298
kvmppc_core_queue_inst_storage(struct kvm_vcpu * vcpu,ulong esr_flags)299 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags)
300 {
301 vcpu->arch.queued_esr = esr_flags;
302 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
303 }
304
kvmppc_core_queue_alignment(struct kvm_vcpu * vcpu,ulong dear_flags,ulong esr_flags)305 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
306 ulong esr_flags)
307 {
308 vcpu->arch.queued_dear = dear_flags;
309 vcpu->arch.queued_esr = esr_flags;
310 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
311 }
312
kvmppc_core_queue_program(struct kvm_vcpu * vcpu,ulong esr_flags)313 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
314 {
315 vcpu->arch.queued_esr = esr_flags;
316 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
317 }
318
kvmppc_core_queue_fpunavail(struct kvm_vcpu * vcpu)319 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
320 {
321 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
322 }
323
324 #ifdef CONFIG_ALTIVEC
kvmppc_core_queue_vec_unavail(struct kvm_vcpu * vcpu)325 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
326 {
327 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
328 }
329 #endif
330
kvmppc_core_queue_dec(struct kvm_vcpu * vcpu)331 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
332 {
333 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
334 }
335
kvmppc_core_pending_dec(struct kvm_vcpu * vcpu)336 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
337 {
338 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
339 }
340
kvmppc_core_dequeue_dec(struct kvm_vcpu * vcpu)341 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
342 {
343 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
344 }
345
kvmppc_core_queue_external(struct kvm_vcpu * vcpu,struct kvm_interrupt * irq)346 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
347 struct kvm_interrupt *irq)
348 {
349 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
350
351 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
352 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
353
354 kvmppc_booke_queue_irqprio(vcpu, prio);
355 }
356
kvmppc_core_dequeue_external(struct kvm_vcpu * vcpu)357 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
358 {
359 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
360 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
361 }
362
kvmppc_core_queue_watchdog(struct kvm_vcpu * vcpu)363 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
364 {
365 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
366 }
367
kvmppc_core_dequeue_watchdog(struct kvm_vcpu * vcpu)368 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
369 {
370 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
371 }
372
kvmppc_core_queue_debug(struct kvm_vcpu * vcpu)373 void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu)
374 {
375 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG);
376 }
377
kvmppc_core_dequeue_debug(struct kvm_vcpu * vcpu)378 void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu)
379 {
380 clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions);
381 }
382
set_guest_srr(struct kvm_vcpu * vcpu,unsigned long srr0,u32 srr1)383 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
384 {
385 kvmppc_set_srr0(vcpu, srr0);
386 kvmppc_set_srr1(vcpu, srr1);
387 }
388
set_guest_csrr(struct kvm_vcpu * vcpu,unsigned long srr0,u32 srr1)389 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
390 {
391 vcpu->arch.csrr0 = srr0;
392 vcpu->arch.csrr1 = srr1;
393 }
394
set_guest_dsrr(struct kvm_vcpu * vcpu,unsigned long srr0,u32 srr1)395 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
396 {
397 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
398 vcpu->arch.dsrr0 = srr0;
399 vcpu->arch.dsrr1 = srr1;
400 } else {
401 set_guest_csrr(vcpu, srr0, srr1);
402 }
403 }
404
set_guest_mcsrr(struct kvm_vcpu * vcpu,unsigned long srr0,u32 srr1)405 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
406 {
407 vcpu->arch.mcsrr0 = srr0;
408 vcpu->arch.mcsrr1 = srr1;
409 }
410
411 /* Deliver the interrupt of the corresponding priority, if possible. */
kvmppc_booke_irqprio_deliver(struct kvm_vcpu * vcpu,unsigned int priority)412 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
413 unsigned int priority)
414 {
415 int allowed = 0;
416 ulong msr_mask = 0;
417 bool update_esr = false, update_dear = false, update_epr = false;
418 ulong crit_raw = vcpu->arch.shared->critical;
419 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
420 bool crit;
421 bool keep_irq = false;
422 enum int_class int_class;
423 ulong new_msr = vcpu->arch.shared->msr;
424
425 /* Truncate crit indicators in 32 bit mode */
426 if (!(vcpu->arch.shared->msr & MSR_SF)) {
427 crit_raw &= 0xffffffff;
428 crit_r1 &= 0xffffffff;
429 }
430
431 /* Critical section when crit == r1 */
432 crit = (crit_raw == crit_r1);
433 /* ... and we're in supervisor mode */
434 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
435
436 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
437 priority = BOOKE_IRQPRIO_EXTERNAL;
438 keep_irq = true;
439 }
440
441 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
442 update_epr = true;
443
444 switch (priority) {
445 case BOOKE_IRQPRIO_DTLB_MISS:
446 case BOOKE_IRQPRIO_DATA_STORAGE:
447 case BOOKE_IRQPRIO_ALIGNMENT:
448 update_dear = true;
449 fallthrough;
450 case BOOKE_IRQPRIO_INST_STORAGE:
451 case BOOKE_IRQPRIO_PROGRAM:
452 update_esr = true;
453 fallthrough;
454 case BOOKE_IRQPRIO_ITLB_MISS:
455 case BOOKE_IRQPRIO_SYSCALL:
456 case BOOKE_IRQPRIO_FP_UNAVAIL:
457 #ifdef CONFIG_SPE_POSSIBLE
458 case BOOKE_IRQPRIO_SPE_UNAVAIL:
459 case BOOKE_IRQPRIO_SPE_FP_DATA:
460 case BOOKE_IRQPRIO_SPE_FP_ROUND:
461 #endif
462 #ifdef CONFIG_ALTIVEC
463 case BOOKE_IRQPRIO_ALTIVEC_UNAVAIL:
464 case BOOKE_IRQPRIO_ALTIVEC_ASSIST:
465 #endif
466 case BOOKE_IRQPRIO_AP_UNAVAIL:
467 allowed = 1;
468 msr_mask = MSR_CE | MSR_ME | MSR_DE;
469 int_class = INT_CLASS_NONCRIT;
470 break;
471 case BOOKE_IRQPRIO_WATCHDOG:
472 case BOOKE_IRQPRIO_CRITICAL:
473 case BOOKE_IRQPRIO_DBELL_CRIT:
474 allowed = vcpu->arch.shared->msr & MSR_CE;
475 allowed = allowed && !crit;
476 msr_mask = MSR_ME;
477 int_class = INT_CLASS_CRIT;
478 break;
479 case BOOKE_IRQPRIO_MACHINE_CHECK:
480 allowed = vcpu->arch.shared->msr & MSR_ME;
481 allowed = allowed && !crit;
482 int_class = INT_CLASS_MC;
483 break;
484 case BOOKE_IRQPRIO_DECREMENTER:
485 case BOOKE_IRQPRIO_FIT:
486 keep_irq = true;
487 fallthrough;
488 case BOOKE_IRQPRIO_EXTERNAL:
489 case BOOKE_IRQPRIO_DBELL:
490 allowed = vcpu->arch.shared->msr & MSR_EE;
491 allowed = allowed && !crit;
492 msr_mask = MSR_CE | MSR_ME | MSR_DE;
493 int_class = INT_CLASS_NONCRIT;
494 break;
495 case BOOKE_IRQPRIO_DEBUG:
496 allowed = vcpu->arch.shared->msr & MSR_DE;
497 allowed = allowed && !crit;
498 msr_mask = MSR_ME;
499 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
500 int_class = INT_CLASS_DBG;
501 else
502 int_class = INT_CLASS_CRIT;
503
504 break;
505 }
506
507 if (allowed) {
508 switch (int_class) {
509 case INT_CLASS_NONCRIT:
510 set_guest_srr(vcpu, vcpu->arch.regs.nip,
511 vcpu->arch.shared->msr);
512 break;
513 case INT_CLASS_CRIT:
514 set_guest_csrr(vcpu, vcpu->arch.regs.nip,
515 vcpu->arch.shared->msr);
516 break;
517 case INT_CLASS_DBG:
518 set_guest_dsrr(vcpu, vcpu->arch.regs.nip,
519 vcpu->arch.shared->msr);
520 break;
521 case INT_CLASS_MC:
522 set_guest_mcsrr(vcpu, vcpu->arch.regs.nip,
523 vcpu->arch.shared->msr);
524 break;
525 }
526
527 vcpu->arch.regs.nip = vcpu->arch.ivpr |
528 vcpu->arch.ivor[priority];
529 if (update_esr)
530 kvmppc_set_esr(vcpu, vcpu->arch.queued_esr);
531 if (update_dear)
532 kvmppc_set_dar(vcpu, vcpu->arch.queued_dear);
533 if (update_epr) {
534 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
535 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
536 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
537 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
538 kvmppc_mpic_set_epr(vcpu);
539 }
540 }
541
542 new_msr &= msr_mask;
543 #if defined(CONFIG_64BIT)
544 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
545 new_msr |= MSR_CM;
546 #endif
547 kvmppc_set_msr(vcpu, new_msr);
548
549 if (!keep_irq)
550 clear_bit(priority, &vcpu->arch.pending_exceptions);
551 }
552
553 #ifdef CONFIG_KVM_BOOKE_HV
554 /*
555 * If an interrupt is pending but masked, raise a guest doorbell
556 * so that we are notified when the guest enables the relevant
557 * MSR bit.
558 */
559 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
560 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
561 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
562 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
563 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
564 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
565 #endif
566
567 return allowed;
568 }
569
570 /*
571 * Return the number of jiffies until the next timeout. If the timeout is
572 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
573 * because the larger value can break the timer APIs.
574 */
watchdog_next_timeout(struct kvm_vcpu * vcpu)575 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
576 {
577 u64 tb, wdt_tb, wdt_ticks = 0;
578 u64 nr_jiffies = 0;
579 u32 period = TCR_GET_WP(vcpu->arch.tcr);
580
581 wdt_tb = 1ULL << (63 - period);
582 tb = get_tb();
583 /*
584 * The watchdog timeout will hapeen when TB bit corresponding
585 * to watchdog will toggle from 0 to 1.
586 */
587 if (tb & wdt_tb)
588 wdt_ticks = wdt_tb;
589
590 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
591
592 /* Convert timebase ticks to jiffies */
593 nr_jiffies = wdt_ticks;
594
595 if (do_div(nr_jiffies, tb_ticks_per_jiffy))
596 nr_jiffies++;
597
598 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
599 }
600
arm_next_watchdog(struct kvm_vcpu * vcpu)601 static void arm_next_watchdog(struct kvm_vcpu *vcpu)
602 {
603 unsigned long nr_jiffies;
604 unsigned long flags;
605
606 /*
607 * If TSR_ENW and TSR_WIS are not set then no need to exit to
608 * userspace, so clear the KVM_REQ_WATCHDOG request.
609 */
610 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
611 kvm_clear_request(KVM_REQ_WATCHDOG, vcpu);
612
613 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
614 nr_jiffies = watchdog_next_timeout(vcpu);
615 /*
616 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
617 * then do not run the watchdog timer as this can break timer APIs.
618 */
619 if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
620 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
621 else
622 del_timer(&vcpu->arch.wdt_timer);
623 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
624 }
625
kvmppc_watchdog_func(struct timer_list * t)626 void kvmppc_watchdog_func(struct timer_list *t)
627 {
628 struct kvm_vcpu *vcpu = from_timer(vcpu, t, arch.wdt_timer);
629 u32 tsr, new_tsr;
630 int final;
631
632 do {
633 new_tsr = tsr = vcpu->arch.tsr;
634 final = 0;
635
636 /* Time out event */
637 if (tsr & TSR_ENW) {
638 if (tsr & TSR_WIS)
639 final = 1;
640 else
641 new_tsr = tsr | TSR_WIS;
642 } else {
643 new_tsr = tsr | TSR_ENW;
644 }
645 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
646
647 if (new_tsr & TSR_WIS) {
648 smp_wmb();
649 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
650 kvm_vcpu_kick(vcpu);
651 }
652
653 /*
654 * If this is final watchdog expiry and some action is required
655 * then exit to userspace.
656 */
657 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
658 vcpu->arch.watchdog_enabled) {
659 smp_wmb();
660 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
661 kvm_vcpu_kick(vcpu);
662 }
663
664 /*
665 * Stop running the watchdog timer after final expiration to
666 * prevent the host from being flooded with timers if the
667 * guest sets a short period.
668 * Timers will resume when TSR/TCR is updated next time.
669 */
670 if (!final)
671 arm_next_watchdog(vcpu);
672 }
673
update_timer_ints(struct kvm_vcpu * vcpu)674 static void update_timer_ints(struct kvm_vcpu *vcpu)
675 {
676 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
677 kvmppc_core_queue_dec(vcpu);
678 else
679 kvmppc_core_dequeue_dec(vcpu);
680
681 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
682 kvmppc_core_queue_watchdog(vcpu);
683 else
684 kvmppc_core_dequeue_watchdog(vcpu);
685 }
686
kvmppc_core_check_exceptions(struct kvm_vcpu * vcpu)687 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
688 {
689 unsigned long *pending = &vcpu->arch.pending_exceptions;
690 unsigned int priority;
691
692 priority = __ffs(*pending);
693 while (priority < BOOKE_IRQPRIO_MAX) {
694 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
695 break;
696
697 priority = find_next_bit(pending,
698 BITS_PER_BYTE * sizeof(*pending),
699 priority + 1);
700 }
701
702 /* Tell the guest about our interrupt status */
703 vcpu->arch.shared->int_pending = !!*pending;
704 }
705
706 /* Check pending exceptions and deliver one, if possible. */
kvmppc_core_prepare_to_enter(struct kvm_vcpu * vcpu)707 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
708 {
709 int r = 0;
710 WARN_ON_ONCE(!irqs_disabled());
711
712 kvmppc_core_check_exceptions(vcpu);
713
714 if (kvm_request_pending(vcpu)) {
715 /* Exception delivery raised request; start over */
716 return 1;
717 }
718
719 if (vcpu->arch.shared->msr & MSR_WE) {
720 local_irq_enable();
721 kvm_vcpu_block(vcpu);
722 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
723 hard_irq_disable();
724
725 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
726 r = 1;
727 }
728
729 return r;
730 }
731
kvmppc_core_check_requests(struct kvm_vcpu * vcpu)732 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
733 {
734 int r = 1; /* Indicate we want to get back into the guest */
735
736 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
737 update_timer_ints(vcpu);
738 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
739 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
740 kvmppc_core_flush_tlb(vcpu);
741 #endif
742
743 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
744 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
745 r = 0;
746 }
747
748 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
749 vcpu->run->epr.epr = 0;
750 vcpu->arch.epr_needed = true;
751 vcpu->run->exit_reason = KVM_EXIT_EPR;
752 r = 0;
753 }
754
755 return r;
756 }
757
kvmppc_vcpu_run(struct kvm_vcpu * vcpu)758 int kvmppc_vcpu_run(struct kvm_vcpu *vcpu)
759 {
760 int ret, s;
761 struct debug_reg debug;
762
763 if (!vcpu->arch.sane) {
764 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
765 return -EINVAL;
766 }
767
768 s = kvmppc_prepare_to_enter(vcpu);
769 if (s <= 0) {
770 ret = s;
771 goto out;
772 }
773 /* interrupts now hard-disabled */
774
775 #ifdef CONFIG_PPC_FPU
776 /* Save userspace FPU state in stack */
777 enable_kernel_fp();
778
779 /*
780 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
781 * as always using the FPU.
782 */
783 kvmppc_load_guest_fp(vcpu);
784 #endif
785
786 #ifdef CONFIG_ALTIVEC
787 /* Save userspace AltiVec state in stack */
788 if (cpu_has_feature(CPU_FTR_ALTIVEC))
789 enable_kernel_altivec();
790 /*
791 * Since we can't trap on MSR_VEC in GS-mode, we consider the guest
792 * as always using the AltiVec.
793 */
794 kvmppc_load_guest_altivec(vcpu);
795 #endif
796
797 /* Switch to guest debug context */
798 debug = vcpu->arch.dbg_reg;
799 switch_booke_debug_regs(&debug);
800 debug = current->thread.debug;
801 current->thread.debug = vcpu->arch.dbg_reg;
802
803 vcpu->arch.pgdir = vcpu->kvm->mm->pgd;
804 kvmppc_fix_ee_before_entry();
805
806 ret = __kvmppc_vcpu_run(vcpu);
807
808 /* No need for guest_exit. It's done in handle_exit.
809 We also get here with interrupts enabled. */
810
811 /* Switch back to user space debug context */
812 switch_booke_debug_regs(&debug);
813 current->thread.debug = debug;
814
815 #ifdef CONFIG_PPC_FPU
816 kvmppc_save_guest_fp(vcpu);
817 #endif
818
819 #ifdef CONFIG_ALTIVEC
820 kvmppc_save_guest_altivec(vcpu);
821 #endif
822
823 out:
824 vcpu->mode = OUTSIDE_GUEST_MODE;
825 return ret;
826 }
827
emulation_exit(struct kvm_vcpu * vcpu)828 static int emulation_exit(struct kvm_vcpu *vcpu)
829 {
830 enum emulation_result er;
831
832 er = kvmppc_emulate_instruction(vcpu);
833 switch (er) {
834 case EMULATE_DONE:
835 /* don't overwrite subtypes, just account kvm_stats */
836 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
837 /* Future optimization: only reload non-volatiles if
838 * they were actually modified by emulation. */
839 return RESUME_GUEST_NV;
840
841 case EMULATE_AGAIN:
842 return RESUME_GUEST;
843
844 case EMULATE_FAIL:
845 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
846 __func__, vcpu->arch.regs.nip, vcpu->arch.last_inst);
847 /* For debugging, encode the failing instruction and
848 * report it to userspace. */
849 vcpu->run->hw.hardware_exit_reason = ~0ULL << 32;
850 vcpu->run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
851 kvmppc_core_queue_program(vcpu, ESR_PIL);
852 return RESUME_HOST;
853
854 case EMULATE_EXIT_USER:
855 return RESUME_HOST;
856
857 default:
858 BUG();
859 }
860 }
861
kvmppc_handle_debug(struct kvm_vcpu * vcpu)862 static int kvmppc_handle_debug(struct kvm_vcpu *vcpu)
863 {
864 struct kvm_run *run = vcpu->run;
865 struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg);
866 u32 dbsr = vcpu->arch.dbsr;
867
868 if (vcpu->guest_debug == 0) {
869 /*
870 * Debug resources belong to Guest.
871 * Imprecise debug event is not injected
872 */
873 if (dbsr & DBSR_IDE) {
874 dbsr &= ~DBSR_IDE;
875 if (!dbsr)
876 return RESUME_GUEST;
877 }
878
879 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) &&
880 (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM))
881 kvmppc_core_queue_debug(vcpu);
882
883 /* Inject a program interrupt if trap debug is not allowed */
884 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE))
885 kvmppc_core_queue_program(vcpu, ESR_PTR);
886
887 return RESUME_GUEST;
888 }
889
890 /*
891 * Debug resource owned by userspace.
892 * Clear guest dbsr (vcpu->arch.dbsr)
893 */
894 vcpu->arch.dbsr = 0;
895 run->debug.arch.status = 0;
896 run->debug.arch.address = vcpu->arch.regs.nip;
897
898 if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) {
899 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
900 } else {
901 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W))
902 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
903 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R))
904 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
905 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W))
906 run->debug.arch.address = dbg_reg->dac1;
907 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W))
908 run->debug.arch.address = dbg_reg->dac2;
909 }
910
911 return RESUME_HOST;
912 }
913
kvmppc_fill_pt_regs(struct pt_regs * regs)914 static void kvmppc_fill_pt_regs(struct pt_regs *regs)
915 {
916 ulong r1, ip, msr, lr;
917
918 asm("mr %0, 1" : "=r"(r1));
919 asm("mflr %0" : "=r"(lr));
920 asm("mfmsr %0" : "=r"(msr));
921 asm("bl 1f; 1: mflr %0" : "=r"(ip));
922
923 memset(regs, 0, sizeof(*regs));
924 regs->gpr[1] = r1;
925 regs->nip = ip;
926 regs->msr = msr;
927 regs->link = lr;
928 }
929
930 /*
931 * For interrupts needed to be handled by host interrupt handlers,
932 * corresponding host handler are called from here in similar way
933 * (but not exact) as they are called from low level handler
934 * (such as from arch/powerpc/kernel/head_fsl_booke.S).
935 */
kvmppc_restart_interrupt(struct kvm_vcpu * vcpu,unsigned int exit_nr)936 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
937 unsigned int exit_nr)
938 {
939 struct pt_regs regs;
940
941 switch (exit_nr) {
942 case BOOKE_INTERRUPT_EXTERNAL:
943 kvmppc_fill_pt_regs(®s);
944 do_IRQ(®s);
945 break;
946 case BOOKE_INTERRUPT_DECREMENTER:
947 kvmppc_fill_pt_regs(®s);
948 timer_interrupt(®s);
949 break;
950 #if defined(CONFIG_PPC_DOORBELL)
951 case BOOKE_INTERRUPT_DOORBELL:
952 kvmppc_fill_pt_regs(®s);
953 doorbell_exception(®s);
954 break;
955 #endif
956 case BOOKE_INTERRUPT_MACHINE_CHECK:
957 /* FIXME */
958 break;
959 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
960 kvmppc_fill_pt_regs(®s);
961 performance_monitor_exception(®s);
962 break;
963 case BOOKE_INTERRUPT_WATCHDOG:
964 kvmppc_fill_pt_regs(®s);
965 #ifdef CONFIG_BOOKE_WDT
966 WatchdogException(®s);
967 #else
968 unknown_exception(®s);
969 #endif
970 break;
971 case BOOKE_INTERRUPT_CRITICAL:
972 kvmppc_fill_pt_regs(®s);
973 unknown_exception(®s);
974 break;
975 case BOOKE_INTERRUPT_DEBUG:
976 /* Save DBSR before preemption is enabled */
977 vcpu->arch.dbsr = mfspr(SPRN_DBSR);
978 kvmppc_clear_dbsr();
979 break;
980 }
981 }
982
kvmppc_resume_inst_load(struct kvm_vcpu * vcpu,enum emulation_result emulated,u32 last_inst)983 static int kvmppc_resume_inst_load(struct kvm_vcpu *vcpu,
984 enum emulation_result emulated, u32 last_inst)
985 {
986 switch (emulated) {
987 case EMULATE_AGAIN:
988 return RESUME_GUEST;
989
990 case EMULATE_FAIL:
991 pr_debug("%s: load instruction from guest address %lx failed\n",
992 __func__, vcpu->arch.regs.nip);
993 /* For debugging, encode the failing instruction and
994 * report it to userspace. */
995 vcpu->run->hw.hardware_exit_reason = ~0ULL << 32;
996 vcpu->run->hw.hardware_exit_reason |= last_inst;
997 kvmppc_core_queue_program(vcpu, ESR_PIL);
998 return RESUME_HOST;
999
1000 default:
1001 BUG();
1002 }
1003 }
1004
1005 /**
1006 * kvmppc_handle_exit
1007 *
1008 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
1009 */
kvmppc_handle_exit(struct kvm_vcpu * vcpu,unsigned int exit_nr)1010 int kvmppc_handle_exit(struct kvm_vcpu *vcpu, unsigned int exit_nr)
1011 {
1012 struct kvm_run *run = vcpu->run;
1013 int r = RESUME_HOST;
1014 int s;
1015 int idx;
1016 u32 last_inst = KVM_INST_FETCH_FAILED;
1017 enum emulation_result emulated = EMULATE_DONE;
1018
1019 /* update before a new last_exit_type is rewritten */
1020 kvmppc_update_timing_stats(vcpu);
1021
1022 /* restart interrupts if they were meant for the host */
1023 kvmppc_restart_interrupt(vcpu, exit_nr);
1024
1025 /*
1026 * get last instruction before being preempted
1027 * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA
1028 */
1029 switch (exit_nr) {
1030 case BOOKE_INTERRUPT_DATA_STORAGE:
1031 case BOOKE_INTERRUPT_DTLB_MISS:
1032 case BOOKE_INTERRUPT_HV_PRIV:
1033 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1034 break;
1035 case BOOKE_INTERRUPT_PROGRAM:
1036 /* SW breakpoints arrive as illegal instructions on HV */
1037 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
1038 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1039 break;
1040 default:
1041 break;
1042 }
1043
1044 trace_kvm_exit(exit_nr, vcpu);
1045
1046 context_tracking_guest_exit();
1047 if (!vtime_accounting_enabled_this_cpu()) {
1048 local_irq_enable();
1049 /*
1050 * Service IRQs here before vtime_account_guest_exit() so any
1051 * ticks that occurred while running the guest are accounted to
1052 * the guest. If vtime accounting is enabled, accounting uses
1053 * TB rather than ticks, so it can be done without enabling
1054 * interrupts here, which has the problem that it accounts
1055 * interrupt processing overhead to the host.
1056 */
1057 local_irq_disable();
1058 }
1059 vtime_account_guest_exit();
1060
1061 local_irq_enable();
1062
1063 run->exit_reason = KVM_EXIT_UNKNOWN;
1064 run->ready_for_interrupt_injection = 1;
1065
1066 if (emulated != EMULATE_DONE) {
1067 r = kvmppc_resume_inst_load(vcpu, emulated, last_inst);
1068 goto out;
1069 }
1070
1071 switch (exit_nr) {
1072 case BOOKE_INTERRUPT_MACHINE_CHECK:
1073 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
1074 kvmppc_dump_vcpu(vcpu);
1075 /* For debugging, send invalid exit reason to user space */
1076 run->hw.hardware_exit_reason = ~1ULL << 32;
1077 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
1078 r = RESUME_HOST;
1079 break;
1080
1081 case BOOKE_INTERRUPT_EXTERNAL:
1082 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1083 r = RESUME_GUEST;
1084 break;
1085
1086 case BOOKE_INTERRUPT_DECREMENTER:
1087 kvmppc_account_exit(vcpu, DEC_EXITS);
1088 r = RESUME_GUEST;
1089 break;
1090
1091 case BOOKE_INTERRUPT_WATCHDOG:
1092 r = RESUME_GUEST;
1093 break;
1094
1095 case BOOKE_INTERRUPT_DOORBELL:
1096 kvmppc_account_exit(vcpu, DBELL_EXITS);
1097 r = RESUME_GUEST;
1098 break;
1099
1100 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
1101 kvmppc_account_exit(vcpu, GDBELL_EXITS);
1102
1103 /*
1104 * We are here because there is a pending guest interrupt
1105 * which could not be delivered as MSR_CE or MSR_ME was not
1106 * set. Once we break from here we will retry delivery.
1107 */
1108 r = RESUME_GUEST;
1109 break;
1110
1111 case BOOKE_INTERRUPT_GUEST_DBELL:
1112 kvmppc_account_exit(vcpu, GDBELL_EXITS);
1113
1114 /*
1115 * We are here because there is a pending guest interrupt
1116 * which could not be delivered as MSR_EE was not set. Once
1117 * we break from here we will retry delivery.
1118 */
1119 r = RESUME_GUEST;
1120 break;
1121
1122 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
1123 r = RESUME_GUEST;
1124 break;
1125
1126 case BOOKE_INTERRUPT_HV_PRIV:
1127 r = emulation_exit(vcpu);
1128 break;
1129
1130 case BOOKE_INTERRUPT_PROGRAM:
1131 if ((vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) &&
1132 (last_inst == KVMPPC_INST_SW_BREAKPOINT)) {
1133 /*
1134 * We are here because of an SW breakpoint instr,
1135 * so lets return to host to handle.
1136 */
1137 r = kvmppc_handle_debug(vcpu);
1138 run->exit_reason = KVM_EXIT_DEBUG;
1139 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1140 break;
1141 }
1142
1143 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
1144 /*
1145 * Program traps generated by user-level software must
1146 * be handled by the guest kernel.
1147 *
1148 * In GS mode, hypervisor privileged instructions trap
1149 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
1150 * actual program interrupts, handled by the guest.
1151 */
1152 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
1153 r = RESUME_GUEST;
1154 kvmppc_account_exit(vcpu, USR_PR_INST);
1155 break;
1156 }
1157
1158 r = emulation_exit(vcpu);
1159 break;
1160
1161 case BOOKE_INTERRUPT_FP_UNAVAIL:
1162 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
1163 kvmppc_account_exit(vcpu, FP_UNAVAIL);
1164 r = RESUME_GUEST;
1165 break;
1166
1167 #ifdef CONFIG_SPE
1168 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
1169 if (vcpu->arch.shared->msr & MSR_SPE)
1170 kvmppc_vcpu_enable_spe(vcpu);
1171 else
1172 kvmppc_booke_queue_irqprio(vcpu,
1173 BOOKE_IRQPRIO_SPE_UNAVAIL);
1174 r = RESUME_GUEST;
1175 break;
1176 }
1177
1178 case BOOKE_INTERRUPT_SPE_FP_DATA:
1179 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
1180 r = RESUME_GUEST;
1181 break;
1182
1183 case BOOKE_INTERRUPT_SPE_FP_ROUND:
1184 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
1185 r = RESUME_GUEST;
1186 break;
1187 #elif defined(CONFIG_SPE_POSSIBLE)
1188 case BOOKE_INTERRUPT_SPE_UNAVAIL:
1189 /*
1190 * Guest wants SPE, but host kernel doesn't support it. Send
1191 * an "unimplemented operation" program check to the guest.
1192 */
1193 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
1194 r = RESUME_GUEST;
1195 break;
1196
1197 /*
1198 * These really should never happen without CONFIG_SPE,
1199 * as we should never enable the real MSR[SPE] in the guest.
1200 */
1201 case BOOKE_INTERRUPT_SPE_FP_DATA:
1202 case BOOKE_INTERRUPT_SPE_FP_ROUND:
1203 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
1204 __func__, exit_nr, vcpu->arch.regs.nip);
1205 run->hw.hardware_exit_reason = exit_nr;
1206 r = RESUME_HOST;
1207 break;
1208 #endif /* CONFIG_SPE_POSSIBLE */
1209
1210 /*
1211 * On cores with Vector category, KVM is loaded only if CONFIG_ALTIVEC,
1212 * see kvmppc_core_check_processor_compat().
1213 */
1214 #ifdef CONFIG_ALTIVEC
1215 case BOOKE_INTERRUPT_ALTIVEC_UNAVAIL:
1216 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
1217 r = RESUME_GUEST;
1218 break;
1219
1220 case BOOKE_INTERRUPT_ALTIVEC_ASSIST:
1221 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_ASSIST);
1222 r = RESUME_GUEST;
1223 break;
1224 #endif
1225
1226 case BOOKE_INTERRUPT_DATA_STORAGE:
1227 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
1228 vcpu->arch.fault_esr);
1229 kvmppc_account_exit(vcpu, DSI_EXITS);
1230 r = RESUME_GUEST;
1231 break;
1232
1233 case BOOKE_INTERRUPT_INST_STORAGE:
1234 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1235 kvmppc_account_exit(vcpu, ISI_EXITS);
1236 r = RESUME_GUEST;
1237 break;
1238
1239 case BOOKE_INTERRUPT_ALIGNMENT:
1240 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1241 vcpu->arch.fault_esr);
1242 r = RESUME_GUEST;
1243 break;
1244
1245 #ifdef CONFIG_KVM_BOOKE_HV
1246 case BOOKE_INTERRUPT_HV_SYSCALL:
1247 if (!(vcpu->arch.shared->msr & MSR_PR)) {
1248 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1249 } else {
1250 /*
1251 * hcall from guest userspace -- send privileged
1252 * instruction program check.
1253 */
1254 kvmppc_core_queue_program(vcpu, ESR_PPR);
1255 }
1256
1257 r = RESUME_GUEST;
1258 break;
1259 #else
1260 case BOOKE_INTERRUPT_SYSCALL:
1261 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1262 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1263 /* KVM PV hypercalls */
1264 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1265 r = RESUME_GUEST;
1266 } else {
1267 /* Guest syscalls */
1268 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1269 }
1270 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1271 r = RESUME_GUEST;
1272 break;
1273 #endif
1274
1275 case BOOKE_INTERRUPT_DTLB_MISS: {
1276 unsigned long eaddr = vcpu->arch.fault_dear;
1277 int gtlb_index;
1278 gpa_t gpaddr;
1279 gfn_t gfn;
1280
1281 #ifdef CONFIG_KVM_E500V2
1282 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1283 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1284 kvmppc_map_magic(vcpu);
1285 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1286 r = RESUME_GUEST;
1287
1288 break;
1289 }
1290 #endif
1291
1292 /* Check the guest TLB. */
1293 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1294 if (gtlb_index < 0) {
1295 /* The guest didn't have a mapping for it. */
1296 kvmppc_core_queue_dtlb_miss(vcpu,
1297 vcpu->arch.fault_dear,
1298 vcpu->arch.fault_esr);
1299 kvmppc_mmu_dtlb_miss(vcpu);
1300 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1301 r = RESUME_GUEST;
1302 break;
1303 }
1304
1305 idx = srcu_read_lock(&vcpu->kvm->srcu);
1306
1307 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1308 gfn = gpaddr >> PAGE_SHIFT;
1309
1310 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1311 /* The guest TLB had a mapping, but the shadow TLB
1312 * didn't, and it is RAM. This could be because:
1313 * a) the entry is mapping the host kernel, or
1314 * b) the guest used a large mapping which we're faking
1315 * Either way, we need to satisfy the fault without
1316 * invoking the guest. */
1317 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1318 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1319 r = RESUME_GUEST;
1320 } else {
1321 /* Guest has mapped and accessed a page which is not
1322 * actually RAM. */
1323 vcpu->arch.paddr_accessed = gpaddr;
1324 vcpu->arch.vaddr_accessed = eaddr;
1325 r = kvmppc_emulate_mmio(vcpu);
1326 kvmppc_account_exit(vcpu, MMIO_EXITS);
1327 }
1328
1329 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1330 break;
1331 }
1332
1333 case BOOKE_INTERRUPT_ITLB_MISS: {
1334 unsigned long eaddr = vcpu->arch.regs.nip;
1335 gpa_t gpaddr;
1336 gfn_t gfn;
1337 int gtlb_index;
1338
1339 r = RESUME_GUEST;
1340
1341 /* Check the guest TLB. */
1342 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1343 if (gtlb_index < 0) {
1344 /* The guest didn't have a mapping for it. */
1345 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1346 kvmppc_mmu_itlb_miss(vcpu);
1347 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1348 break;
1349 }
1350
1351 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1352
1353 idx = srcu_read_lock(&vcpu->kvm->srcu);
1354
1355 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1356 gfn = gpaddr >> PAGE_SHIFT;
1357
1358 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1359 /* The guest TLB had a mapping, but the shadow TLB
1360 * didn't. This could be because:
1361 * a) the entry is mapping the host kernel, or
1362 * b) the guest used a large mapping which we're faking
1363 * Either way, we need to satisfy the fault without
1364 * invoking the guest. */
1365 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1366 } else {
1367 /* Guest mapped and leaped at non-RAM! */
1368 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1369 }
1370
1371 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1372 break;
1373 }
1374
1375 case BOOKE_INTERRUPT_DEBUG: {
1376 r = kvmppc_handle_debug(vcpu);
1377 if (r == RESUME_HOST)
1378 run->exit_reason = KVM_EXIT_DEBUG;
1379 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1380 break;
1381 }
1382
1383 default:
1384 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1385 BUG();
1386 }
1387
1388 out:
1389 /*
1390 * To avoid clobbering exit_reason, only check for signals if we
1391 * aren't already exiting to userspace for some other reason.
1392 */
1393 if (!(r & RESUME_HOST)) {
1394 s = kvmppc_prepare_to_enter(vcpu);
1395 if (s <= 0)
1396 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1397 else {
1398 /* interrupts now hard-disabled */
1399 kvmppc_fix_ee_before_entry();
1400 kvmppc_load_guest_fp(vcpu);
1401 kvmppc_load_guest_altivec(vcpu);
1402 }
1403 }
1404
1405 return r;
1406 }
1407
kvmppc_set_tsr(struct kvm_vcpu * vcpu,u32 new_tsr)1408 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1409 {
1410 u32 old_tsr = vcpu->arch.tsr;
1411
1412 vcpu->arch.tsr = new_tsr;
1413
1414 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1415 arm_next_watchdog(vcpu);
1416
1417 update_timer_ints(vcpu);
1418 }
1419
kvmppc_subarch_vcpu_init(struct kvm_vcpu * vcpu)1420 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1421 {
1422 /* setup watchdog timer once */
1423 spin_lock_init(&vcpu->arch.wdt_lock);
1424 timer_setup(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 0);
1425
1426 /*
1427 * Clear DBSR.MRR to avoid guest debug interrupt as
1428 * this is of host interest
1429 */
1430 mtspr(SPRN_DBSR, DBSR_MRR);
1431 return 0;
1432 }
1433
kvmppc_subarch_vcpu_uninit(struct kvm_vcpu * vcpu)1434 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1435 {
1436 del_timer_sync(&vcpu->arch.wdt_timer);
1437 }
1438
kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu * vcpu,struct kvm_regs * regs)1439 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1440 {
1441 int i;
1442
1443 vcpu_load(vcpu);
1444
1445 regs->pc = vcpu->arch.regs.nip;
1446 regs->cr = kvmppc_get_cr(vcpu);
1447 regs->ctr = vcpu->arch.regs.ctr;
1448 regs->lr = vcpu->arch.regs.link;
1449 regs->xer = kvmppc_get_xer(vcpu);
1450 regs->msr = vcpu->arch.shared->msr;
1451 regs->srr0 = kvmppc_get_srr0(vcpu);
1452 regs->srr1 = kvmppc_get_srr1(vcpu);
1453 regs->pid = vcpu->arch.pid;
1454 regs->sprg0 = kvmppc_get_sprg0(vcpu);
1455 regs->sprg1 = kvmppc_get_sprg1(vcpu);
1456 regs->sprg2 = kvmppc_get_sprg2(vcpu);
1457 regs->sprg3 = kvmppc_get_sprg3(vcpu);
1458 regs->sprg4 = kvmppc_get_sprg4(vcpu);
1459 regs->sprg5 = kvmppc_get_sprg5(vcpu);
1460 regs->sprg6 = kvmppc_get_sprg6(vcpu);
1461 regs->sprg7 = kvmppc_get_sprg7(vcpu);
1462
1463 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1464 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1465
1466 vcpu_put(vcpu);
1467 return 0;
1468 }
1469
kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu * vcpu,struct kvm_regs * regs)1470 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1471 {
1472 int i;
1473
1474 vcpu_load(vcpu);
1475
1476 vcpu->arch.regs.nip = regs->pc;
1477 kvmppc_set_cr(vcpu, regs->cr);
1478 vcpu->arch.regs.ctr = regs->ctr;
1479 vcpu->arch.regs.link = regs->lr;
1480 kvmppc_set_xer(vcpu, regs->xer);
1481 kvmppc_set_msr(vcpu, regs->msr);
1482 kvmppc_set_srr0(vcpu, regs->srr0);
1483 kvmppc_set_srr1(vcpu, regs->srr1);
1484 kvmppc_set_pid(vcpu, regs->pid);
1485 kvmppc_set_sprg0(vcpu, regs->sprg0);
1486 kvmppc_set_sprg1(vcpu, regs->sprg1);
1487 kvmppc_set_sprg2(vcpu, regs->sprg2);
1488 kvmppc_set_sprg3(vcpu, regs->sprg3);
1489 kvmppc_set_sprg4(vcpu, regs->sprg4);
1490 kvmppc_set_sprg5(vcpu, regs->sprg5);
1491 kvmppc_set_sprg6(vcpu, regs->sprg6);
1492 kvmppc_set_sprg7(vcpu, regs->sprg7);
1493
1494 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1495 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1496
1497 vcpu_put(vcpu);
1498 return 0;
1499 }
1500
get_sregs_base(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)1501 static void get_sregs_base(struct kvm_vcpu *vcpu,
1502 struct kvm_sregs *sregs)
1503 {
1504 u64 tb = get_tb();
1505
1506 sregs->u.e.features |= KVM_SREGS_E_BASE;
1507
1508 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1509 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1510 sregs->u.e.mcsr = vcpu->arch.mcsr;
1511 sregs->u.e.esr = kvmppc_get_esr(vcpu);
1512 sregs->u.e.dear = kvmppc_get_dar(vcpu);
1513 sregs->u.e.tsr = vcpu->arch.tsr;
1514 sregs->u.e.tcr = vcpu->arch.tcr;
1515 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1516 sregs->u.e.tb = tb;
1517 sregs->u.e.vrsave = vcpu->arch.vrsave;
1518 }
1519
set_sregs_base(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)1520 static int set_sregs_base(struct kvm_vcpu *vcpu,
1521 struct kvm_sregs *sregs)
1522 {
1523 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1524 return 0;
1525
1526 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1527 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1528 vcpu->arch.mcsr = sregs->u.e.mcsr;
1529 kvmppc_set_esr(vcpu, sregs->u.e.esr);
1530 kvmppc_set_dar(vcpu, sregs->u.e.dear);
1531 vcpu->arch.vrsave = sregs->u.e.vrsave;
1532 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1533
1534 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1535 vcpu->arch.dec = sregs->u.e.dec;
1536 kvmppc_emulate_dec(vcpu);
1537 }
1538
1539 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1540 kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1541
1542 return 0;
1543 }
1544
get_sregs_arch206(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)1545 static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1546 struct kvm_sregs *sregs)
1547 {
1548 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1549
1550 sregs->u.e.pir = vcpu->vcpu_id;
1551 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1552 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1553 sregs->u.e.decar = vcpu->arch.decar;
1554 sregs->u.e.ivpr = vcpu->arch.ivpr;
1555 }
1556
set_sregs_arch206(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)1557 static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1558 struct kvm_sregs *sregs)
1559 {
1560 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1561 return 0;
1562
1563 if (sregs->u.e.pir != vcpu->vcpu_id)
1564 return -EINVAL;
1565
1566 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1567 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1568 vcpu->arch.decar = sregs->u.e.decar;
1569 vcpu->arch.ivpr = sregs->u.e.ivpr;
1570
1571 return 0;
1572 }
1573
kvmppc_get_sregs_ivor(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)1574 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1575 {
1576 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1577
1578 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1579 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1580 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1581 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1582 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1583 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1584 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1585 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1586 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1587 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1588 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1589 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1590 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1591 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1592 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1593 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1594 return 0;
1595 }
1596
kvmppc_set_sregs_ivor(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)1597 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1598 {
1599 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1600 return 0;
1601
1602 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1603 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1604 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1605 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1606 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1607 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1608 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1609 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1610 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1611 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1612 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1613 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1614 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1615 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1616 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1617 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1618
1619 return 0;
1620 }
1621
kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)1622 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1623 struct kvm_sregs *sregs)
1624 {
1625 int ret;
1626
1627 vcpu_load(vcpu);
1628
1629 sregs->pvr = vcpu->arch.pvr;
1630
1631 get_sregs_base(vcpu, sregs);
1632 get_sregs_arch206(vcpu, sregs);
1633 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1634
1635 vcpu_put(vcpu);
1636 return ret;
1637 }
1638
kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)1639 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1640 struct kvm_sregs *sregs)
1641 {
1642 int ret = -EINVAL;
1643
1644 vcpu_load(vcpu);
1645 if (vcpu->arch.pvr != sregs->pvr)
1646 goto out;
1647
1648 ret = set_sregs_base(vcpu, sregs);
1649 if (ret < 0)
1650 goto out;
1651
1652 ret = set_sregs_arch206(vcpu, sregs);
1653 if (ret < 0)
1654 goto out;
1655
1656 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1657
1658 out:
1659 vcpu_put(vcpu);
1660 return ret;
1661 }
1662
kvmppc_get_one_reg(struct kvm_vcpu * vcpu,u64 id,union kvmppc_one_reg * val)1663 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
1664 union kvmppc_one_reg *val)
1665 {
1666 int r = 0;
1667
1668 switch (id) {
1669 case KVM_REG_PPC_IAC1:
1670 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1);
1671 break;
1672 case KVM_REG_PPC_IAC2:
1673 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2);
1674 break;
1675 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1676 case KVM_REG_PPC_IAC3:
1677 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3);
1678 break;
1679 case KVM_REG_PPC_IAC4:
1680 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4);
1681 break;
1682 #endif
1683 case KVM_REG_PPC_DAC1:
1684 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1);
1685 break;
1686 case KVM_REG_PPC_DAC2:
1687 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2);
1688 break;
1689 case KVM_REG_PPC_EPR: {
1690 u32 epr = kvmppc_get_epr(vcpu);
1691 *val = get_reg_val(id, epr);
1692 break;
1693 }
1694 #if defined(CONFIG_64BIT)
1695 case KVM_REG_PPC_EPCR:
1696 *val = get_reg_val(id, vcpu->arch.epcr);
1697 break;
1698 #endif
1699 case KVM_REG_PPC_TCR:
1700 *val = get_reg_val(id, vcpu->arch.tcr);
1701 break;
1702 case KVM_REG_PPC_TSR:
1703 *val = get_reg_val(id, vcpu->arch.tsr);
1704 break;
1705 case KVM_REG_PPC_DEBUG_INST:
1706 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1707 break;
1708 case KVM_REG_PPC_VRSAVE:
1709 *val = get_reg_val(id, vcpu->arch.vrsave);
1710 break;
1711 default:
1712 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
1713 break;
1714 }
1715
1716 return r;
1717 }
1718
kvmppc_set_one_reg(struct kvm_vcpu * vcpu,u64 id,union kvmppc_one_reg * val)1719 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
1720 union kvmppc_one_reg *val)
1721 {
1722 int r = 0;
1723
1724 switch (id) {
1725 case KVM_REG_PPC_IAC1:
1726 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val);
1727 break;
1728 case KVM_REG_PPC_IAC2:
1729 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val);
1730 break;
1731 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1732 case KVM_REG_PPC_IAC3:
1733 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val);
1734 break;
1735 case KVM_REG_PPC_IAC4:
1736 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val);
1737 break;
1738 #endif
1739 case KVM_REG_PPC_DAC1:
1740 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val);
1741 break;
1742 case KVM_REG_PPC_DAC2:
1743 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val);
1744 break;
1745 case KVM_REG_PPC_EPR: {
1746 u32 new_epr = set_reg_val(id, *val);
1747 kvmppc_set_epr(vcpu, new_epr);
1748 break;
1749 }
1750 #if defined(CONFIG_64BIT)
1751 case KVM_REG_PPC_EPCR: {
1752 u32 new_epcr = set_reg_val(id, *val);
1753 kvmppc_set_epcr(vcpu, new_epcr);
1754 break;
1755 }
1756 #endif
1757 case KVM_REG_PPC_OR_TSR: {
1758 u32 tsr_bits = set_reg_val(id, *val);
1759 kvmppc_set_tsr_bits(vcpu, tsr_bits);
1760 break;
1761 }
1762 case KVM_REG_PPC_CLEAR_TSR: {
1763 u32 tsr_bits = set_reg_val(id, *val);
1764 kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1765 break;
1766 }
1767 case KVM_REG_PPC_TSR: {
1768 u32 tsr = set_reg_val(id, *val);
1769 kvmppc_set_tsr(vcpu, tsr);
1770 break;
1771 }
1772 case KVM_REG_PPC_TCR: {
1773 u32 tcr = set_reg_val(id, *val);
1774 kvmppc_set_tcr(vcpu, tcr);
1775 break;
1776 }
1777 case KVM_REG_PPC_VRSAVE:
1778 vcpu->arch.vrsave = set_reg_val(id, *val);
1779 break;
1780 default:
1781 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
1782 break;
1783 }
1784
1785 return r;
1786 }
1787
kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu * vcpu,struct kvm_fpu * fpu)1788 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1789 {
1790 return -EOPNOTSUPP;
1791 }
1792
kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu * vcpu,struct kvm_fpu * fpu)1793 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1794 {
1795 return -EOPNOTSUPP;
1796 }
1797
kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu * vcpu,struct kvm_translation * tr)1798 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1799 struct kvm_translation *tr)
1800 {
1801 int r;
1802
1803 vcpu_load(vcpu);
1804 r = kvmppc_core_vcpu_translate(vcpu, tr);
1805 vcpu_put(vcpu);
1806 return r;
1807 }
1808
kvm_arch_sync_dirty_log(struct kvm * kvm,struct kvm_memory_slot * memslot)1809 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
1810 {
1811
1812 }
1813
kvm_vm_ioctl_get_dirty_log(struct kvm * kvm,struct kvm_dirty_log * log)1814 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1815 {
1816 return -EOPNOTSUPP;
1817 }
1818
kvmppc_core_free_memslot(struct kvm * kvm,struct kvm_memory_slot * slot)1819 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
1820 {
1821 }
1822
kvmppc_core_prepare_memory_region(struct kvm * kvm,struct kvm_memory_slot * memslot,const struct kvm_userspace_memory_region * mem,enum kvm_mr_change change)1823 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1824 struct kvm_memory_slot *memslot,
1825 const struct kvm_userspace_memory_region *mem,
1826 enum kvm_mr_change change)
1827 {
1828 return 0;
1829 }
1830
kvmppc_core_commit_memory_region(struct kvm * kvm,const struct kvm_userspace_memory_region * mem,const struct kvm_memory_slot * old,const struct kvm_memory_slot * new,enum kvm_mr_change change)1831 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1832 const struct kvm_userspace_memory_region *mem,
1833 const struct kvm_memory_slot *old,
1834 const struct kvm_memory_slot *new,
1835 enum kvm_mr_change change)
1836 {
1837 }
1838
kvmppc_core_flush_memslot(struct kvm * kvm,struct kvm_memory_slot * memslot)1839 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1840 {
1841 }
1842
kvmppc_set_epcr(struct kvm_vcpu * vcpu,u32 new_epcr)1843 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1844 {
1845 #if defined(CONFIG_64BIT)
1846 vcpu->arch.epcr = new_epcr;
1847 #ifdef CONFIG_KVM_BOOKE_HV
1848 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1849 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
1850 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1851 #endif
1852 #endif
1853 }
1854
kvmppc_set_tcr(struct kvm_vcpu * vcpu,u32 new_tcr)1855 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1856 {
1857 vcpu->arch.tcr = new_tcr;
1858 arm_next_watchdog(vcpu);
1859 update_timer_ints(vcpu);
1860 }
1861
kvmppc_set_tsr_bits(struct kvm_vcpu * vcpu,u32 tsr_bits)1862 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1863 {
1864 set_bits(tsr_bits, &vcpu->arch.tsr);
1865 smp_wmb();
1866 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1867 kvm_vcpu_kick(vcpu);
1868 }
1869
kvmppc_clr_tsr_bits(struct kvm_vcpu * vcpu,u32 tsr_bits)1870 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1871 {
1872 clear_bits(tsr_bits, &vcpu->arch.tsr);
1873
1874 /*
1875 * We may have stopped the watchdog due to
1876 * being stuck on final expiration.
1877 */
1878 if (tsr_bits & (TSR_ENW | TSR_WIS))
1879 arm_next_watchdog(vcpu);
1880
1881 update_timer_ints(vcpu);
1882 }
1883
kvmppc_decrementer_func(struct kvm_vcpu * vcpu)1884 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
1885 {
1886 if (vcpu->arch.tcr & TCR_ARE) {
1887 vcpu->arch.dec = vcpu->arch.decar;
1888 kvmppc_emulate_dec(vcpu);
1889 }
1890
1891 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1892 }
1893
kvmppc_booke_add_breakpoint(struct debug_reg * dbg_reg,uint64_t addr,int index)1894 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg,
1895 uint64_t addr, int index)
1896 {
1897 switch (index) {
1898 case 0:
1899 dbg_reg->dbcr0 |= DBCR0_IAC1;
1900 dbg_reg->iac1 = addr;
1901 break;
1902 case 1:
1903 dbg_reg->dbcr0 |= DBCR0_IAC2;
1904 dbg_reg->iac2 = addr;
1905 break;
1906 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1907 case 2:
1908 dbg_reg->dbcr0 |= DBCR0_IAC3;
1909 dbg_reg->iac3 = addr;
1910 break;
1911 case 3:
1912 dbg_reg->dbcr0 |= DBCR0_IAC4;
1913 dbg_reg->iac4 = addr;
1914 break;
1915 #endif
1916 default:
1917 return -EINVAL;
1918 }
1919
1920 dbg_reg->dbcr0 |= DBCR0_IDM;
1921 return 0;
1922 }
1923
kvmppc_booke_add_watchpoint(struct debug_reg * dbg_reg,uint64_t addr,int type,int index)1924 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr,
1925 int type, int index)
1926 {
1927 switch (index) {
1928 case 0:
1929 if (type & KVMPPC_DEBUG_WATCH_READ)
1930 dbg_reg->dbcr0 |= DBCR0_DAC1R;
1931 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1932 dbg_reg->dbcr0 |= DBCR0_DAC1W;
1933 dbg_reg->dac1 = addr;
1934 break;
1935 case 1:
1936 if (type & KVMPPC_DEBUG_WATCH_READ)
1937 dbg_reg->dbcr0 |= DBCR0_DAC2R;
1938 if (type & KVMPPC_DEBUG_WATCH_WRITE)
1939 dbg_reg->dbcr0 |= DBCR0_DAC2W;
1940 dbg_reg->dac2 = addr;
1941 break;
1942 default:
1943 return -EINVAL;
1944 }
1945
1946 dbg_reg->dbcr0 |= DBCR0_IDM;
1947 return 0;
1948 }
kvm_guest_protect_msr(struct kvm_vcpu * vcpu,ulong prot_bitmap,bool set)1949 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set)
1950 {
1951 /* XXX: Add similar MSR protection for BookE-PR */
1952 #ifdef CONFIG_KVM_BOOKE_HV
1953 BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP));
1954 if (set) {
1955 if (prot_bitmap & MSR_UCLE)
1956 vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1957 if (prot_bitmap & MSR_DE)
1958 vcpu->arch.shadow_msrp |= MSRP_DEP;
1959 if (prot_bitmap & MSR_PMM)
1960 vcpu->arch.shadow_msrp |= MSRP_PMMP;
1961 } else {
1962 if (prot_bitmap & MSR_UCLE)
1963 vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1964 if (prot_bitmap & MSR_DE)
1965 vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1966 if (prot_bitmap & MSR_PMM)
1967 vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1968 }
1969 #endif
1970 }
1971
kvmppc_xlate(struct kvm_vcpu * vcpu,ulong eaddr,enum xlate_instdata xlid,enum xlate_readwrite xlrw,struct kvmppc_pte * pte)1972 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
1973 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
1974 {
1975 int gtlb_index;
1976 gpa_t gpaddr;
1977
1978 #ifdef CONFIG_KVM_E500V2
1979 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1980 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1981 pte->eaddr = eaddr;
1982 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) |
1983 (eaddr & ~PAGE_MASK);
1984 pte->vpage = eaddr >> PAGE_SHIFT;
1985 pte->may_read = true;
1986 pte->may_write = true;
1987 pte->may_execute = true;
1988
1989 return 0;
1990 }
1991 #endif
1992
1993 /* Check the guest TLB. */
1994 switch (xlid) {
1995 case XLATE_INST:
1996 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1997 break;
1998 case XLATE_DATA:
1999 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
2000 break;
2001 default:
2002 BUG();
2003 }
2004
2005 /* Do we have a TLB entry at all? */
2006 if (gtlb_index < 0)
2007 return -ENOENT;
2008
2009 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
2010
2011 pte->eaddr = eaddr;
2012 pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK);
2013 pte->vpage = eaddr >> PAGE_SHIFT;
2014
2015 /* XXX read permissions from the guest TLB */
2016 pte->may_read = true;
2017 pte->may_write = true;
2018 pte->may_execute = true;
2019
2020 return 0;
2021 }
2022
kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu * vcpu,struct kvm_guest_debug * dbg)2023 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
2024 struct kvm_guest_debug *dbg)
2025 {
2026 struct debug_reg *dbg_reg;
2027 int n, b = 0, w = 0;
2028 int ret = 0;
2029
2030 vcpu_load(vcpu);
2031
2032 if (!(dbg->control & KVM_GUESTDBG_ENABLE)) {
2033 vcpu->arch.dbg_reg.dbcr0 = 0;
2034 vcpu->guest_debug = 0;
2035 kvm_guest_protect_msr(vcpu, MSR_DE, false);
2036 goto out;
2037 }
2038
2039 kvm_guest_protect_msr(vcpu, MSR_DE, true);
2040 vcpu->guest_debug = dbg->control;
2041 vcpu->arch.dbg_reg.dbcr0 = 0;
2042
2043 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
2044 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
2045
2046 /* Code below handles only HW breakpoints */
2047 dbg_reg = &(vcpu->arch.dbg_reg);
2048
2049 #ifdef CONFIG_KVM_BOOKE_HV
2050 /*
2051 * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1
2052 * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0
2053 */
2054 dbg_reg->dbcr1 = 0;
2055 dbg_reg->dbcr2 = 0;
2056 #else
2057 /*
2058 * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1
2059 * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR
2060 * is set.
2061 */
2062 dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US |
2063 DBCR1_IAC4US;
2064 dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
2065 #endif
2066
2067 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
2068 goto out;
2069
2070 ret = -EINVAL;
2071 for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) {
2072 uint64_t addr = dbg->arch.bp[n].addr;
2073 uint32_t type = dbg->arch.bp[n].type;
2074
2075 if (type == KVMPPC_DEBUG_NONE)
2076 continue;
2077
2078 if (type & ~(KVMPPC_DEBUG_WATCH_READ |
2079 KVMPPC_DEBUG_WATCH_WRITE |
2080 KVMPPC_DEBUG_BREAKPOINT))
2081 goto out;
2082
2083 if (type & KVMPPC_DEBUG_BREAKPOINT) {
2084 /* Setting H/W breakpoint */
2085 if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++))
2086 goto out;
2087 } else {
2088 /* Setting H/W watchpoint */
2089 if (kvmppc_booke_add_watchpoint(dbg_reg, addr,
2090 type, w++))
2091 goto out;
2092 }
2093 }
2094
2095 ret = 0;
2096 out:
2097 vcpu_put(vcpu);
2098 return ret;
2099 }
2100
kvmppc_booke_vcpu_load(struct kvm_vcpu * vcpu,int cpu)2101 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2102 {
2103 vcpu->cpu = smp_processor_id();
2104 current->thread.kvm_vcpu = vcpu;
2105 }
2106
kvmppc_booke_vcpu_put(struct kvm_vcpu * vcpu)2107 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
2108 {
2109 current->thread.kvm_vcpu = NULL;
2110 vcpu->cpu = -1;
2111
2112 /* Clear pending debug event in DBSR */
2113 kvmppc_clear_dbsr();
2114 }
2115
kvmppc_core_init_vm(struct kvm * kvm)2116 int kvmppc_core_init_vm(struct kvm *kvm)
2117 {
2118 return kvm->arch.kvm_ops->init_vm(kvm);
2119 }
2120
kvmppc_core_vcpu_create(struct kvm_vcpu * vcpu)2121 int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu)
2122 {
2123 int i;
2124 int r;
2125
2126 r = vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
2127 if (r)
2128 return r;
2129
2130 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
2131 vcpu->arch.regs.nip = 0;
2132 vcpu->arch.shared->pir = vcpu->vcpu_id;
2133 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
2134 kvmppc_set_msr(vcpu, 0);
2135
2136 #ifndef CONFIG_KVM_BOOKE_HV
2137 vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
2138 vcpu->arch.shadow_pid = 1;
2139 vcpu->arch.shared->msr = 0;
2140 #endif
2141
2142 /* Eye-catching numbers so we know if the guest takes an interrupt
2143 * before it's programmed its own IVPR/IVORs. */
2144 vcpu->arch.ivpr = 0x55550000;
2145 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
2146 vcpu->arch.ivor[i] = 0x7700 | i * 4;
2147
2148 kvmppc_init_timing_stats(vcpu);
2149
2150 r = kvmppc_core_vcpu_setup(vcpu);
2151 if (r)
2152 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2153 kvmppc_sanity_check(vcpu);
2154 return r;
2155 }
2156
kvmppc_core_vcpu_free(struct kvm_vcpu * vcpu)2157 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
2158 {
2159 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2160 }
2161
kvmppc_core_destroy_vm(struct kvm * kvm)2162 void kvmppc_core_destroy_vm(struct kvm *kvm)
2163 {
2164 kvm->arch.kvm_ops->destroy_vm(kvm);
2165 }
2166
kvmppc_core_vcpu_load(struct kvm_vcpu * vcpu,int cpu)2167 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2168 {
2169 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
2170 }
2171
kvmppc_core_vcpu_put(struct kvm_vcpu * vcpu)2172 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
2173 {
2174 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
2175 }
2176
kvmppc_booke_init(void)2177 int __init kvmppc_booke_init(void)
2178 {
2179 #ifndef CONFIG_KVM_BOOKE_HV
2180 unsigned long ivor[16];
2181 unsigned long *handler = kvmppc_booke_handler_addr;
2182 unsigned long max_ivor = 0;
2183 unsigned long handler_len;
2184 int i;
2185
2186 /* We install our own exception handlers by hijacking IVPR. IVPR must
2187 * be 16-bit aligned, so we need a 64KB allocation. */
2188 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
2189 VCPU_SIZE_ORDER);
2190 if (!kvmppc_booke_handlers)
2191 return -ENOMEM;
2192
2193 /* XXX make sure our handlers are smaller than Linux's */
2194
2195 /* Copy our interrupt handlers to match host IVORs. That way we don't
2196 * have to swap the IVORs on every guest/host transition. */
2197 ivor[0] = mfspr(SPRN_IVOR0);
2198 ivor[1] = mfspr(SPRN_IVOR1);
2199 ivor[2] = mfspr(SPRN_IVOR2);
2200 ivor[3] = mfspr(SPRN_IVOR3);
2201 ivor[4] = mfspr(SPRN_IVOR4);
2202 ivor[5] = mfspr(SPRN_IVOR5);
2203 ivor[6] = mfspr(SPRN_IVOR6);
2204 ivor[7] = mfspr(SPRN_IVOR7);
2205 ivor[8] = mfspr(SPRN_IVOR8);
2206 ivor[9] = mfspr(SPRN_IVOR9);
2207 ivor[10] = mfspr(SPRN_IVOR10);
2208 ivor[11] = mfspr(SPRN_IVOR11);
2209 ivor[12] = mfspr(SPRN_IVOR12);
2210 ivor[13] = mfspr(SPRN_IVOR13);
2211 ivor[14] = mfspr(SPRN_IVOR14);
2212 ivor[15] = mfspr(SPRN_IVOR15);
2213
2214 for (i = 0; i < 16; i++) {
2215 if (ivor[i] > max_ivor)
2216 max_ivor = i;
2217
2218 handler_len = handler[i + 1] - handler[i];
2219 memcpy((void *)kvmppc_booke_handlers + ivor[i],
2220 (void *)handler[i], handler_len);
2221 }
2222
2223 handler_len = handler[max_ivor + 1] - handler[max_ivor];
2224 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
2225 ivor[max_ivor] + handler_len);
2226 #endif /* !BOOKE_HV */
2227 return 0;
2228 }
2229
kvmppc_booke_exit(void)2230 void __exit kvmppc_booke_exit(void)
2231 {
2232 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
2233 kvm_exit();
2234 }
2235