1 /*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34 #include <linux/bpf.h>
35 #include <linux/etherdevice.h>
36 #include <linux/tcp.h>
37 #include <linux/if_vlan.h>
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/hash.h>
41 #include <net/ip.h>
42 #include <net/vxlan.h>
43 #include <net/devlink.h>
44
45 #include <linux/mlx4/driver.h>
46 #include <linux/mlx4/device.h>
47 #include <linux/mlx4/cmd.h>
48 #include <linux/mlx4/cq.h>
49
50 #include "mlx4_en.h"
51 #include "en_port.h"
52
53 #define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \
54 XDP_PACKET_HEADROOM - \
55 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))))
56
mlx4_en_setup_tc(struct net_device * dev,u8 up)57 int mlx4_en_setup_tc(struct net_device *dev, u8 up)
58 {
59 struct mlx4_en_priv *priv = netdev_priv(dev);
60 int i;
61 unsigned int offset = 0;
62
63 if (up && up != MLX4_EN_NUM_UP_HIGH)
64 return -EINVAL;
65
66 netdev_set_num_tc(dev, up);
67 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
68 /* Partition Tx queues evenly amongst UP's */
69 for (i = 0; i < up; i++) {
70 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
71 offset += priv->num_tx_rings_p_up;
72 }
73
74 #ifdef CONFIG_MLX4_EN_DCB
75 if (!mlx4_is_slave(priv->mdev->dev)) {
76 if (up) {
77 if (priv->dcbx_cap)
78 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
79 } else {
80 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
81 priv->cee_config.pfc_state = false;
82 }
83 }
84 #endif /* CONFIG_MLX4_EN_DCB */
85
86 return 0;
87 }
88
mlx4_en_alloc_tx_queue_per_tc(struct net_device * dev,u8 tc)89 int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc)
90 {
91 struct mlx4_en_priv *priv = netdev_priv(dev);
92 struct mlx4_en_dev *mdev = priv->mdev;
93 struct mlx4_en_port_profile new_prof;
94 struct mlx4_en_priv *tmp;
95 int total_count;
96 int port_up = 0;
97 int err = 0;
98
99 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
100 if (!tmp)
101 return -ENOMEM;
102
103 mutex_lock(&mdev->state_lock);
104 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
105 new_prof.num_up = (tc == 0) ? MLX4_EN_NUM_UP_LOW :
106 MLX4_EN_NUM_UP_HIGH;
107 new_prof.tx_ring_num[TX] = new_prof.num_tx_rings_p_up *
108 new_prof.num_up;
109 total_count = new_prof.tx_ring_num[TX] + new_prof.tx_ring_num[TX_XDP];
110 if (total_count > MAX_TX_RINGS) {
111 err = -EINVAL;
112 en_err(priv,
113 "Total number of TX and XDP rings (%d) exceeds the maximum supported (%d)\n",
114 total_count, MAX_TX_RINGS);
115 goto out;
116 }
117 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
118 if (err)
119 goto out;
120
121 if (priv->port_up) {
122 port_up = 1;
123 mlx4_en_stop_port(dev, 1);
124 }
125
126 mlx4_en_safe_replace_resources(priv, tmp);
127 if (port_up) {
128 err = mlx4_en_start_port(dev);
129 if (err) {
130 en_err(priv, "Failed starting port for setup TC\n");
131 goto out;
132 }
133 }
134
135 err = mlx4_en_setup_tc(dev, tc);
136 out:
137 mutex_unlock(&mdev->state_lock);
138 kfree(tmp);
139 return err;
140 }
141
__mlx4_en_setup_tc(struct net_device * dev,enum tc_setup_type type,void * type_data)142 static int __mlx4_en_setup_tc(struct net_device *dev, enum tc_setup_type type,
143 void *type_data)
144 {
145 struct tc_mqprio_qopt *mqprio = type_data;
146
147 if (type != TC_SETUP_QDISC_MQPRIO)
148 return -EOPNOTSUPP;
149
150 if (mqprio->num_tc && mqprio->num_tc != MLX4_EN_NUM_UP_HIGH)
151 return -EINVAL;
152
153 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
154
155 return mlx4_en_alloc_tx_queue_per_tc(dev, mqprio->num_tc);
156 }
157
158 #ifdef CONFIG_RFS_ACCEL
159
160 struct mlx4_en_filter {
161 struct list_head next;
162 struct work_struct work;
163
164 u8 ip_proto;
165 __be32 src_ip;
166 __be32 dst_ip;
167 __be16 src_port;
168 __be16 dst_port;
169
170 int rxq_index;
171 struct mlx4_en_priv *priv;
172 u32 flow_id; /* RFS infrastructure id */
173 int id; /* mlx4_en driver id */
174 u64 reg_id; /* Flow steering API id */
175 u8 activated; /* Used to prevent expiry before filter
176 * is attached
177 */
178 struct hlist_node filter_chain;
179 };
180
181 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
182
mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)183 static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
184 {
185 switch (ip_proto) {
186 case IPPROTO_UDP:
187 return MLX4_NET_TRANS_RULE_ID_UDP;
188 case IPPROTO_TCP:
189 return MLX4_NET_TRANS_RULE_ID_TCP;
190 default:
191 return MLX4_NET_TRANS_RULE_NUM;
192 }
193 };
194
195 /* Must not acquire state_lock, as its corresponding work_sync
196 * is done under it.
197 */
mlx4_en_filter_work(struct work_struct * work)198 static void mlx4_en_filter_work(struct work_struct *work)
199 {
200 struct mlx4_en_filter *filter = container_of(work,
201 struct mlx4_en_filter,
202 work);
203 struct mlx4_en_priv *priv = filter->priv;
204 struct mlx4_spec_list spec_tcp_udp = {
205 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
206 {
207 .tcp_udp = {
208 .dst_port = filter->dst_port,
209 .dst_port_msk = (__force __be16)-1,
210 .src_port = filter->src_port,
211 .src_port_msk = (__force __be16)-1,
212 },
213 },
214 };
215 struct mlx4_spec_list spec_ip = {
216 .id = MLX4_NET_TRANS_RULE_ID_IPV4,
217 {
218 .ipv4 = {
219 .dst_ip = filter->dst_ip,
220 .dst_ip_msk = (__force __be32)-1,
221 .src_ip = filter->src_ip,
222 .src_ip_msk = (__force __be32)-1,
223 },
224 },
225 };
226 struct mlx4_spec_list spec_eth = {
227 .id = MLX4_NET_TRANS_RULE_ID_ETH,
228 };
229 struct mlx4_net_trans_rule rule = {
230 .list = LIST_HEAD_INIT(rule.list),
231 .queue_mode = MLX4_NET_TRANS_Q_LIFO,
232 .exclusive = 1,
233 .allow_loopback = 1,
234 .promisc_mode = MLX4_FS_REGULAR,
235 .port = priv->port,
236 .priority = MLX4_DOMAIN_RFS,
237 };
238 int rc;
239 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
240
241 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
242 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
243 filter->ip_proto);
244 goto ignore;
245 }
246 list_add_tail(&spec_eth.list, &rule.list);
247 list_add_tail(&spec_ip.list, &rule.list);
248 list_add_tail(&spec_tcp_udp.list, &rule.list);
249
250 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
251 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
252 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
253
254 filter->activated = 0;
255
256 if (filter->reg_id) {
257 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
258 if (rc && rc != -ENOENT)
259 en_err(priv, "Error detaching flow. rc = %d\n", rc);
260 }
261
262 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
263 if (rc)
264 en_err(priv, "Error attaching flow. err = %d\n", rc);
265
266 ignore:
267 mlx4_en_filter_rfs_expire(priv);
268
269 filter->activated = 1;
270 }
271
272 static inline struct hlist_head *
filter_hash_bucket(struct mlx4_en_priv * priv,__be32 src_ip,__be32 dst_ip,__be16 src_port,__be16 dst_port)273 filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
274 __be16 src_port, __be16 dst_port)
275 {
276 unsigned long l;
277 int bucket_idx;
278
279 l = (__force unsigned long)src_port |
280 ((__force unsigned long)dst_port << 2);
281 l ^= (__force unsigned long)(src_ip ^ dst_ip);
282
283 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
284
285 return &priv->filter_hash[bucket_idx];
286 }
287
288 static struct mlx4_en_filter *
mlx4_en_filter_alloc(struct mlx4_en_priv * priv,int rxq_index,__be32 src_ip,__be32 dst_ip,u8 ip_proto,__be16 src_port,__be16 dst_port,u32 flow_id)289 mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
290 __be32 dst_ip, u8 ip_proto, __be16 src_port,
291 __be16 dst_port, u32 flow_id)
292 {
293 struct mlx4_en_filter *filter = NULL;
294
295 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
296 if (!filter)
297 return NULL;
298
299 filter->priv = priv;
300 filter->rxq_index = rxq_index;
301 INIT_WORK(&filter->work, mlx4_en_filter_work);
302
303 filter->src_ip = src_ip;
304 filter->dst_ip = dst_ip;
305 filter->ip_proto = ip_proto;
306 filter->src_port = src_port;
307 filter->dst_port = dst_port;
308
309 filter->flow_id = flow_id;
310
311 filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
312
313 list_add_tail(&filter->next, &priv->filters);
314 hlist_add_head(&filter->filter_chain,
315 filter_hash_bucket(priv, src_ip, dst_ip, src_port,
316 dst_port));
317
318 return filter;
319 }
320
mlx4_en_filter_free(struct mlx4_en_filter * filter)321 static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
322 {
323 struct mlx4_en_priv *priv = filter->priv;
324 int rc;
325
326 list_del(&filter->next);
327
328 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
329 if (rc && rc != -ENOENT)
330 en_err(priv, "Error detaching flow. rc = %d\n", rc);
331
332 kfree(filter);
333 }
334
335 static inline struct mlx4_en_filter *
mlx4_en_filter_find(struct mlx4_en_priv * priv,__be32 src_ip,__be32 dst_ip,u8 ip_proto,__be16 src_port,__be16 dst_port)336 mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
337 u8 ip_proto, __be16 src_port, __be16 dst_port)
338 {
339 struct mlx4_en_filter *filter;
340 struct mlx4_en_filter *ret = NULL;
341
342 hlist_for_each_entry(filter,
343 filter_hash_bucket(priv, src_ip, dst_ip,
344 src_port, dst_port),
345 filter_chain) {
346 if (filter->src_ip == src_ip &&
347 filter->dst_ip == dst_ip &&
348 filter->ip_proto == ip_proto &&
349 filter->src_port == src_port &&
350 filter->dst_port == dst_port) {
351 ret = filter;
352 break;
353 }
354 }
355
356 return ret;
357 }
358
359 static int
mlx4_en_filter_rfs(struct net_device * net_dev,const struct sk_buff * skb,u16 rxq_index,u32 flow_id)360 mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
361 u16 rxq_index, u32 flow_id)
362 {
363 struct mlx4_en_priv *priv = netdev_priv(net_dev);
364 struct mlx4_en_filter *filter;
365 const struct iphdr *ip;
366 const __be16 *ports;
367 u8 ip_proto;
368 __be32 src_ip;
369 __be32 dst_ip;
370 __be16 src_port;
371 __be16 dst_port;
372 int nhoff = skb_network_offset(skb);
373 int ret = 0;
374
375 if (skb->encapsulation)
376 return -EPROTONOSUPPORT;
377
378 if (skb->protocol != htons(ETH_P_IP))
379 return -EPROTONOSUPPORT;
380
381 ip = (const struct iphdr *)(skb->data + nhoff);
382 if (ip_is_fragment(ip))
383 return -EPROTONOSUPPORT;
384
385 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
386 return -EPROTONOSUPPORT;
387 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
388
389 ip_proto = ip->protocol;
390 src_ip = ip->saddr;
391 dst_ip = ip->daddr;
392 src_port = ports[0];
393 dst_port = ports[1];
394
395 spin_lock_bh(&priv->filters_lock);
396 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
397 src_port, dst_port);
398 if (filter) {
399 if (filter->rxq_index == rxq_index)
400 goto out;
401
402 filter->rxq_index = rxq_index;
403 } else {
404 filter = mlx4_en_filter_alloc(priv, rxq_index,
405 src_ip, dst_ip, ip_proto,
406 src_port, dst_port, flow_id);
407 if (!filter) {
408 ret = -ENOMEM;
409 goto err;
410 }
411 }
412
413 queue_work(priv->mdev->workqueue, &filter->work);
414
415 out:
416 ret = filter->id;
417 err:
418 spin_unlock_bh(&priv->filters_lock);
419
420 return ret;
421 }
422
mlx4_en_cleanup_filters(struct mlx4_en_priv * priv)423 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
424 {
425 struct mlx4_en_filter *filter, *tmp;
426 LIST_HEAD(del_list);
427
428 spin_lock_bh(&priv->filters_lock);
429 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
430 list_move(&filter->next, &del_list);
431 hlist_del(&filter->filter_chain);
432 }
433 spin_unlock_bh(&priv->filters_lock);
434
435 list_for_each_entry_safe(filter, tmp, &del_list, next) {
436 cancel_work_sync(&filter->work);
437 mlx4_en_filter_free(filter);
438 }
439 }
440
mlx4_en_filter_rfs_expire(struct mlx4_en_priv * priv)441 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
442 {
443 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
444 LIST_HEAD(del_list);
445 int i = 0;
446
447 spin_lock_bh(&priv->filters_lock);
448 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
449 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
450 break;
451
452 if (filter->activated &&
453 !work_pending(&filter->work) &&
454 rps_may_expire_flow(priv->dev,
455 filter->rxq_index, filter->flow_id,
456 filter->id)) {
457 list_move(&filter->next, &del_list);
458 hlist_del(&filter->filter_chain);
459 } else
460 last_filter = filter;
461
462 i++;
463 }
464
465 if (last_filter && (&last_filter->next != priv->filters.next))
466 list_move(&priv->filters, &last_filter->next);
467
468 spin_unlock_bh(&priv->filters_lock);
469
470 list_for_each_entry_safe(filter, tmp, &del_list, next)
471 mlx4_en_filter_free(filter);
472 }
473 #endif
474
mlx4_en_vlan_rx_add_vid(struct net_device * dev,__be16 proto,u16 vid)475 static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
476 __be16 proto, u16 vid)
477 {
478 struct mlx4_en_priv *priv = netdev_priv(dev);
479 struct mlx4_en_dev *mdev = priv->mdev;
480 int err;
481 int idx;
482
483 en_dbg(HW, priv, "adding VLAN:%d\n", vid);
484
485 set_bit(vid, priv->active_vlans);
486
487 /* Add VID to port VLAN filter */
488 mutex_lock(&mdev->state_lock);
489 if (mdev->device_up && priv->port_up) {
490 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
491 if (err) {
492 en_err(priv, "Failed configuring VLAN filter\n");
493 goto out;
494 }
495 }
496 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx);
497 if (err)
498 en_dbg(HW, priv, "Failed adding vlan %d\n", vid);
499
500 out:
501 mutex_unlock(&mdev->state_lock);
502 return err;
503 }
504
mlx4_en_vlan_rx_kill_vid(struct net_device * dev,__be16 proto,u16 vid)505 static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
506 __be16 proto, u16 vid)
507 {
508 struct mlx4_en_priv *priv = netdev_priv(dev);
509 struct mlx4_en_dev *mdev = priv->mdev;
510 int err = 0;
511
512 en_dbg(HW, priv, "Killing VID:%d\n", vid);
513
514 clear_bit(vid, priv->active_vlans);
515
516 /* Remove VID from port VLAN filter */
517 mutex_lock(&mdev->state_lock);
518 mlx4_unregister_vlan(mdev->dev, priv->port, vid);
519
520 if (mdev->device_up && priv->port_up) {
521 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
522 if (err)
523 en_err(priv, "Failed configuring VLAN filter\n");
524 }
525 mutex_unlock(&mdev->state_lock);
526
527 return err;
528 }
529
mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN+2],u64 src_mac)530 static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
531 {
532 int i;
533 for (i = ETH_ALEN - 1; i >= 0; --i) {
534 dst_mac[i] = src_mac & 0xff;
535 src_mac >>= 8;
536 }
537 memset(&dst_mac[ETH_ALEN], 0, 2);
538 }
539
540
mlx4_en_tunnel_steer_add(struct mlx4_en_priv * priv,unsigned char * addr,int qpn,u64 * reg_id)541 static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
542 int qpn, u64 *reg_id)
543 {
544 int err;
545
546 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
547 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
548 return 0; /* do nothing */
549
550 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
551 MLX4_DOMAIN_NIC, reg_id);
552 if (err) {
553 en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
554 return err;
555 }
556 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
557 return 0;
558 }
559
560
mlx4_en_uc_steer_add(struct mlx4_en_priv * priv,unsigned char * mac,int * qpn,u64 * reg_id)561 static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
562 unsigned char *mac, int *qpn, u64 *reg_id)
563 {
564 struct mlx4_en_dev *mdev = priv->mdev;
565 struct mlx4_dev *dev = mdev->dev;
566 int err;
567
568 switch (dev->caps.steering_mode) {
569 case MLX4_STEERING_MODE_B0: {
570 struct mlx4_qp qp;
571 u8 gid[16] = {0};
572
573 qp.qpn = *qpn;
574 memcpy(&gid[10], mac, ETH_ALEN);
575 gid[5] = priv->port;
576
577 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
578 break;
579 }
580 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
581 struct mlx4_spec_list spec_eth = { {NULL} };
582 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
583
584 struct mlx4_net_trans_rule rule = {
585 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
586 .exclusive = 0,
587 .allow_loopback = 1,
588 .promisc_mode = MLX4_FS_REGULAR,
589 .priority = MLX4_DOMAIN_NIC,
590 };
591
592 rule.port = priv->port;
593 rule.qpn = *qpn;
594 INIT_LIST_HEAD(&rule.list);
595
596 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
597 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
598 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
599 list_add_tail(&spec_eth.list, &rule.list);
600
601 err = mlx4_flow_attach(dev, &rule, reg_id);
602 break;
603 }
604 default:
605 return -EINVAL;
606 }
607 if (err)
608 en_warn(priv, "Failed Attaching Unicast\n");
609
610 return err;
611 }
612
mlx4_en_uc_steer_release(struct mlx4_en_priv * priv,unsigned char * mac,int qpn,u64 reg_id)613 static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
614 unsigned char *mac, int qpn, u64 reg_id)
615 {
616 struct mlx4_en_dev *mdev = priv->mdev;
617 struct mlx4_dev *dev = mdev->dev;
618
619 switch (dev->caps.steering_mode) {
620 case MLX4_STEERING_MODE_B0: {
621 struct mlx4_qp qp;
622 u8 gid[16] = {0};
623
624 qp.qpn = qpn;
625 memcpy(&gid[10], mac, ETH_ALEN);
626 gid[5] = priv->port;
627
628 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
629 break;
630 }
631 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
632 mlx4_flow_detach(dev, reg_id);
633 break;
634 }
635 default:
636 en_err(priv, "Invalid steering mode.\n");
637 }
638 }
639
mlx4_en_get_qp(struct mlx4_en_priv * priv)640 static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
641 {
642 struct mlx4_en_dev *mdev = priv->mdev;
643 struct mlx4_dev *dev = mdev->dev;
644 int index = 0;
645 int err = 0;
646 int *qpn = &priv->base_qpn;
647 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
648
649 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
650 priv->dev->dev_addr);
651 index = mlx4_register_mac(dev, priv->port, mac);
652 if (index < 0) {
653 err = index;
654 en_err(priv, "Failed adding MAC: %pM\n",
655 priv->dev->dev_addr);
656 return err;
657 }
658
659 en_info(priv, "Steering Mode %d\n", dev->caps.steering_mode);
660
661 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
662 int base_qpn = mlx4_get_base_qpn(dev, priv->port);
663 *qpn = base_qpn + index;
664 return 0;
665 }
666
667 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP,
668 MLX4_RES_USAGE_DRIVER);
669 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
670 if (err) {
671 en_err(priv, "Failed to reserve qp for mac registration\n");
672 mlx4_unregister_mac(dev, priv->port, mac);
673 return err;
674 }
675
676 return 0;
677 }
678
mlx4_en_put_qp(struct mlx4_en_priv * priv)679 static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
680 {
681 struct mlx4_en_dev *mdev = priv->mdev;
682 struct mlx4_dev *dev = mdev->dev;
683 int qpn = priv->base_qpn;
684
685 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
686 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
687 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
688 priv->dev->dev_addr);
689 mlx4_unregister_mac(dev, priv->port, mac);
690 } else {
691 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
692 priv->port, qpn);
693 mlx4_qp_release_range(dev, qpn, 1);
694 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
695 }
696 }
697
mlx4_en_replace_mac(struct mlx4_en_priv * priv,int qpn,unsigned char * new_mac,unsigned char * prev_mac)698 static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
699 unsigned char *new_mac, unsigned char *prev_mac)
700 {
701 struct mlx4_en_dev *mdev = priv->mdev;
702 struct mlx4_dev *dev = mdev->dev;
703 int err = 0;
704 u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
705
706 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
707 struct hlist_head *bucket;
708 unsigned int mac_hash;
709 struct mlx4_mac_entry *entry;
710 struct hlist_node *tmp;
711 u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
712
713 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
714 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
715 if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
716 mlx4_en_uc_steer_release(priv, entry->mac,
717 qpn, entry->reg_id);
718 mlx4_unregister_mac(dev, priv->port,
719 prev_mac_u64);
720 hlist_del_rcu(&entry->hlist);
721 synchronize_rcu();
722 memcpy(entry->mac, new_mac, ETH_ALEN);
723 entry->reg_id = 0;
724 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
725 hlist_add_head_rcu(&entry->hlist,
726 &priv->mac_hash[mac_hash]);
727 mlx4_register_mac(dev, priv->port, new_mac_u64);
728 err = mlx4_en_uc_steer_add(priv, new_mac,
729 &qpn,
730 &entry->reg_id);
731 if (err)
732 return err;
733 if (priv->tunnel_reg_id) {
734 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
735 priv->tunnel_reg_id = 0;
736 }
737 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
738 &priv->tunnel_reg_id);
739 return err;
740 }
741 }
742 return -EINVAL;
743 }
744
745 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
746 }
747
mlx4_en_update_user_mac(struct mlx4_en_priv * priv,unsigned char new_mac[ETH_ALEN+2])748 static void mlx4_en_update_user_mac(struct mlx4_en_priv *priv,
749 unsigned char new_mac[ETH_ALEN + 2])
750 {
751 struct mlx4_en_dev *mdev = priv->mdev;
752 int err;
753
754 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_USER_MAC_EN))
755 return;
756
757 err = mlx4_SET_PORT_user_mac(mdev->dev, priv->port, new_mac);
758 if (err)
759 en_err(priv, "Failed to pass user MAC(%pM) to Firmware for port %d, with error %d\n",
760 new_mac, priv->port, err);
761 }
762
mlx4_en_do_set_mac(struct mlx4_en_priv * priv,unsigned char new_mac[ETH_ALEN+2])763 static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
764 unsigned char new_mac[ETH_ALEN + 2])
765 {
766 int err = 0;
767
768 if (priv->port_up) {
769 /* Remove old MAC and insert the new one */
770 err = mlx4_en_replace_mac(priv, priv->base_qpn,
771 new_mac, priv->current_mac);
772 if (err)
773 en_err(priv, "Failed changing HW MAC address\n");
774 } else
775 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
776
777 if (!err)
778 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
779
780 return err;
781 }
782
mlx4_en_set_mac(struct net_device * dev,void * addr)783 static int mlx4_en_set_mac(struct net_device *dev, void *addr)
784 {
785 struct mlx4_en_priv *priv = netdev_priv(dev);
786 struct mlx4_en_dev *mdev = priv->mdev;
787 struct sockaddr *saddr = addr;
788 unsigned char new_mac[ETH_ALEN + 2];
789 int err;
790
791 if (!is_valid_ether_addr(saddr->sa_data))
792 return -EADDRNOTAVAIL;
793
794 mutex_lock(&mdev->state_lock);
795 memcpy(new_mac, saddr->sa_data, ETH_ALEN);
796 err = mlx4_en_do_set_mac(priv, new_mac);
797 if (err)
798 goto out;
799
800 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
801 mlx4_en_update_user_mac(priv, new_mac);
802 out:
803 mutex_unlock(&mdev->state_lock);
804
805 return err;
806 }
807
mlx4_en_clear_list(struct net_device * dev)808 static void mlx4_en_clear_list(struct net_device *dev)
809 {
810 struct mlx4_en_priv *priv = netdev_priv(dev);
811 struct mlx4_en_mc_list *tmp, *mc_to_del;
812
813 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
814 list_del(&mc_to_del->list);
815 kfree(mc_to_del);
816 }
817 }
818
mlx4_en_cache_mclist(struct net_device * dev)819 static void mlx4_en_cache_mclist(struct net_device *dev)
820 {
821 struct mlx4_en_priv *priv = netdev_priv(dev);
822 struct netdev_hw_addr *ha;
823 struct mlx4_en_mc_list *tmp;
824
825 mlx4_en_clear_list(dev);
826 netdev_for_each_mc_addr(ha, dev) {
827 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
828 if (!tmp) {
829 mlx4_en_clear_list(dev);
830 return;
831 }
832 memcpy(tmp->addr, ha->addr, ETH_ALEN);
833 list_add_tail(&tmp->list, &priv->mc_list);
834 }
835 }
836
update_mclist_flags(struct mlx4_en_priv * priv,struct list_head * dst,struct list_head * src)837 static void update_mclist_flags(struct mlx4_en_priv *priv,
838 struct list_head *dst,
839 struct list_head *src)
840 {
841 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
842 bool found;
843
844 /* Find all the entries that should be removed from dst,
845 * These are the entries that are not found in src
846 */
847 list_for_each_entry(dst_tmp, dst, list) {
848 found = false;
849 list_for_each_entry(src_tmp, src, list) {
850 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
851 found = true;
852 break;
853 }
854 }
855 if (!found)
856 dst_tmp->action = MCLIST_REM;
857 }
858
859 /* Add entries that exist in src but not in dst
860 * mark them as need to add
861 */
862 list_for_each_entry(src_tmp, src, list) {
863 found = false;
864 list_for_each_entry(dst_tmp, dst, list) {
865 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
866 dst_tmp->action = MCLIST_NONE;
867 found = true;
868 break;
869 }
870 }
871 if (!found) {
872 new_mc = kmemdup(src_tmp,
873 sizeof(struct mlx4_en_mc_list),
874 GFP_KERNEL);
875 if (!new_mc)
876 return;
877
878 new_mc->action = MCLIST_ADD;
879 list_add_tail(&new_mc->list, dst);
880 }
881 }
882 }
883
mlx4_en_set_rx_mode(struct net_device * dev)884 static void mlx4_en_set_rx_mode(struct net_device *dev)
885 {
886 struct mlx4_en_priv *priv = netdev_priv(dev);
887
888 if (!priv->port_up)
889 return;
890
891 queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
892 }
893
mlx4_en_set_promisc_mode(struct mlx4_en_priv * priv,struct mlx4_en_dev * mdev)894 static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
895 struct mlx4_en_dev *mdev)
896 {
897 int err = 0;
898
899 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
900 if (netif_msg_rx_status(priv))
901 en_warn(priv, "Entering promiscuous mode\n");
902 priv->flags |= MLX4_EN_FLAG_PROMISC;
903
904 /* Enable promiscouos mode */
905 switch (mdev->dev->caps.steering_mode) {
906 case MLX4_STEERING_MODE_DEVICE_MANAGED:
907 err = mlx4_flow_steer_promisc_add(mdev->dev,
908 priv->port,
909 priv->base_qpn,
910 MLX4_FS_ALL_DEFAULT);
911 if (err)
912 en_err(priv, "Failed enabling promiscuous mode\n");
913 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
914 break;
915
916 case MLX4_STEERING_MODE_B0:
917 err = mlx4_unicast_promisc_add(mdev->dev,
918 priv->base_qpn,
919 priv->port);
920 if (err)
921 en_err(priv, "Failed enabling unicast promiscuous mode\n");
922
923 /* Add the default qp number as multicast
924 * promisc
925 */
926 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
927 err = mlx4_multicast_promisc_add(mdev->dev,
928 priv->base_qpn,
929 priv->port);
930 if (err)
931 en_err(priv, "Failed enabling multicast promiscuous mode\n");
932 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
933 }
934 break;
935
936 case MLX4_STEERING_MODE_A0:
937 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
938 priv->port,
939 priv->base_qpn,
940 1);
941 if (err)
942 en_err(priv, "Failed enabling promiscuous mode\n");
943 break;
944 }
945
946 /* Disable port multicast filter (unconditionally) */
947 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
948 0, MLX4_MCAST_DISABLE);
949 if (err)
950 en_err(priv, "Failed disabling multicast filter\n");
951 }
952 }
953
mlx4_en_clear_promisc_mode(struct mlx4_en_priv * priv,struct mlx4_en_dev * mdev)954 static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
955 struct mlx4_en_dev *mdev)
956 {
957 int err = 0;
958
959 if (netif_msg_rx_status(priv))
960 en_warn(priv, "Leaving promiscuous mode\n");
961 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
962
963 /* Disable promiscouos mode */
964 switch (mdev->dev->caps.steering_mode) {
965 case MLX4_STEERING_MODE_DEVICE_MANAGED:
966 err = mlx4_flow_steer_promisc_remove(mdev->dev,
967 priv->port,
968 MLX4_FS_ALL_DEFAULT);
969 if (err)
970 en_err(priv, "Failed disabling promiscuous mode\n");
971 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
972 break;
973
974 case MLX4_STEERING_MODE_B0:
975 err = mlx4_unicast_promisc_remove(mdev->dev,
976 priv->base_qpn,
977 priv->port);
978 if (err)
979 en_err(priv, "Failed disabling unicast promiscuous mode\n");
980 /* Disable Multicast promisc */
981 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
982 err = mlx4_multicast_promisc_remove(mdev->dev,
983 priv->base_qpn,
984 priv->port);
985 if (err)
986 en_err(priv, "Failed disabling multicast promiscuous mode\n");
987 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
988 }
989 break;
990
991 case MLX4_STEERING_MODE_A0:
992 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
993 priv->port,
994 priv->base_qpn, 0);
995 if (err)
996 en_err(priv, "Failed disabling promiscuous mode\n");
997 break;
998 }
999 }
1000
mlx4_en_do_multicast(struct mlx4_en_priv * priv,struct net_device * dev,struct mlx4_en_dev * mdev)1001 static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
1002 struct net_device *dev,
1003 struct mlx4_en_dev *mdev)
1004 {
1005 struct mlx4_en_mc_list *mclist, *tmp;
1006 u64 mcast_addr = 0;
1007 u8 mc_list[16] = {0};
1008 int err = 0;
1009
1010 /* Enable/disable the multicast filter according to IFF_ALLMULTI */
1011 if (dev->flags & IFF_ALLMULTI) {
1012 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1013 0, MLX4_MCAST_DISABLE);
1014 if (err)
1015 en_err(priv, "Failed disabling multicast filter\n");
1016
1017 /* Add the default qp number as multicast promisc */
1018 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
1019 switch (mdev->dev->caps.steering_mode) {
1020 case MLX4_STEERING_MODE_DEVICE_MANAGED:
1021 err = mlx4_flow_steer_promisc_add(mdev->dev,
1022 priv->port,
1023 priv->base_qpn,
1024 MLX4_FS_MC_DEFAULT);
1025 break;
1026
1027 case MLX4_STEERING_MODE_B0:
1028 err = mlx4_multicast_promisc_add(mdev->dev,
1029 priv->base_qpn,
1030 priv->port);
1031 break;
1032
1033 case MLX4_STEERING_MODE_A0:
1034 break;
1035 }
1036 if (err)
1037 en_err(priv, "Failed entering multicast promisc mode\n");
1038 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
1039 }
1040 } else {
1041 /* Disable Multicast promisc */
1042 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1043 switch (mdev->dev->caps.steering_mode) {
1044 case MLX4_STEERING_MODE_DEVICE_MANAGED:
1045 err = mlx4_flow_steer_promisc_remove(mdev->dev,
1046 priv->port,
1047 MLX4_FS_MC_DEFAULT);
1048 break;
1049
1050 case MLX4_STEERING_MODE_B0:
1051 err = mlx4_multicast_promisc_remove(mdev->dev,
1052 priv->base_qpn,
1053 priv->port);
1054 break;
1055
1056 case MLX4_STEERING_MODE_A0:
1057 break;
1058 }
1059 if (err)
1060 en_err(priv, "Failed disabling multicast promiscuous mode\n");
1061 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1062 }
1063
1064 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1065 0, MLX4_MCAST_DISABLE);
1066 if (err)
1067 en_err(priv, "Failed disabling multicast filter\n");
1068
1069 /* Flush mcast filter and init it with broadcast address */
1070 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
1071 1, MLX4_MCAST_CONFIG);
1072
1073 /* Update multicast list - we cache all addresses so they won't
1074 * change while HW is updated holding the command semaphor */
1075 netif_addr_lock_bh(dev);
1076 mlx4_en_cache_mclist(dev);
1077 netif_addr_unlock_bh(dev);
1078 list_for_each_entry(mclist, &priv->mc_list, list) {
1079 mcast_addr = mlx4_mac_to_u64(mclist->addr);
1080 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
1081 mcast_addr, 0, MLX4_MCAST_CONFIG);
1082 }
1083 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1084 0, MLX4_MCAST_ENABLE);
1085 if (err)
1086 en_err(priv, "Failed enabling multicast filter\n");
1087
1088 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
1089 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1090 if (mclist->action == MCLIST_REM) {
1091 /* detach this address and delete from list */
1092 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1093 mc_list[5] = priv->port;
1094 err = mlx4_multicast_detach(mdev->dev,
1095 priv->rss_map.indir_qp,
1096 mc_list,
1097 MLX4_PROT_ETH,
1098 mclist->reg_id);
1099 if (err)
1100 en_err(priv, "Fail to detach multicast address\n");
1101
1102 if (mclist->tunnel_reg_id) {
1103 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
1104 if (err)
1105 en_err(priv, "Failed to detach multicast address\n");
1106 }
1107
1108 /* remove from list */
1109 list_del(&mclist->list);
1110 kfree(mclist);
1111 } else if (mclist->action == MCLIST_ADD) {
1112 /* attach the address */
1113 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1114 /* needed for B0 steering support */
1115 mc_list[5] = priv->port;
1116 err = mlx4_multicast_attach(mdev->dev,
1117 priv->rss_map.indir_qp,
1118 mc_list,
1119 priv->port, 0,
1120 MLX4_PROT_ETH,
1121 &mclist->reg_id);
1122 if (err)
1123 en_err(priv, "Fail to attach multicast address\n");
1124
1125 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
1126 &mclist->tunnel_reg_id);
1127 if (err)
1128 en_err(priv, "Failed to attach multicast address\n");
1129 }
1130 }
1131 }
1132 }
1133
mlx4_en_do_uc_filter(struct mlx4_en_priv * priv,struct net_device * dev,struct mlx4_en_dev * mdev)1134 static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
1135 struct net_device *dev,
1136 struct mlx4_en_dev *mdev)
1137 {
1138 struct netdev_hw_addr *ha;
1139 struct mlx4_mac_entry *entry;
1140 struct hlist_node *tmp;
1141 bool found;
1142 u64 mac;
1143 int err = 0;
1144 struct hlist_head *bucket;
1145 unsigned int i;
1146 int removed = 0;
1147 u32 prev_flags;
1148
1149 /* Note that we do not need to protect our mac_hash traversal with rcu,
1150 * since all modification code is protected by mdev->state_lock
1151 */
1152
1153 /* find what to remove */
1154 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1155 bucket = &priv->mac_hash[i];
1156 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1157 found = false;
1158 netdev_for_each_uc_addr(ha, dev) {
1159 if (ether_addr_equal_64bits(entry->mac,
1160 ha->addr)) {
1161 found = true;
1162 break;
1163 }
1164 }
1165
1166 /* MAC address of the port is not in uc list */
1167 if (ether_addr_equal_64bits(entry->mac,
1168 priv->current_mac))
1169 found = true;
1170
1171 if (!found) {
1172 mac = mlx4_mac_to_u64(entry->mac);
1173 mlx4_en_uc_steer_release(priv, entry->mac,
1174 priv->base_qpn,
1175 entry->reg_id);
1176 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1177
1178 hlist_del_rcu(&entry->hlist);
1179 kfree_rcu(entry, rcu);
1180 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
1181 entry->mac, priv->port);
1182 ++removed;
1183 }
1184 }
1185 }
1186
1187 /* if we didn't remove anything, there is no use in trying to add
1188 * again once we are in a forced promisc mode state
1189 */
1190 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
1191 return;
1192
1193 prev_flags = priv->flags;
1194 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
1195
1196 /* find what to add */
1197 netdev_for_each_uc_addr(ha, dev) {
1198 found = false;
1199 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
1200 hlist_for_each_entry(entry, bucket, hlist) {
1201 if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
1202 found = true;
1203 break;
1204 }
1205 }
1206
1207 if (!found) {
1208 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1209 if (!entry) {
1210 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
1211 ha->addr, priv->port);
1212 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1213 break;
1214 }
1215 mac = mlx4_mac_to_u64(ha->addr);
1216 memcpy(entry->mac, ha->addr, ETH_ALEN);
1217 err = mlx4_register_mac(mdev->dev, priv->port, mac);
1218 if (err < 0) {
1219 en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
1220 ha->addr, priv->port, err);
1221 kfree(entry);
1222 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1223 break;
1224 }
1225 err = mlx4_en_uc_steer_add(priv, ha->addr,
1226 &priv->base_qpn,
1227 &entry->reg_id);
1228 if (err) {
1229 en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
1230 ha->addr, priv->port, err);
1231 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1232 kfree(entry);
1233 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1234 break;
1235 } else {
1236 unsigned int mac_hash;
1237 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
1238 ha->addr, priv->port);
1239 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
1240 bucket = &priv->mac_hash[mac_hash];
1241 hlist_add_head_rcu(&entry->hlist, bucket);
1242 }
1243 }
1244 }
1245
1246 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1247 en_warn(priv, "Forcing promiscuous mode on port:%d\n",
1248 priv->port);
1249 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1250 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
1251 priv->port);
1252 }
1253 }
1254
mlx4_en_do_set_rx_mode(struct work_struct * work)1255 static void mlx4_en_do_set_rx_mode(struct work_struct *work)
1256 {
1257 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1258 rx_mode_task);
1259 struct mlx4_en_dev *mdev = priv->mdev;
1260 struct net_device *dev = priv->dev;
1261
1262 mutex_lock(&mdev->state_lock);
1263 if (!mdev->device_up) {
1264 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
1265 goto out;
1266 }
1267 if (!priv->port_up) {
1268 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
1269 goto out;
1270 }
1271
1272 if (!netif_carrier_ok(dev)) {
1273 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
1274 if (priv->port_state.link_state) {
1275 netif_carrier_on(dev);
1276 en_dbg(LINK, priv, "Link Up\n");
1277 }
1278 }
1279 }
1280
1281 if (dev->priv_flags & IFF_UNICAST_FLT)
1282 mlx4_en_do_uc_filter(priv, dev, mdev);
1283
1284 /* Promsicuous mode: disable all filters */
1285 if ((dev->flags & IFF_PROMISC) ||
1286 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
1287 mlx4_en_set_promisc_mode(priv, mdev);
1288 goto out;
1289 }
1290
1291 /* Not in promiscuous mode */
1292 if (priv->flags & MLX4_EN_FLAG_PROMISC)
1293 mlx4_en_clear_promisc_mode(priv, mdev);
1294
1295 mlx4_en_do_multicast(priv, dev, mdev);
1296 out:
1297 mutex_unlock(&mdev->state_lock);
1298 }
1299
mlx4_en_set_rss_steer_rules(struct mlx4_en_priv * priv)1300 static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
1301 {
1302 u64 reg_id;
1303 int err = 0;
1304 int *qpn = &priv->base_qpn;
1305 struct mlx4_mac_entry *entry;
1306
1307 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id);
1308 if (err)
1309 return err;
1310
1311 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
1312 &priv->tunnel_reg_id);
1313 if (err)
1314 goto tunnel_err;
1315
1316 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1317 if (!entry) {
1318 err = -ENOMEM;
1319 goto alloc_err;
1320 }
1321
1322 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
1323 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
1324 entry->reg_id = reg_id;
1325 hlist_add_head_rcu(&entry->hlist,
1326 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
1327
1328 return 0;
1329
1330 alloc_err:
1331 if (priv->tunnel_reg_id)
1332 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1333
1334 tunnel_err:
1335 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
1336 return err;
1337 }
1338
mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv * priv)1339 static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)
1340 {
1341 u64 mac;
1342 unsigned int i;
1343 int qpn = priv->base_qpn;
1344 struct hlist_head *bucket;
1345 struct hlist_node *tmp;
1346 struct mlx4_mac_entry *entry;
1347
1348 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1349 bucket = &priv->mac_hash[i];
1350 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1351 mac = mlx4_mac_to_u64(entry->mac);
1352 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",
1353 entry->mac);
1354 mlx4_en_uc_steer_release(priv, entry->mac,
1355 qpn, entry->reg_id);
1356
1357 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);
1358 hlist_del_rcu(&entry->hlist);
1359 kfree_rcu(entry, rcu);
1360 }
1361 }
1362
1363 if (priv->tunnel_reg_id) {
1364 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1365 priv->tunnel_reg_id = 0;
1366 }
1367 }
1368
mlx4_en_tx_timeout(struct net_device * dev,unsigned int txqueue)1369 static void mlx4_en_tx_timeout(struct net_device *dev, unsigned int txqueue)
1370 {
1371 struct mlx4_en_priv *priv = netdev_priv(dev);
1372 struct mlx4_en_dev *mdev = priv->mdev;
1373 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][txqueue];
1374
1375 if (netif_msg_timer(priv))
1376 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
1377
1378 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
1379 txqueue, tx_ring->qpn, tx_ring->sp_cqn,
1380 tx_ring->cons, tx_ring->prod);
1381
1382 priv->port_stats.tx_timeout++;
1383 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state)) {
1384 en_dbg(DRV, priv, "Scheduling port restart\n");
1385 queue_work(mdev->workqueue, &priv->restart_task);
1386 }
1387 }
1388
1389
1390 static void
mlx4_en_get_stats64(struct net_device * dev,struct rtnl_link_stats64 * stats)1391 mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
1392 {
1393 struct mlx4_en_priv *priv = netdev_priv(dev);
1394
1395 spin_lock_bh(&priv->stats_lock);
1396 mlx4_en_fold_software_stats(dev);
1397 netdev_stats_to_stats64(stats, &dev->stats);
1398 spin_unlock_bh(&priv->stats_lock);
1399 }
1400
mlx4_en_set_default_moderation(struct mlx4_en_priv * priv)1401 static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
1402 {
1403 struct mlx4_en_cq *cq;
1404 int i, t;
1405
1406 /* If we haven't received a specific coalescing setting
1407 * (module param), we set the moderation parameters as follows:
1408 * - moder_cnt is set to the number of mtu sized packets to
1409 * satisfy our coalescing target.
1410 * - moder_time is set to a fixed value.
1411 */
1412 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
1413 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
1414 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
1415 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
1416 en_dbg(INTR, priv, "Default coalescing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
1417 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
1418
1419 /* Setup cq moderation params */
1420 for (i = 0; i < priv->rx_ring_num; i++) {
1421 cq = priv->rx_cq[i];
1422 cq->moder_cnt = priv->rx_frames;
1423 cq->moder_time = priv->rx_usecs;
1424 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
1425 priv->last_moder_packets[i] = 0;
1426 priv->last_moder_bytes[i] = 0;
1427 }
1428
1429 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
1430 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1431 cq = priv->tx_cq[t][i];
1432 cq->moder_cnt = priv->tx_frames;
1433 cq->moder_time = priv->tx_usecs;
1434 }
1435 }
1436
1437 /* Reset auto-moderation params */
1438 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
1439 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
1440 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
1441 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
1442 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
1443 priv->adaptive_rx_coal = 1;
1444 priv->last_moder_jiffies = 0;
1445 priv->last_moder_tx_packets = 0;
1446 }
1447
mlx4_en_auto_moderation(struct mlx4_en_priv * priv)1448 static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
1449 {
1450 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
1451 u32 pkt_rate_high, pkt_rate_low;
1452 struct mlx4_en_cq *cq;
1453 unsigned long packets;
1454 unsigned long rate;
1455 unsigned long avg_pkt_size;
1456 unsigned long rx_packets;
1457 unsigned long rx_bytes;
1458 unsigned long rx_pkt_diff;
1459 int moder_time;
1460 int ring, err;
1461
1462 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
1463 return;
1464
1465 pkt_rate_low = READ_ONCE(priv->pkt_rate_low);
1466 pkt_rate_high = READ_ONCE(priv->pkt_rate_high);
1467
1468 for (ring = 0; ring < priv->rx_ring_num; ring++) {
1469 rx_packets = READ_ONCE(priv->rx_ring[ring]->packets);
1470 rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes);
1471
1472 rx_pkt_diff = rx_packets - priv->last_moder_packets[ring];
1473 packets = rx_pkt_diff;
1474 rate = packets * HZ / period;
1475 avg_pkt_size = packets ? (rx_bytes -
1476 priv->last_moder_bytes[ring]) / packets : 0;
1477
1478 /* Apply auto-moderation only when packet rate
1479 * exceeds a rate that it matters */
1480 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
1481 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
1482 if (rate <= pkt_rate_low)
1483 moder_time = priv->rx_usecs_low;
1484 else if (rate >= pkt_rate_high)
1485 moder_time = priv->rx_usecs_high;
1486 else
1487 moder_time = (rate - pkt_rate_low) *
1488 (priv->rx_usecs_high - priv->rx_usecs_low) /
1489 (pkt_rate_high - pkt_rate_low) +
1490 priv->rx_usecs_low;
1491 } else {
1492 moder_time = priv->rx_usecs_low;
1493 }
1494
1495 cq = priv->rx_cq[ring];
1496 if (moder_time != priv->last_moder_time[ring] ||
1497 cq->moder_cnt != priv->rx_frames) {
1498 priv->last_moder_time[ring] = moder_time;
1499 cq->moder_time = moder_time;
1500 cq->moder_cnt = priv->rx_frames;
1501 err = mlx4_en_set_cq_moder(priv, cq);
1502 if (err)
1503 en_err(priv, "Failed modifying moderation for cq:%d\n",
1504 ring);
1505 }
1506 priv->last_moder_packets[ring] = rx_packets;
1507 priv->last_moder_bytes[ring] = rx_bytes;
1508 }
1509
1510 priv->last_moder_jiffies = jiffies;
1511 }
1512
mlx4_en_do_get_stats(struct work_struct * work)1513 static void mlx4_en_do_get_stats(struct work_struct *work)
1514 {
1515 struct delayed_work *delay = to_delayed_work(work);
1516 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1517 stats_task);
1518 struct mlx4_en_dev *mdev = priv->mdev;
1519 int err;
1520
1521 mutex_lock(&mdev->state_lock);
1522 if (mdev->device_up) {
1523 if (priv->port_up) {
1524 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
1525 if (err)
1526 en_dbg(HW, priv, "Could not update stats\n");
1527
1528 mlx4_en_auto_moderation(priv);
1529 }
1530
1531 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1532 }
1533 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
1534 mlx4_en_do_set_mac(priv, priv->current_mac);
1535 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
1536 }
1537 mutex_unlock(&mdev->state_lock);
1538 }
1539
1540 /* mlx4_en_service_task - Run service task for tasks that needed to be done
1541 * periodically
1542 */
mlx4_en_service_task(struct work_struct * work)1543 static void mlx4_en_service_task(struct work_struct *work)
1544 {
1545 struct delayed_work *delay = to_delayed_work(work);
1546 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1547 service_task);
1548 struct mlx4_en_dev *mdev = priv->mdev;
1549
1550 mutex_lock(&mdev->state_lock);
1551 if (mdev->device_up) {
1552 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
1553 mlx4_en_ptp_overflow_check(mdev);
1554
1555 mlx4_en_recover_from_oom(priv);
1556 queue_delayed_work(mdev->workqueue, &priv->service_task,
1557 SERVICE_TASK_DELAY);
1558 }
1559 mutex_unlock(&mdev->state_lock);
1560 }
1561
mlx4_en_linkstate(struct mlx4_en_priv * priv)1562 static void mlx4_en_linkstate(struct mlx4_en_priv *priv)
1563 {
1564 struct mlx4_en_port_state *port_state = &priv->port_state;
1565 struct mlx4_en_dev *mdev = priv->mdev;
1566 struct net_device *dev = priv->dev;
1567 bool up;
1568
1569 if (mlx4_en_QUERY_PORT(mdev, priv->port))
1570 port_state->link_state = MLX4_PORT_STATE_DEV_EVENT_PORT_DOWN;
1571
1572 up = port_state->link_state == MLX4_PORT_STATE_DEV_EVENT_PORT_UP;
1573 if (up == netif_carrier_ok(dev))
1574 netif_carrier_event(dev);
1575 if (!up) {
1576 en_info(priv, "Link Down\n");
1577 netif_carrier_off(dev);
1578 } else {
1579 en_info(priv, "Link Up\n");
1580 netif_carrier_on(dev);
1581 }
1582 }
1583
mlx4_en_linkstate_work(struct work_struct * work)1584 static void mlx4_en_linkstate_work(struct work_struct *work)
1585 {
1586 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1587 linkstate_task);
1588 struct mlx4_en_dev *mdev = priv->mdev;
1589
1590 mutex_lock(&mdev->state_lock);
1591 mlx4_en_linkstate(priv);
1592 mutex_unlock(&mdev->state_lock);
1593 }
1594
mlx4_en_init_affinity_hint(struct mlx4_en_priv * priv,int ring_idx)1595 static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1596 {
1597 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
1598 int numa_node = priv->mdev->dev->numa_node;
1599
1600 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
1601 return -ENOMEM;
1602
1603 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
1604 ring->affinity_mask);
1605 return 0;
1606 }
1607
mlx4_en_free_affinity_hint(struct mlx4_en_priv * priv,int ring_idx)1608 static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1609 {
1610 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
1611 }
1612
mlx4_en_init_recycle_ring(struct mlx4_en_priv * priv,int tx_ring_idx)1613 static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv,
1614 int tx_ring_idx)
1615 {
1616 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx];
1617 int rr_index = tx_ring_idx;
1618
1619 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc;
1620 tx_ring->recycle_ring = priv->rx_ring[rr_index];
1621 en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n",
1622 TX_XDP, tx_ring_idx, rr_index);
1623 }
1624
mlx4_en_start_port(struct net_device * dev)1625 int mlx4_en_start_port(struct net_device *dev)
1626 {
1627 struct mlx4_en_priv *priv = netdev_priv(dev);
1628 struct mlx4_en_dev *mdev = priv->mdev;
1629 struct mlx4_en_cq *cq;
1630 struct mlx4_en_tx_ring *tx_ring;
1631 int rx_index = 0;
1632 int err = 0;
1633 int i, t;
1634 int j;
1635 u8 mc_list[16] = {0};
1636
1637 if (priv->port_up) {
1638 en_dbg(DRV, priv, "start port called while port already up\n");
1639 return 0;
1640 }
1641
1642 INIT_LIST_HEAD(&priv->mc_list);
1643 INIT_LIST_HEAD(&priv->curr_list);
1644 INIT_LIST_HEAD(&priv->ethtool_list);
1645 memset(&priv->ethtool_rules[0], 0,
1646 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
1647
1648 /* Calculate Rx buf size */
1649 dev->mtu = min(dev->mtu, priv->max_mtu);
1650 mlx4_en_calc_rx_buf(dev);
1651 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
1652
1653 /* Configure rx cq's and rings */
1654 err = mlx4_en_activate_rx_rings(priv);
1655 if (err) {
1656 en_err(priv, "Failed to activate RX rings\n");
1657 return err;
1658 }
1659 for (i = 0; i < priv->rx_ring_num; i++) {
1660 cq = priv->rx_cq[i];
1661
1662 err = mlx4_en_init_affinity_hint(priv, i);
1663 if (err) {
1664 en_err(priv, "Failed preparing IRQ affinity hint\n");
1665 goto cq_err;
1666 }
1667
1668 err = mlx4_en_activate_cq(priv, cq, i);
1669 if (err) {
1670 en_err(priv, "Failed activating Rx CQ\n");
1671 mlx4_en_free_affinity_hint(priv, i);
1672 goto cq_err;
1673 }
1674
1675 for (j = 0; j < cq->size; j++) {
1676 struct mlx4_cqe *cqe = NULL;
1677
1678 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
1679 priv->cqe_factor;
1680 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
1681 }
1682
1683 err = mlx4_en_set_cq_moder(priv, cq);
1684 if (err) {
1685 en_err(priv, "Failed setting cq moderation parameters\n");
1686 mlx4_en_deactivate_cq(priv, cq);
1687 mlx4_en_free_affinity_hint(priv, i);
1688 goto cq_err;
1689 }
1690 mlx4_en_arm_cq(priv, cq);
1691 priv->rx_ring[i]->cqn = cq->mcq.cqn;
1692 ++rx_index;
1693 }
1694
1695 /* Set qp number */
1696 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
1697 err = mlx4_en_get_qp(priv);
1698 if (err) {
1699 en_err(priv, "Failed getting eth qp\n");
1700 goto cq_err;
1701 }
1702 mdev->mac_removed[priv->port] = 0;
1703
1704 priv->counter_index =
1705 mlx4_get_default_counter_index(mdev->dev, priv->port);
1706
1707 err = mlx4_en_config_rss_steer(priv);
1708 if (err) {
1709 en_err(priv, "Failed configuring rss steering\n");
1710 goto mac_err;
1711 }
1712
1713 err = mlx4_en_create_drop_qp(priv);
1714 if (err)
1715 goto rss_err;
1716
1717 /* Configure tx cq's and rings */
1718 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
1719 u8 num_tx_rings_p_up = t == TX ?
1720 priv->num_tx_rings_p_up : priv->tx_ring_num[t];
1721
1722 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1723 /* Configure cq */
1724 cq = priv->tx_cq[t][i];
1725 err = mlx4_en_activate_cq(priv, cq, i);
1726 if (err) {
1727 en_err(priv, "Failed allocating Tx CQ\n");
1728 goto tx_err;
1729 }
1730 err = mlx4_en_set_cq_moder(priv, cq);
1731 if (err) {
1732 en_err(priv, "Failed setting cq moderation parameters\n");
1733 mlx4_en_deactivate_cq(priv, cq);
1734 goto tx_err;
1735 }
1736 en_dbg(DRV, priv,
1737 "Resetting index of collapsed CQ:%d to -1\n", i);
1738 cq->buf->wqe_index = cpu_to_be16(0xffff);
1739
1740 /* Configure ring */
1741 tx_ring = priv->tx_ring[t][i];
1742 err = mlx4_en_activate_tx_ring(priv, tx_ring,
1743 cq->mcq.cqn,
1744 i / num_tx_rings_p_up);
1745 if (err) {
1746 en_err(priv, "Failed allocating Tx ring\n");
1747 mlx4_en_deactivate_cq(priv, cq);
1748 goto tx_err;
1749 }
1750 clear_bit(MLX4_EN_TX_RING_STATE_RECOVERING, &tx_ring->state);
1751 if (t != TX_XDP) {
1752 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
1753 tx_ring->recycle_ring = NULL;
1754
1755 /* Arm CQ for TX completions */
1756 mlx4_en_arm_cq(priv, cq);
1757
1758 } else {
1759 mlx4_en_init_tx_xdp_ring_descs(priv, tx_ring);
1760 mlx4_en_init_recycle_ring(priv, i);
1761 /* XDP TX CQ should never be armed */
1762 }
1763
1764 /* Set initial ownership of all Tx TXBBs to SW (1) */
1765 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
1766 *((u32 *)(tx_ring->buf + j)) = 0xffffffff;
1767 }
1768 }
1769
1770 /* Configure port */
1771 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1772 priv->rx_skb_size + ETH_FCS_LEN,
1773 priv->prof->tx_pause,
1774 priv->prof->tx_ppp,
1775 priv->prof->rx_pause,
1776 priv->prof->rx_ppp);
1777 if (err) {
1778 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
1779 priv->port, err);
1780 goto tx_err;
1781 }
1782
1783 err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu);
1784 if (err) {
1785 en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n",
1786 dev->mtu, priv->port, err);
1787 goto tx_err;
1788 }
1789
1790 /* Set default qp number */
1791 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
1792 if (err) {
1793 en_err(priv, "Failed setting default qp numbers\n");
1794 goto tx_err;
1795 }
1796
1797 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
1798 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
1799 if (err) {
1800 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
1801 err);
1802 goto tx_err;
1803 }
1804 }
1805
1806 /* Init port */
1807 en_dbg(HW, priv, "Initializing port\n");
1808 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1809 if (err) {
1810 en_err(priv, "Failed Initializing port\n");
1811 goto tx_err;
1812 }
1813
1814 /* Set Unicast and VXLAN steering rules */
1815 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&
1816 mlx4_en_set_rss_steer_rules(priv))
1817 mlx4_warn(mdev, "Failed setting steering rules\n");
1818
1819 /* Attach rx QP to bradcast address */
1820 eth_broadcast_addr(&mc_list[10]);
1821 mc_list[5] = priv->port; /* needed for B0 steering support */
1822 if (mlx4_multicast_attach(mdev->dev, priv->rss_map.indir_qp, mc_list,
1823 priv->port, 0, MLX4_PROT_ETH,
1824 &priv->broadcast_id))
1825 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
1826
1827 /* Must redo promiscuous mode setup. */
1828 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
1829
1830 /* Schedule multicast task to populate multicast list */
1831 queue_work(mdev->workqueue, &priv->rx_mode_task);
1832
1833 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
1834 udp_tunnel_nic_reset_ntf(dev);
1835
1836 priv->port_up = true;
1837
1838 /* Process all completions if exist to prevent
1839 * the queues freezing if they are full
1840 */
1841 for (i = 0; i < priv->rx_ring_num; i++) {
1842 local_bh_disable();
1843 napi_schedule(&priv->rx_cq[i]->napi);
1844 local_bh_enable();
1845 }
1846
1847 clear_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state);
1848 netif_tx_start_all_queues(dev);
1849 netif_device_attach(dev);
1850
1851 return 0;
1852
1853 tx_err:
1854 if (t == MLX4_EN_NUM_TX_TYPES) {
1855 t--;
1856 i = priv->tx_ring_num[t];
1857 }
1858 while (t >= 0) {
1859 while (i--) {
1860 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
1861 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
1862 }
1863 if (!t--)
1864 break;
1865 i = priv->tx_ring_num[t];
1866 }
1867 mlx4_en_destroy_drop_qp(priv);
1868 rss_err:
1869 mlx4_en_release_rss_steer(priv);
1870 mac_err:
1871 mlx4_en_put_qp(priv);
1872 cq_err:
1873 while (rx_index--) {
1874 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
1875 mlx4_en_free_affinity_hint(priv, rx_index);
1876 }
1877 for (i = 0; i < priv->rx_ring_num; i++)
1878 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1879
1880 return err; /* need to close devices */
1881 }
1882
1883
mlx4_en_stop_port(struct net_device * dev,int detach)1884 void mlx4_en_stop_port(struct net_device *dev, int detach)
1885 {
1886 struct mlx4_en_priv *priv = netdev_priv(dev);
1887 struct mlx4_en_dev *mdev = priv->mdev;
1888 struct mlx4_en_mc_list *mclist, *tmp;
1889 struct ethtool_flow_id *flow, *tmp_flow;
1890 int i, t;
1891 u8 mc_list[16] = {0};
1892
1893 if (!priv->port_up) {
1894 en_dbg(DRV, priv, "stop port called while port already down\n");
1895 return;
1896 }
1897
1898 /* close port*/
1899 mlx4_CLOSE_PORT(mdev->dev, priv->port);
1900
1901 /* Synchronize with tx routine */
1902 netif_tx_lock_bh(dev);
1903 if (detach)
1904 netif_device_detach(dev);
1905 netif_tx_stop_all_queues(dev);
1906 netif_tx_unlock_bh(dev);
1907
1908 netif_tx_disable(dev);
1909
1910 spin_lock_bh(&priv->stats_lock);
1911 mlx4_en_fold_software_stats(dev);
1912 /* Set port as not active */
1913 priv->port_up = false;
1914 spin_unlock_bh(&priv->stats_lock);
1915
1916 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
1917
1918 /* Promsicuous mode */
1919 if (mdev->dev->caps.steering_mode ==
1920 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1921 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
1922 MLX4_EN_FLAG_MC_PROMISC);
1923 mlx4_flow_steer_promisc_remove(mdev->dev,
1924 priv->port,
1925 MLX4_FS_ALL_DEFAULT);
1926 mlx4_flow_steer_promisc_remove(mdev->dev,
1927 priv->port,
1928 MLX4_FS_MC_DEFAULT);
1929 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
1930 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
1931
1932 /* Disable promiscouos mode */
1933 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
1934 priv->port);
1935
1936 /* Disable Multicast promisc */
1937 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1938 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
1939 priv->port);
1940 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1941 }
1942 }
1943
1944 /* Detach All multicasts */
1945 eth_broadcast_addr(&mc_list[10]);
1946 mc_list[5] = priv->port; /* needed for B0 steering support */
1947 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, mc_list,
1948 MLX4_PROT_ETH, priv->broadcast_id);
1949 list_for_each_entry(mclist, &priv->curr_list, list) {
1950 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1951 mc_list[5] = priv->port;
1952 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp,
1953 mc_list, MLX4_PROT_ETH, mclist->reg_id);
1954 if (mclist->tunnel_reg_id)
1955 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
1956 }
1957 mlx4_en_clear_list(dev);
1958 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1959 list_del(&mclist->list);
1960 kfree(mclist);
1961 }
1962
1963 /* Flush multicast filter */
1964 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
1965
1966 /* Remove flow steering rules for the port*/
1967 if (mdev->dev->caps.steering_mode ==
1968 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1969 ASSERT_RTNL();
1970 list_for_each_entry_safe(flow, tmp_flow,
1971 &priv->ethtool_list, list) {
1972 mlx4_flow_detach(mdev->dev, flow->id);
1973 list_del(&flow->list);
1974 }
1975 }
1976
1977 mlx4_en_destroy_drop_qp(priv);
1978
1979 /* Free TX Rings */
1980 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
1981 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1982 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
1983 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
1984 }
1985 }
1986 msleep(10);
1987
1988 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
1989 for (i = 0; i < priv->tx_ring_num[t]; i++)
1990 mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]);
1991
1992 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
1993 mlx4_en_delete_rss_steer_rules(priv);
1994
1995 /* Free RSS qps */
1996 mlx4_en_release_rss_steer(priv);
1997
1998 /* Unregister Mac address for the port */
1999 mlx4_en_put_qp(priv);
2000 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
2001 mdev->mac_removed[priv->port] = 1;
2002
2003 /* Free RX Rings */
2004 for (i = 0; i < priv->rx_ring_num; i++) {
2005 struct mlx4_en_cq *cq = priv->rx_cq[i];
2006
2007 napi_synchronize(&cq->napi);
2008 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
2009 mlx4_en_deactivate_cq(priv, cq);
2010
2011 mlx4_en_free_affinity_hint(priv, i);
2012 }
2013 }
2014
mlx4_en_restart(struct work_struct * work)2015 static void mlx4_en_restart(struct work_struct *work)
2016 {
2017 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2018 restart_task);
2019 struct mlx4_en_dev *mdev = priv->mdev;
2020 struct net_device *dev = priv->dev;
2021
2022 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
2023
2024 rtnl_lock();
2025 mutex_lock(&mdev->state_lock);
2026 if (priv->port_up) {
2027 mlx4_en_stop_port(dev, 1);
2028 if (mlx4_en_start_port(dev))
2029 en_err(priv, "Failed restarting port %d\n", priv->port);
2030 }
2031 mutex_unlock(&mdev->state_lock);
2032 rtnl_unlock();
2033 }
2034
mlx4_en_clear_stats(struct net_device * dev)2035 static void mlx4_en_clear_stats(struct net_device *dev)
2036 {
2037 struct mlx4_en_priv *priv = netdev_priv(dev);
2038 struct mlx4_en_dev *mdev = priv->mdev;
2039 struct mlx4_en_tx_ring **tx_ring;
2040 int i;
2041
2042 if (!mlx4_is_slave(mdev->dev))
2043 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
2044 en_dbg(HW, priv, "Failed dumping statistics\n");
2045
2046 memset(&priv->pkstats, 0, sizeof(priv->pkstats));
2047 memset(&priv->port_stats, 0, sizeof(priv->port_stats));
2048 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
2049 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
2050 memset(&priv->rx_priority_flowstats, 0,
2051 sizeof(priv->rx_priority_flowstats));
2052 memset(&priv->tx_priority_flowstats, 0,
2053 sizeof(priv->tx_priority_flowstats));
2054 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));
2055
2056 tx_ring = priv->tx_ring[TX];
2057 for (i = 0; i < priv->tx_ring_num[TX]; i++) {
2058 tx_ring[i]->bytes = 0;
2059 tx_ring[i]->packets = 0;
2060 tx_ring[i]->tx_csum = 0;
2061 tx_ring[i]->tx_dropped = 0;
2062 tx_ring[i]->queue_stopped = 0;
2063 tx_ring[i]->wake_queue = 0;
2064 tx_ring[i]->tso_packets = 0;
2065 tx_ring[i]->xmit_more = 0;
2066 }
2067 for (i = 0; i < priv->rx_ring_num; i++) {
2068 priv->rx_ring[i]->bytes = 0;
2069 priv->rx_ring[i]->packets = 0;
2070 priv->rx_ring[i]->csum_ok = 0;
2071 priv->rx_ring[i]->csum_none = 0;
2072 priv->rx_ring[i]->csum_complete = 0;
2073 }
2074 }
2075
mlx4_en_open(struct net_device * dev)2076 static int mlx4_en_open(struct net_device *dev)
2077 {
2078 struct mlx4_en_priv *priv = netdev_priv(dev);
2079 struct mlx4_en_dev *mdev = priv->mdev;
2080 int err = 0;
2081
2082 mutex_lock(&mdev->state_lock);
2083
2084 if (!mdev->device_up) {
2085 en_err(priv, "Cannot open - device down/disabled\n");
2086 err = -EBUSY;
2087 goto out;
2088 }
2089
2090 /* Reset HW statistics and SW counters */
2091 mlx4_en_clear_stats(dev);
2092
2093 err = mlx4_en_start_port(dev);
2094 if (err) {
2095 en_err(priv, "Failed starting port:%d\n", priv->port);
2096 goto out;
2097 }
2098 mlx4_en_linkstate(priv);
2099 out:
2100 mutex_unlock(&mdev->state_lock);
2101 return err;
2102 }
2103
2104
mlx4_en_close(struct net_device * dev)2105 static int mlx4_en_close(struct net_device *dev)
2106 {
2107 struct mlx4_en_priv *priv = netdev_priv(dev);
2108 struct mlx4_en_dev *mdev = priv->mdev;
2109
2110 en_dbg(IFDOWN, priv, "Close port called\n");
2111
2112 mutex_lock(&mdev->state_lock);
2113
2114 mlx4_en_stop_port(dev, 0);
2115 netif_carrier_off(dev);
2116
2117 mutex_unlock(&mdev->state_lock);
2118 return 0;
2119 }
2120
mlx4_en_free_resources(struct mlx4_en_priv * priv)2121 static void mlx4_en_free_resources(struct mlx4_en_priv *priv)
2122 {
2123 int i, t;
2124
2125 #ifdef CONFIG_RFS_ACCEL
2126 priv->dev->rx_cpu_rmap = NULL;
2127 #endif
2128
2129 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2130 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2131 if (priv->tx_ring[t] && priv->tx_ring[t][i])
2132 mlx4_en_destroy_tx_ring(priv,
2133 &priv->tx_ring[t][i]);
2134 if (priv->tx_cq[t] && priv->tx_cq[t][i])
2135 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
2136 }
2137 kfree(priv->tx_ring[t]);
2138 kfree(priv->tx_cq[t]);
2139 }
2140
2141 for (i = 0; i < priv->rx_ring_num; i++) {
2142 if (priv->rx_ring[i])
2143 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2144 priv->prof->rx_ring_size, priv->stride);
2145 if (priv->rx_cq[i])
2146 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2147 }
2148
2149 }
2150
mlx4_en_alloc_resources(struct mlx4_en_priv * priv)2151 static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
2152 {
2153 struct mlx4_en_port_profile *prof = priv->prof;
2154 int i, t;
2155 int node;
2156
2157 /* Create tx Rings */
2158 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2159 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2160 node = cpu_to_node(i % num_online_cpus());
2161 if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i],
2162 prof->tx_ring_size, i, t, node))
2163 goto err;
2164
2165 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i],
2166 prof->tx_ring_size,
2167 TXBB_SIZE, node, i))
2168 goto err;
2169 }
2170 }
2171
2172 /* Create rx Rings */
2173 for (i = 0; i < priv->rx_ring_num; i++) {
2174 node = cpu_to_node(i % num_online_cpus());
2175 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
2176 prof->rx_ring_size, i, RX, node))
2177 goto err;
2178
2179 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
2180 prof->rx_ring_size, priv->stride,
2181 node, i))
2182 goto err;
2183
2184 }
2185
2186 #ifdef CONFIG_RFS_ACCEL
2187 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);
2188 #endif
2189
2190 return 0;
2191
2192 err:
2193 en_err(priv, "Failed to allocate NIC resources\n");
2194 for (i = 0; i < priv->rx_ring_num; i++) {
2195 if (priv->rx_ring[i])
2196 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2197 prof->rx_ring_size,
2198 priv->stride);
2199 if (priv->rx_cq[i])
2200 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2201 }
2202 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2203 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2204 if (priv->tx_ring[t][i])
2205 mlx4_en_destroy_tx_ring(priv,
2206 &priv->tx_ring[t][i]);
2207 if (priv->tx_cq[t][i])
2208 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
2209 }
2210 }
2211 return -ENOMEM;
2212 }
2213
2214
mlx4_en_copy_priv(struct mlx4_en_priv * dst,struct mlx4_en_priv * src,struct mlx4_en_port_profile * prof)2215 static int mlx4_en_copy_priv(struct mlx4_en_priv *dst,
2216 struct mlx4_en_priv *src,
2217 struct mlx4_en_port_profile *prof)
2218 {
2219 int t;
2220
2221 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config,
2222 sizeof(dst->hwtstamp_config));
2223 dst->num_tx_rings_p_up = prof->num_tx_rings_p_up;
2224 dst->rx_ring_num = prof->rx_ring_num;
2225 dst->flags = prof->flags;
2226 dst->mdev = src->mdev;
2227 dst->port = src->port;
2228 dst->dev = src->dev;
2229 dst->prof = prof;
2230 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
2231 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
2232
2233 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2234 dst->tx_ring_num[t] = prof->tx_ring_num[t];
2235 if (!dst->tx_ring_num[t])
2236 continue;
2237
2238 dst->tx_ring[t] = kcalloc(MAX_TX_RINGS,
2239 sizeof(struct mlx4_en_tx_ring *),
2240 GFP_KERNEL);
2241 if (!dst->tx_ring[t])
2242 goto err_free_tx;
2243
2244 dst->tx_cq[t] = kcalloc(MAX_TX_RINGS,
2245 sizeof(struct mlx4_en_cq *),
2246 GFP_KERNEL);
2247 if (!dst->tx_cq[t]) {
2248 kfree(dst->tx_ring[t]);
2249 goto err_free_tx;
2250 }
2251 }
2252
2253 return 0;
2254
2255 err_free_tx:
2256 while (t--) {
2257 kfree(dst->tx_ring[t]);
2258 kfree(dst->tx_cq[t]);
2259 }
2260 return -ENOMEM;
2261 }
2262
mlx4_en_update_priv(struct mlx4_en_priv * dst,struct mlx4_en_priv * src)2263 static void mlx4_en_update_priv(struct mlx4_en_priv *dst,
2264 struct mlx4_en_priv *src)
2265 {
2266 int t;
2267 memcpy(dst->rx_ring, src->rx_ring,
2268 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num);
2269 memcpy(dst->rx_cq, src->rx_cq,
2270 sizeof(struct mlx4_en_cq *) * src->rx_ring_num);
2271 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config,
2272 sizeof(dst->hwtstamp_config));
2273 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2274 dst->tx_ring_num[t] = src->tx_ring_num[t];
2275 dst->tx_ring[t] = src->tx_ring[t];
2276 dst->tx_cq[t] = src->tx_cq[t];
2277 }
2278 dst->num_tx_rings_p_up = src->num_tx_rings_p_up;
2279 dst->rx_ring_num = src->rx_ring_num;
2280 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile));
2281 }
2282
mlx4_en_try_alloc_resources(struct mlx4_en_priv * priv,struct mlx4_en_priv * tmp,struct mlx4_en_port_profile * prof,bool carry_xdp_prog)2283 int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,
2284 struct mlx4_en_priv *tmp,
2285 struct mlx4_en_port_profile *prof,
2286 bool carry_xdp_prog)
2287 {
2288 struct bpf_prog *xdp_prog;
2289 int i, t, ret;
2290
2291 ret = mlx4_en_copy_priv(tmp, priv, prof);
2292 if (ret) {
2293 en_warn(priv, "%s: mlx4_en_copy_priv() failed, return\n",
2294 __func__);
2295 return ret;
2296 }
2297
2298 if (mlx4_en_alloc_resources(tmp)) {
2299 en_warn(priv,
2300 "%s: Resource allocation failed, using previous configuration\n",
2301 __func__);
2302 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2303 kfree(tmp->tx_ring[t]);
2304 kfree(tmp->tx_cq[t]);
2305 }
2306 return -ENOMEM;
2307 }
2308
2309 /* All rx_rings has the same xdp_prog. Pick the first one. */
2310 xdp_prog = rcu_dereference_protected(
2311 priv->rx_ring[0]->xdp_prog,
2312 lockdep_is_held(&priv->mdev->state_lock));
2313
2314 if (xdp_prog && carry_xdp_prog) {
2315 bpf_prog_add(xdp_prog, tmp->rx_ring_num);
2316 for (i = 0; i < tmp->rx_ring_num; i++)
2317 rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog,
2318 xdp_prog);
2319 }
2320
2321 return 0;
2322 }
2323
mlx4_en_safe_replace_resources(struct mlx4_en_priv * priv,struct mlx4_en_priv * tmp)2324 void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,
2325 struct mlx4_en_priv *tmp)
2326 {
2327 mlx4_en_free_resources(priv);
2328 mlx4_en_update_priv(priv, tmp);
2329 }
2330
mlx4_en_destroy_netdev(struct net_device * dev)2331 void mlx4_en_destroy_netdev(struct net_device *dev)
2332 {
2333 struct mlx4_en_priv *priv = netdev_priv(dev);
2334 struct mlx4_en_dev *mdev = priv->mdev;
2335
2336 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
2337
2338 /* Unregister device - this will close the port if it was up */
2339 if (priv->registered) {
2340 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev,
2341 priv->port));
2342 unregister_netdev(dev);
2343 }
2344
2345 if (priv->allocated)
2346 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
2347
2348 cancel_delayed_work(&priv->stats_task);
2349 cancel_delayed_work(&priv->service_task);
2350 /* flush any pending task for this netdev */
2351 flush_workqueue(mdev->workqueue);
2352
2353 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
2354 mlx4_en_remove_timestamp(mdev);
2355
2356 /* Detach the netdev so tasks would not attempt to access it */
2357 mutex_lock(&mdev->state_lock);
2358 mdev->pndev[priv->port] = NULL;
2359 mdev->upper[priv->port] = NULL;
2360
2361 #ifdef CONFIG_RFS_ACCEL
2362 mlx4_en_cleanup_filters(priv);
2363 #endif
2364
2365 mlx4_en_free_resources(priv);
2366 mutex_unlock(&mdev->state_lock);
2367
2368 free_netdev(dev);
2369 }
2370
mlx4_en_check_xdp_mtu(struct net_device * dev,int mtu)2371 static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu)
2372 {
2373 struct mlx4_en_priv *priv = netdev_priv(dev);
2374
2375 if (mtu > MLX4_EN_MAX_XDP_MTU) {
2376 en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n",
2377 mtu, MLX4_EN_MAX_XDP_MTU);
2378 return false;
2379 }
2380
2381 return true;
2382 }
2383
mlx4_en_change_mtu(struct net_device * dev,int new_mtu)2384 static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
2385 {
2386 struct mlx4_en_priv *priv = netdev_priv(dev);
2387 struct mlx4_en_dev *mdev = priv->mdev;
2388 int err = 0;
2389
2390 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
2391 dev->mtu, new_mtu);
2392
2393 if (priv->tx_ring_num[TX_XDP] &&
2394 !mlx4_en_check_xdp_mtu(dev, new_mtu))
2395 return -EOPNOTSUPP;
2396
2397 dev->mtu = new_mtu;
2398
2399 if (netif_running(dev)) {
2400 mutex_lock(&mdev->state_lock);
2401 if (!mdev->device_up) {
2402 /* NIC is probably restarting - let restart task reset
2403 * the port */
2404 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
2405 } else {
2406 mlx4_en_stop_port(dev, 1);
2407 err = mlx4_en_start_port(dev);
2408 if (err) {
2409 en_err(priv, "Failed restarting port:%d\n",
2410 priv->port);
2411 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING,
2412 &priv->state))
2413 queue_work(mdev->workqueue, &priv->restart_task);
2414 }
2415 }
2416 mutex_unlock(&mdev->state_lock);
2417 }
2418 return 0;
2419 }
2420
mlx4_en_hwtstamp_set(struct net_device * dev,struct ifreq * ifr)2421 static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
2422 {
2423 struct mlx4_en_priv *priv = netdev_priv(dev);
2424 struct mlx4_en_dev *mdev = priv->mdev;
2425 struct hwtstamp_config config;
2426
2427 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
2428 return -EFAULT;
2429
2430 /* reserved for future extensions */
2431 if (config.flags)
2432 return -EINVAL;
2433
2434 /* device doesn't support time stamping */
2435 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
2436 return -EINVAL;
2437
2438 /* TX HW timestamp */
2439 switch (config.tx_type) {
2440 case HWTSTAMP_TX_OFF:
2441 case HWTSTAMP_TX_ON:
2442 break;
2443 default:
2444 return -ERANGE;
2445 }
2446
2447 /* RX HW timestamp */
2448 switch (config.rx_filter) {
2449 case HWTSTAMP_FILTER_NONE:
2450 break;
2451 case HWTSTAMP_FILTER_ALL:
2452 case HWTSTAMP_FILTER_SOME:
2453 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
2454 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
2455 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
2456 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
2457 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
2458 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
2459 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
2460 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
2461 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
2462 case HWTSTAMP_FILTER_PTP_V2_EVENT:
2463 case HWTSTAMP_FILTER_PTP_V2_SYNC:
2464 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
2465 case HWTSTAMP_FILTER_NTP_ALL:
2466 config.rx_filter = HWTSTAMP_FILTER_ALL;
2467 break;
2468 default:
2469 return -ERANGE;
2470 }
2471
2472 if (mlx4_en_reset_config(dev, config, dev->features)) {
2473 config.tx_type = HWTSTAMP_TX_OFF;
2474 config.rx_filter = HWTSTAMP_FILTER_NONE;
2475 }
2476
2477 return copy_to_user(ifr->ifr_data, &config,
2478 sizeof(config)) ? -EFAULT : 0;
2479 }
2480
mlx4_en_hwtstamp_get(struct net_device * dev,struct ifreq * ifr)2481 static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
2482 {
2483 struct mlx4_en_priv *priv = netdev_priv(dev);
2484
2485 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
2486 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
2487 }
2488
mlx4_en_ioctl(struct net_device * dev,struct ifreq * ifr,int cmd)2489 static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2490 {
2491 switch (cmd) {
2492 case SIOCSHWTSTAMP:
2493 return mlx4_en_hwtstamp_set(dev, ifr);
2494 case SIOCGHWTSTAMP:
2495 return mlx4_en_hwtstamp_get(dev, ifr);
2496 default:
2497 return -EOPNOTSUPP;
2498 }
2499 }
2500
mlx4_en_fix_features(struct net_device * netdev,netdev_features_t features)2501 static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,
2502 netdev_features_t features)
2503 {
2504 struct mlx4_en_priv *en_priv = netdev_priv(netdev);
2505 struct mlx4_en_dev *mdev = en_priv->mdev;
2506
2507 /* Since there is no support for separate RX C-TAG/S-TAG vlan accel
2508 * enable/disable make sure S-TAG flag is always in same state as
2509 * C-TAG.
2510 */
2511 if (features & NETIF_F_HW_VLAN_CTAG_RX &&
2512 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
2513 features |= NETIF_F_HW_VLAN_STAG_RX;
2514 else
2515 features &= ~NETIF_F_HW_VLAN_STAG_RX;
2516
2517 return features;
2518 }
2519
mlx4_en_set_features(struct net_device * netdev,netdev_features_t features)2520 static int mlx4_en_set_features(struct net_device *netdev,
2521 netdev_features_t features)
2522 {
2523 struct mlx4_en_priv *priv = netdev_priv(netdev);
2524 bool reset = false;
2525 int ret = 0;
2526
2527 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
2528 en_info(priv, "Turn %s RX-FCS\n",
2529 (features & NETIF_F_RXFCS) ? "ON" : "OFF");
2530 reset = true;
2531 }
2532
2533 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
2534 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
2535
2536 en_info(priv, "Turn %s RX-ALL\n",
2537 ignore_fcs_value ? "ON" : "OFF");
2538 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
2539 priv->port, ignore_fcs_value);
2540 if (ret)
2541 return ret;
2542 }
2543
2544 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
2545 en_info(priv, "Turn %s RX vlan strip offload\n",
2546 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
2547 reset = true;
2548 }
2549
2550 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
2551 en_info(priv, "Turn %s TX vlan strip offload\n",
2552 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
2553
2554 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))
2555 en_info(priv, "Turn %s TX S-VLAN strip offload\n",
2556 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");
2557
2558 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
2559 en_info(priv, "Turn %s loopback\n",
2560 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
2561 mlx4_en_update_loopback_state(netdev, features);
2562 }
2563
2564 if (reset) {
2565 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
2566 features);
2567 if (ret)
2568 return ret;
2569 }
2570
2571 return 0;
2572 }
2573
mlx4_en_set_vf_mac(struct net_device * dev,int queue,u8 * mac)2574 static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
2575 {
2576 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2577 struct mlx4_en_dev *mdev = en_priv->mdev;
2578
2579 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac);
2580 }
2581
mlx4_en_set_vf_vlan(struct net_device * dev,int vf,u16 vlan,u8 qos,__be16 vlan_proto)2582 static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos,
2583 __be16 vlan_proto)
2584 {
2585 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2586 struct mlx4_en_dev *mdev = en_priv->mdev;
2587
2588 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos,
2589 vlan_proto);
2590 }
2591
mlx4_en_set_vf_rate(struct net_device * dev,int vf,int min_tx_rate,int max_tx_rate)2592 static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,
2593 int max_tx_rate)
2594 {
2595 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2596 struct mlx4_en_dev *mdev = en_priv->mdev;
2597
2598 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
2599 max_tx_rate);
2600 }
2601
mlx4_en_set_vf_spoofchk(struct net_device * dev,int vf,bool setting)2602 static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
2603 {
2604 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2605 struct mlx4_en_dev *mdev = en_priv->mdev;
2606
2607 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
2608 }
2609
mlx4_en_get_vf_config(struct net_device * dev,int vf,struct ifla_vf_info * ivf)2610 static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
2611 {
2612 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2613 struct mlx4_en_dev *mdev = en_priv->mdev;
2614
2615 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
2616 }
2617
mlx4_en_set_vf_link_state(struct net_device * dev,int vf,int link_state)2618 static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
2619 {
2620 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2621 struct mlx4_en_dev *mdev = en_priv->mdev;
2622
2623 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
2624 }
2625
mlx4_en_get_vf_stats(struct net_device * dev,int vf,struct ifla_vf_stats * vf_stats)2626 static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,
2627 struct ifla_vf_stats *vf_stats)
2628 {
2629 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2630 struct mlx4_en_dev *mdev = en_priv->mdev;
2631
2632 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);
2633 }
2634
2635 #define PORT_ID_BYTE_LEN 8
mlx4_en_get_phys_port_id(struct net_device * dev,struct netdev_phys_item_id * ppid)2636 static int mlx4_en_get_phys_port_id(struct net_device *dev,
2637 struct netdev_phys_item_id *ppid)
2638 {
2639 struct mlx4_en_priv *priv = netdev_priv(dev);
2640 struct mlx4_dev *mdev = priv->mdev->dev;
2641 int i;
2642 u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
2643
2644 if (!phys_port_id)
2645 return -EOPNOTSUPP;
2646
2647 ppid->id_len = sizeof(phys_port_id);
2648 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
2649 ppid->id[i] = phys_port_id & 0xff;
2650 phys_port_id >>= 8;
2651 }
2652 return 0;
2653 }
2654
mlx4_udp_tunnel_sync(struct net_device * dev,unsigned int table)2655 static int mlx4_udp_tunnel_sync(struct net_device *dev, unsigned int table)
2656 {
2657 struct mlx4_en_priv *priv = netdev_priv(dev);
2658 struct udp_tunnel_info ti;
2659 int ret;
2660
2661 udp_tunnel_nic_get_port(dev, table, 0, &ti);
2662 priv->vxlan_port = ti.port;
2663
2664 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
2665 if (ret)
2666 return ret;
2667
2668 return mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
2669 VXLAN_STEER_BY_OUTER_MAC,
2670 !!priv->vxlan_port);
2671 }
2672
2673 static const struct udp_tunnel_nic_info mlx4_udp_tunnels = {
2674 .sync_table = mlx4_udp_tunnel_sync,
2675 .flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP |
2676 UDP_TUNNEL_NIC_INFO_IPV4_ONLY,
2677 .tables = {
2678 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },
2679 },
2680 };
2681
mlx4_en_features_check(struct sk_buff * skb,struct net_device * dev,netdev_features_t features)2682 static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
2683 struct net_device *dev,
2684 netdev_features_t features)
2685 {
2686 features = vlan_features_check(skb, features);
2687 features = vxlan_features_check(skb, features);
2688
2689 /* The ConnectX-3 doesn't support outer IPv6 checksums but it does
2690 * support inner IPv6 checksums and segmentation so we need to
2691 * strip that feature if this is an IPv6 encapsulated frame.
2692 */
2693 if (skb->encapsulation &&
2694 (skb->ip_summed == CHECKSUM_PARTIAL)) {
2695 struct mlx4_en_priv *priv = netdev_priv(dev);
2696
2697 if (!priv->vxlan_port ||
2698 (ip_hdr(skb)->version != 4) ||
2699 (udp_hdr(skb)->dest != priv->vxlan_port))
2700 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2701 }
2702
2703 return features;
2704 }
2705
mlx4_en_set_tx_maxrate(struct net_device * dev,int queue_index,u32 maxrate)2706 static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
2707 {
2708 struct mlx4_en_priv *priv = netdev_priv(dev);
2709 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index];
2710 struct mlx4_update_qp_params params;
2711 int err;
2712
2713 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
2714 return -EOPNOTSUPP;
2715
2716 /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */
2717 if (maxrate >> 12) {
2718 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
2719 params.rate_val = maxrate / 1000;
2720 } else if (maxrate) {
2721 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
2722 params.rate_val = maxrate;
2723 } else { /* zero serves to revoke the QP rate-limitation */
2724 params.rate_unit = 0;
2725 params.rate_val = 0;
2726 }
2727
2728 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
2729 ¶ms);
2730 return err;
2731 }
2732
mlx4_xdp_set(struct net_device * dev,struct bpf_prog * prog)2733 static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog)
2734 {
2735 struct mlx4_en_priv *priv = netdev_priv(dev);
2736 struct mlx4_en_dev *mdev = priv->mdev;
2737 struct mlx4_en_port_profile new_prof;
2738 struct bpf_prog *old_prog;
2739 struct mlx4_en_priv *tmp;
2740 int tx_changed = 0;
2741 int xdp_ring_num;
2742 int port_up = 0;
2743 int err;
2744 int i;
2745
2746 xdp_ring_num = prog ? priv->rx_ring_num : 0;
2747
2748 /* No need to reconfigure buffers when simply swapping the
2749 * program for a new one.
2750 */
2751 if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) {
2752 if (prog)
2753 bpf_prog_add(prog, priv->rx_ring_num - 1);
2754
2755 mutex_lock(&mdev->state_lock);
2756 for (i = 0; i < priv->rx_ring_num; i++) {
2757 old_prog = rcu_dereference_protected(
2758 priv->rx_ring[i]->xdp_prog,
2759 lockdep_is_held(&mdev->state_lock));
2760 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
2761 if (old_prog)
2762 bpf_prog_put(old_prog);
2763 }
2764 mutex_unlock(&mdev->state_lock);
2765 return 0;
2766 }
2767
2768 if (!mlx4_en_check_xdp_mtu(dev, dev->mtu))
2769 return -EOPNOTSUPP;
2770
2771 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
2772 if (!tmp)
2773 return -ENOMEM;
2774
2775 if (prog)
2776 bpf_prog_add(prog, priv->rx_ring_num - 1);
2777
2778 mutex_lock(&mdev->state_lock);
2779 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
2780 new_prof.tx_ring_num[TX_XDP] = xdp_ring_num;
2781
2782 if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) {
2783 tx_changed = 1;
2784 new_prof.tx_ring_num[TX] =
2785 MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up);
2786 en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n");
2787 }
2788
2789 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false);
2790 if (err) {
2791 if (prog)
2792 bpf_prog_sub(prog, priv->rx_ring_num - 1);
2793 goto unlock_out;
2794 }
2795
2796 if (priv->port_up) {
2797 port_up = 1;
2798 mlx4_en_stop_port(dev, 1);
2799 }
2800
2801 mlx4_en_safe_replace_resources(priv, tmp);
2802 if (tx_changed)
2803 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
2804
2805 for (i = 0; i < priv->rx_ring_num; i++) {
2806 old_prog = rcu_dereference_protected(
2807 priv->rx_ring[i]->xdp_prog,
2808 lockdep_is_held(&mdev->state_lock));
2809 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
2810 if (old_prog)
2811 bpf_prog_put(old_prog);
2812 }
2813
2814 if (port_up) {
2815 err = mlx4_en_start_port(dev);
2816 if (err) {
2817 en_err(priv, "Failed starting port %d for XDP change\n",
2818 priv->port);
2819 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state))
2820 queue_work(mdev->workqueue, &priv->restart_task);
2821 }
2822 }
2823
2824 unlock_out:
2825 mutex_unlock(&mdev->state_lock);
2826 kfree(tmp);
2827 return err;
2828 }
2829
mlx4_xdp(struct net_device * dev,struct netdev_bpf * xdp)2830 static int mlx4_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2831 {
2832 switch (xdp->command) {
2833 case XDP_SETUP_PROG:
2834 return mlx4_xdp_set(dev, xdp->prog);
2835 default:
2836 return -EINVAL;
2837 }
2838 }
2839
2840 static const struct net_device_ops mlx4_netdev_ops = {
2841 .ndo_open = mlx4_en_open,
2842 .ndo_stop = mlx4_en_close,
2843 .ndo_start_xmit = mlx4_en_xmit,
2844 .ndo_select_queue = mlx4_en_select_queue,
2845 .ndo_get_stats64 = mlx4_en_get_stats64,
2846 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2847 .ndo_set_mac_address = mlx4_en_set_mac,
2848 .ndo_validate_addr = eth_validate_addr,
2849 .ndo_change_mtu = mlx4_en_change_mtu,
2850 .ndo_eth_ioctl = mlx4_en_ioctl,
2851 .ndo_tx_timeout = mlx4_en_tx_timeout,
2852 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2853 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2854 .ndo_set_features = mlx4_en_set_features,
2855 .ndo_fix_features = mlx4_en_fix_features,
2856 .ndo_setup_tc = __mlx4_en_setup_tc,
2857 #ifdef CONFIG_RFS_ACCEL
2858 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2859 #endif
2860 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2861 .ndo_features_check = mlx4_en_features_check,
2862 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2863 .ndo_bpf = mlx4_xdp,
2864 };
2865
2866 static const struct net_device_ops mlx4_netdev_ops_master = {
2867 .ndo_open = mlx4_en_open,
2868 .ndo_stop = mlx4_en_close,
2869 .ndo_start_xmit = mlx4_en_xmit,
2870 .ndo_select_queue = mlx4_en_select_queue,
2871 .ndo_get_stats64 = mlx4_en_get_stats64,
2872 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2873 .ndo_set_mac_address = mlx4_en_set_mac,
2874 .ndo_validate_addr = eth_validate_addr,
2875 .ndo_change_mtu = mlx4_en_change_mtu,
2876 .ndo_tx_timeout = mlx4_en_tx_timeout,
2877 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2878 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2879 .ndo_set_vf_mac = mlx4_en_set_vf_mac,
2880 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
2881 .ndo_set_vf_rate = mlx4_en_set_vf_rate,
2882 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
2883 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
2884 .ndo_get_vf_stats = mlx4_en_get_vf_stats,
2885 .ndo_get_vf_config = mlx4_en_get_vf_config,
2886 .ndo_set_features = mlx4_en_set_features,
2887 .ndo_fix_features = mlx4_en_fix_features,
2888 .ndo_setup_tc = __mlx4_en_setup_tc,
2889 #ifdef CONFIG_RFS_ACCEL
2890 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2891 #endif
2892 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2893 .ndo_features_check = mlx4_en_features_check,
2894 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2895 .ndo_bpf = mlx4_xdp,
2896 };
2897
2898 struct mlx4_en_bond {
2899 struct work_struct work;
2900 struct mlx4_en_priv *priv;
2901 int is_bonded;
2902 struct mlx4_port_map port_map;
2903 };
2904
mlx4_en_bond_work(struct work_struct * work)2905 static void mlx4_en_bond_work(struct work_struct *work)
2906 {
2907 struct mlx4_en_bond *bond = container_of(work,
2908 struct mlx4_en_bond,
2909 work);
2910 int err = 0;
2911 struct mlx4_dev *dev = bond->priv->mdev->dev;
2912
2913 if (bond->is_bonded) {
2914 if (!mlx4_is_bonded(dev)) {
2915 err = mlx4_bond(dev);
2916 if (err)
2917 en_err(bond->priv, "Fail to bond device\n");
2918 }
2919 if (!err) {
2920 err = mlx4_port_map_set(dev, &bond->port_map);
2921 if (err)
2922 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
2923 bond->port_map.port1,
2924 bond->port_map.port2,
2925 err);
2926 }
2927 } else if (mlx4_is_bonded(dev)) {
2928 err = mlx4_unbond(dev);
2929 if (err)
2930 en_err(bond->priv, "Fail to unbond device\n");
2931 }
2932 dev_put(bond->priv->dev);
2933 kfree(bond);
2934 }
2935
mlx4_en_queue_bond_work(struct mlx4_en_priv * priv,int is_bonded,u8 v2p_p1,u8 v2p_p2)2936 static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
2937 u8 v2p_p1, u8 v2p_p2)
2938 {
2939 struct mlx4_en_bond *bond = NULL;
2940
2941 bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
2942 if (!bond)
2943 return -ENOMEM;
2944
2945 INIT_WORK(&bond->work, mlx4_en_bond_work);
2946 bond->priv = priv;
2947 bond->is_bonded = is_bonded;
2948 bond->port_map.port1 = v2p_p1;
2949 bond->port_map.port2 = v2p_p2;
2950 dev_hold(priv->dev);
2951 queue_work(priv->mdev->workqueue, &bond->work);
2952 return 0;
2953 }
2954
mlx4_en_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)2955 int mlx4_en_netdev_event(struct notifier_block *this,
2956 unsigned long event, void *ptr)
2957 {
2958 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
2959 u8 port = 0;
2960 struct mlx4_en_dev *mdev;
2961 struct mlx4_dev *dev;
2962 int i, num_eth_ports = 0;
2963 bool do_bond = true;
2964 struct mlx4_en_priv *priv;
2965 u8 v2p_port1 = 0;
2966 u8 v2p_port2 = 0;
2967
2968 if (!net_eq(dev_net(ndev), &init_net))
2969 return NOTIFY_DONE;
2970
2971 mdev = container_of(this, struct mlx4_en_dev, nb);
2972 dev = mdev->dev;
2973
2974 /* Go into this mode only when two network devices set on two ports
2975 * of the same mlx4 device are slaves of the same bonding master
2976 */
2977 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
2978 ++num_eth_ports;
2979 if (!port && (mdev->pndev[i] == ndev))
2980 port = i;
2981 mdev->upper[i] = mdev->pndev[i] ?
2982 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
2983 /* condition not met: network device is a slave */
2984 if (!mdev->upper[i])
2985 do_bond = false;
2986 if (num_eth_ports < 2)
2987 continue;
2988 /* condition not met: same master */
2989 if (mdev->upper[i] != mdev->upper[i-1])
2990 do_bond = false;
2991 }
2992 /* condition not met: 2 salves */
2993 do_bond = (num_eth_ports == 2) ? do_bond : false;
2994
2995 /* handle only events that come with enough info */
2996 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
2997 return NOTIFY_DONE;
2998
2999 priv = netdev_priv(ndev);
3000 if (do_bond) {
3001 struct netdev_notifier_bonding_info *notifier_info = ptr;
3002 struct netdev_bonding_info *bonding_info =
3003 ¬ifier_info->bonding_info;
3004
3005 /* required mode 1, 2 or 4 */
3006 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
3007 (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
3008 (bonding_info->master.bond_mode != BOND_MODE_8023AD))
3009 do_bond = false;
3010
3011 /* require exactly 2 slaves */
3012 if (bonding_info->master.num_slaves != 2)
3013 do_bond = false;
3014
3015 /* calc v2p */
3016 if (do_bond) {
3017 if (bonding_info->master.bond_mode ==
3018 BOND_MODE_ACTIVEBACKUP) {
3019 /* in active-backup mode virtual ports are
3020 * mapped to the physical port of the active
3021 * slave */
3022 if (bonding_info->slave.state ==
3023 BOND_STATE_BACKUP) {
3024 if (port == 1) {
3025 v2p_port1 = 2;
3026 v2p_port2 = 2;
3027 } else {
3028 v2p_port1 = 1;
3029 v2p_port2 = 1;
3030 }
3031 } else { /* BOND_STATE_ACTIVE */
3032 if (port == 1) {
3033 v2p_port1 = 1;
3034 v2p_port2 = 1;
3035 } else {
3036 v2p_port1 = 2;
3037 v2p_port2 = 2;
3038 }
3039 }
3040 } else { /* Active-Active */
3041 /* in active-active mode a virtual port is
3042 * mapped to the native physical port if and only
3043 * if the physical port is up */
3044 __s8 link = bonding_info->slave.link;
3045
3046 if (port == 1)
3047 v2p_port2 = 2;
3048 else
3049 v2p_port1 = 1;
3050 if ((link == BOND_LINK_UP) ||
3051 (link == BOND_LINK_FAIL)) {
3052 if (port == 1)
3053 v2p_port1 = 1;
3054 else
3055 v2p_port2 = 2;
3056 } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */
3057 if (port == 1)
3058 v2p_port1 = 2;
3059 else
3060 v2p_port2 = 1;
3061 }
3062 }
3063 }
3064 }
3065
3066 mlx4_en_queue_bond_work(priv, do_bond,
3067 v2p_port1, v2p_port2);
3068
3069 return NOTIFY_DONE;
3070 }
3071
mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev * dev,struct mlx4_en_stats_bitmap * stats_bitmap,u8 rx_ppp,u8 rx_pause,u8 tx_ppp,u8 tx_pause)3072 void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
3073 struct mlx4_en_stats_bitmap *stats_bitmap,
3074 u8 rx_ppp, u8 rx_pause,
3075 u8 tx_ppp, u8 tx_pause)
3076 {
3077 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;
3078
3079 if (!mlx4_is_slave(dev) &&
3080 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
3081 mutex_lock(&stats_bitmap->mutex);
3082 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
3083
3084 if (rx_ppp)
3085 bitmap_set(stats_bitmap->bitmap, last_i,
3086 NUM_FLOW_PRIORITY_STATS_RX);
3087 last_i += NUM_FLOW_PRIORITY_STATS_RX;
3088
3089 if (rx_pause && !(rx_ppp))
3090 bitmap_set(stats_bitmap->bitmap, last_i,
3091 NUM_FLOW_STATS_RX);
3092 last_i += NUM_FLOW_STATS_RX;
3093
3094 if (tx_ppp)
3095 bitmap_set(stats_bitmap->bitmap, last_i,
3096 NUM_FLOW_PRIORITY_STATS_TX);
3097 last_i += NUM_FLOW_PRIORITY_STATS_TX;
3098
3099 if (tx_pause && !(tx_ppp))
3100 bitmap_set(stats_bitmap->bitmap, last_i,
3101 NUM_FLOW_STATS_TX);
3102 last_i += NUM_FLOW_STATS_TX;
3103
3104 mutex_unlock(&stats_bitmap->mutex);
3105 }
3106 }
3107
mlx4_en_set_stats_bitmap(struct mlx4_dev * dev,struct mlx4_en_stats_bitmap * stats_bitmap,u8 rx_ppp,u8 rx_pause,u8 tx_ppp,u8 tx_pause)3108 void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
3109 struct mlx4_en_stats_bitmap *stats_bitmap,
3110 u8 rx_ppp, u8 rx_pause,
3111 u8 tx_ppp, u8 tx_pause)
3112 {
3113 int last_i = 0;
3114
3115 mutex_init(&stats_bitmap->mutex);
3116 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
3117
3118 if (mlx4_is_slave(dev)) {
3119 bitmap_set(stats_bitmap->bitmap, last_i +
3120 MLX4_FIND_NETDEV_STAT(rx_packets), 1);
3121 bitmap_set(stats_bitmap->bitmap, last_i +
3122 MLX4_FIND_NETDEV_STAT(tx_packets), 1);
3123 bitmap_set(stats_bitmap->bitmap, last_i +
3124 MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
3125 bitmap_set(stats_bitmap->bitmap, last_i +
3126 MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
3127 bitmap_set(stats_bitmap->bitmap, last_i +
3128 MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
3129 bitmap_set(stats_bitmap->bitmap, last_i +
3130 MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
3131 } else {
3132 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
3133 }
3134 last_i += NUM_MAIN_STATS;
3135
3136 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
3137 last_i += NUM_PORT_STATS;
3138
3139 if (mlx4_is_master(dev))
3140 bitmap_set(stats_bitmap->bitmap, last_i,
3141 NUM_PF_STATS);
3142 last_i += NUM_PF_STATS;
3143
3144 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
3145 rx_ppp, rx_pause,
3146 tx_ppp, tx_pause);
3147 last_i += NUM_FLOW_STATS;
3148
3149 if (!mlx4_is_slave(dev))
3150 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
3151 last_i += NUM_PKT_STATS;
3152
3153 bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS);
3154 last_i += NUM_XDP_STATS;
3155
3156 if (!mlx4_is_slave(dev))
3157 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PHY_STATS);
3158 last_i += NUM_PHY_STATS;
3159 }
3160
mlx4_en_init_netdev(struct mlx4_en_dev * mdev,int port,struct mlx4_en_port_profile * prof)3161 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
3162 struct mlx4_en_port_profile *prof)
3163 {
3164 struct net_device *dev;
3165 struct mlx4_en_priv *priv;
3166 int i, t;
3167 int err;
3168
3169 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
3170 MAX_TX_RINGS, MAX_RX_RINGS);
3171 if (dev == NULL)
3172 return -ENOMEM;
3173
3174 netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]);
3175 netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
3176
3177 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
3178 dev->dev_port = port - 1;
3179
3180 /*
3181 * Initialize driver private data
3182 */
3183
3184 priv = netdev_priv(dev);
3185 memset(priv, 0, sizeof(struct mlx4_en_priv));
3186 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
3187 spin_lock_init(&priv->stats_lock);
3188 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
3189 INIT_WORK(&priv->restart_task, mlx4_en_restart);
3190 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate_work);
3191 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
3192 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
3193 #ifdef CONFIG_RFS_ACCEL
3194 INIT_LIST_HEAD(&priv->filters);
3195 spin_lock_init(&priv->filters_lock);
3196 #endif
3197
3198 priv->dev = dev;
3199 priv->mdev = mdev;
3200 priv->ddev = &mdev->pdev->dev;
3201 priv->prof = prof;
3202 priv->port = port;
3203 priv->port_up = false;
3204 priv->flags = prof->flags;
3205 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
3206 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
3207 MLX4_WQE_CTRL_SOLICITED);
3208 priv->num_tx_rings_p_up = mdev->profile.max_num_tx_rings_p_up;
3209 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
3210 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
3211
3212 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
3213 priv->tx_ring_num[t] = prof->tx_ring_num[t];
3214 if (!priv->tx_ring_num[t])
3215 continue;
3216
3217 priv->tx_ring[t] = kcalloc(MAX_TX_RINGS,
3218 sizeof(struct mlx4_en_tx_ring *),
3219 GFP_KERNEL);
3220 if (!priv->tx_ring[t]) {
3221 err = -ENOMEM;
3222 goto out;
3223 }
3224 priv->tx_cq[t] = kcalloc(MAX_TX_RINGS,
3225 sizeof(struct mlx4_en_cq *),
3226 GFP_KERNEL);
3227 if (!priv->tx_cq[t]) {
3228 err = -ENOMEM;
3229 goto out;
3230 }
3231 }
3232 priv->rx_ring_num = prof->rx_ring_num;
3233 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
3234 priv->cqe_size = mdev->dev->caps.cqe_size;
3235 priv->mac_index = -1;
3236 priv->msg_enable = MLX4_EN_MSG_LEVEL;
3237 #ifdef CONFIG_MLX4_EN_DCB
3238 if (!mlx4_is_slave(priv->mdev->dev)) {
3239 u8 prio;
3240
3241 for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) {
3242 priv->ets.prio_tc[prio] = prio;
3243 priv->ets.tc_tsa[prio] = IEEE_8021QAZ_TSA_VENDOR;
3244 }
3245
3246 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
3247 DCB_CAP_DCBX_VER_IEEE;
3248 priv->flags |= MLX4_EN_DCB_ENABLED;
3249 priv->cee_config.pfc_state = false;
3250
3251 for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++)
3252 priv->cee_config.dcb_pfc[i] = pfc_disabled;
3253
3254 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
3255 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
3256 } else {
3257 en_info(priv, "enabling only PFC DCB ops\n");
3258 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
3259 }
3260 }
3261 #endif
3262
3263 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
3264 INIT_HLIST_HEAD(&priv->mac_hash[i]);
3265
3266 /* Query for default mac and max mtu */
3267 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
3268
3269 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
3270 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
3271 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
3272
3273 /* Set default MAC */
3274 dev->addr_len = ETH_ALEN;
3275 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
3276 if (!is_valid_ether_addr(dev->dev_addr)) {
3277 en_err(priv, "Port: %d, invalid mac burned: %pM, quitting\n",
3278 priv->port, dev->dev_addr);
3279 err = -EINVAL;
3280 goto out;
3281 } else if (mlx4_is_slave(priv->mdev->dev) &&
3282 (priv->mdev->dev->port_random_macs & 1 << priv->port)) {
3283 /* Random MAC was assigned in mlx4_slave_cap
3284 * in mlx4_core module
3285 */
3286 dev->addr_assign_type |= NET_ADDR_RANDOM;
3287 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
3288 }
3289
3290 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
3291
3292 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
3293 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
3294 err = mlx4_en_alloc_resources(priv);
3295 if (err)
3296 goto out;
3297
3298 /* Initialize time stamping config */
3299 priv->hwtstamp_config.flags = 0;
3300 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
3301 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
3302
3303 /* Allocate page for receive rings */
3304 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
3305 MLX4_EN_PAGE_SIZE);
3306 if (err) {
3307 en_err(priv, "Failed to allocate page for rx qps\n");
3308 goto out;
3309 }
3310 priv->allocated = 1;
3311
3312 /*
3313 * Initialize netdev entry points
3314 */
3315 if (mlx4_is_master(priv->mdev->dev))
3316 dev->netdev_ops = &mlx4_netdev_ops_master;
3317 else
3318 dev->netdev_ops = &mlx4_netdev_ops;
3319 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
3320 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
3321 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
3322
3323 dev->ethtool_ops = &mlx4_en_ethtool_ops;
3324
3325 /*
3326 * Set driver features
3327 */
3328 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
3329 if (mdev->LSO_support)
3330 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
3331
3332 if (mdev->dev->caps.tunnel_offload_mode ==
3333 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3334 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |
3335 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3336 NETIF_F_GSO_PARTIAL;
3337 dev->features |= NETIF_F_GSO_UDP_TUNNEL |
3338 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3339 NETIF_F_GSO_PARTIAL;
3340 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM;
3341 dev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3342 NETIF_F_RXCSUM |
3343 NETIF_F_TSO | NETIF_F_TSO6 |
3344 NETIF_F_GSO_UDP_TUNNEL |
3345 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3346 NETIF_F_GSO_PARTIAL;
3347
3348 dev->udp_tunnel_nic_info = &mlx4_udp_tunnels;
3349 }
3350
3351 dev->vlan_features = dev->hw_features;
3352
3353 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
3354 dev->features = dev->hw_features | NETIF_F_HIGHDMA |
3355 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
3356 NETIF_F_HW_VLAN_CTAG_FILTER;
3357 dev->hw_features |= NETIF_F_LOOPBACK |
3358 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
3359
3360 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {
3361 dev->features |= NETIF_F_HW_VLAN_STAG_RX |
3362 NETIF_F_HW_VLAN_STAG_FILTER;
3363 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;
3364 }
3365
3366 if (mlx4_is_slave(mdev->dev)) {
3367 bool vlan_offload_disabled;
3368 int phv;
3369
3370 err = get_phv_bit(mdev->dev, port, &phv);
3371 if (!err && phv) {
3372 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
3373 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
3374 }
3375 err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port,
3376 &vlan_offload_disabled);
3377 if (!err && vlan_offload_disabled) {
3378 dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
3379 NETIF_F_HW_VLAN_CTAG_RX |
3380 NETIF_F_HW_VLAN_STAG_TX |
3381 NETIF_F_HW_VLAN_STAG_RX);
3382 dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
3383 NETIF_F_HW_VLAN_CTAG_RX |
3384 NETIF_F_HW_VLAN_STAG_TX |
3385 NETIF_F_HW_VLAN_STAG_RX);
3386 }
3387 } else {
3388 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&
3389 !(mdev->dev->caps.flags2 &
3390 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
3391 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
3392 }
3393
3394 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
3395 dev->hw_features |= NETIF_F_RXFCS;
3396
3397 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
3398 dev->hw_features |= NETIF_F_RXALL;
3399
3400 if (mdev->dev->caps.steering_mode ==
3401 MLX4_STEERING_MODE_DEVICE_MANAGED &&
3402 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
3403 dev->hw_features |= NETIF_F_NTUPLE;
3404
3405 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
3406 dev->priv_flags |= IFF_UNICAST_FLT;
3407
3408 /* Setting a default hash function value */
3409 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
3410 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3411 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
3412 priv->rss_hash_fn = ETH_RSS_HASH_XOR;
3413 } else {
3414 en_warn(priv,
3415 "No RSS hash capabilities exposed, using Toeplitz\n");
3416 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3417 }
3418
3419 /* MTU range: 68 - hw-specific max */
3420 dev->min_mtu = ETH_MIN_MTU;
3421 dev->max_mtu = priv->max_mtu;
3422
3423 mdev->pndev[port] = dev;
3424 mdev->upper[port] = NULL;
3425
3426 netif_carrier_off(dev);
3427 mlx4_en_set_default_moderation(priv);
3428
3429 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]);
3430 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
3431
3432 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
3433
3434 /* Configure port */
3435 mlx4_en_calc_rx_buf(dev);
3436 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
3437 priv->rx_skb_size + ETH_FCS_LEN,
3438 prof->tx_pause, prof->tx_ppp,
3439 prof->rx_pause, prof->rx_ppp);
3440 if (err) {
3441 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
3442 priv->port, err);
3443 goto out;
3444 }
3445
3446 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3447 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
3448 if (err) {
3449 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
3450 err);
3451 goto out;
3452 }
3453 }
3454
3455 /* Init port */
3456 en_warn(priv, "Initializing port\n");
3457 err = mlx4_INIT_PORT(mdev->dev, priv->port);
3458 if (err) {
3459 en_err(priv, "Failed Initializing port\n");
3460 goto out;
3461 }
3462 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
3463
3464 /* Initialize time stamp mechanism */
3465 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
3466 mlx4_en_init_timestamp(mdev);
3467
3468 queue_delayed_work(mdev->workqueue, &priv->service_task,
3469 SERVICE_TASK_DELAY);
3470
3471 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
3472 mdev->profile.prof[priv->port].rx_ppp,
3473 mdev->profile.prof[priv->port].rx_pause,
3474 mdev->profile.prof[priv->port].tx_ppp,
3475 mdev->profile.prof[priv->port].tx_pause);
3476
3477 err = register_netdev(dev);
3478 if (err) {
3479 en_err(priv, "Netdev registration failed for port %d\n", port);
3480 goto out;
3481 }
3482
3483 priv->registered = 1;
3484 devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port),
3485 dev);
3486
3487 return 0;
3488
3489 out:
3490 mlx4_en_destroy_netdev(dev);
3491 return err;
3492 }
3493
mlx4_en_reset_config(struct net_device * dev,struct hwtstamp_config ts_config,netdev_features_t features)3494 int mlx4_en_reset_config(struct net_device *dev,
3495 struct hwtstamp_config ts_config,
3496 netdev_features_t features)
3497 {
3498 struct mlx4_en_priv *priv = netdev_priv(dev);
3499 struct mlx4_en_dev *mdev = priv->mdev;
3500 struct mlx4_en_port_profile new_prof;
3501 struct mlx4_en_priv *tmp;
3502 int port_up = 0;
3503 int err = 0;
3504
3505 if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
3506 priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
3507 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3508 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))
3509 return 0; /* Nothing to change */
3510
3511 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3512 (features & NETIF_F_HW_VLAN_CTAG_RX) &&
3513 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
3514 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
3515 return -EINVAL;
3516 }
3517
3518 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
3519 if (!tmp)
3520 return -ENOMEM;
3521
3522 mutex_lock(&mdev->state_lock);
3523
3524 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
3525 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config));
3526
3527 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
3528 if (err)
3529 goto out;
3530
3531 if (priv->port_up) {
3532 port_up = 1;
3533 mlx4_en_stop_port(dev, 1);
3534 }
3535
3536 mlx4_en_safe_replace_resources(priv, tmp);
3537
3538 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
3539 if (features & NETIF_F_HW_VLAN_CTAG_RX)
3540 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3541 else
3542 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3543 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
3544 /* RX time-stamping is OFF, update the RX vlan offload
3545 * to the latest wanted state
3546 */
3547 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
3548 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3549 else
3550 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3551 }
3552
3553 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {
3554 if (features & NETIF_F_RXFCS)
3555 dev->features |= NETIF_F_RXFCS;
3556 else
3557 dev->features &= ~NETIF_F_RXFCS;
3558 }
3559
3560 /* RX vlan offload and RX time-stamping can't co-exist !
3561 * Regardless of the caller's choice,
3562 * Turn Off RX vlan offload in case of time-stamping is ON
3563 */
3564 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
3565 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
3566 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
3567 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3568 }
3569
3570 if (port_up) {
3571 err = mlx4_en_start_port(dev);
3572 if (err)
3573 en_err(priv, "Failed starting port\n");
3574 }
3575
3576 if (!err)
3577 err = mlx4_en_moderation_update(priv);
3578 out:
3579 mutex_unlock(&mdev->state_lock);
3580 kfree(tmp);
3581 if (!err)
3582 netdev_features_change(dev);
3583 return err;
3584 }
3585