1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */
3
4 #include "../include/odm_precomp.h"
5
odm_ConfigRFReg_8188E(struct odm_dm_struct * pDM_Odm,u32 Addr,u32 Data,enum rf_radio_path RF_PATH,u32 RegAddr)6 void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
7 u32 Data, enum rf_radio_path RF_PATH,
8 u32 RegAddr)
9 {
10 if (Addr == 0xffe) {
11 ODM_sleep_ms(50);
12 } else if (Addr == 0xfd) {
13 ODM_delay_ms(5);
14 } else if (Addr == 0xfc) {
15 ODM_delay_ms(1);
16 } else if (Addr == 0xfb) {
17 ODM_delay_us(50);
18 } else if (Addr == 0xfa) {
19 ODM_delay_us(5);
20 } else if (Addr == 0xf9) {
21 ODM_delay_us(1);
22 } else {
23 ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
24 /* Add 1us delay between BB/RF register setting. */
25 ODM_delay_us(1);
26 }
27 }
28
odm_ConfigRF_RadioA_8188E(struct odm_dm_struct * pDM_Odm,u32 Addr,u32 Data)29 void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data)
30 {
31 u32 content = 0x1000; /* RF_Content: radioa_txt */
32 u32 maskforPhySet = (u32)(content & 0xE000);
33
34 odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, RF_PATH_A, Addr | maskforPhySet);
35 }
36
odm_ConfigRF_RadioB_8188E(struct odm_dm_struct * pDM_Odm,u32 Addr,u32 Data)37 void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data)
38 {
39 u32 content = 0x1001; /* RF_Content: radiob_txt */
40 u32 maskforPhySet = (u32)(content & 0xE000);
41
42 odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, RF_PATH_B, Addr | maskforPhySet);
43 }
44
odm_ConfigMAC_8188E(struct odm_dm_struct * pDM_Odm,u32 Addr,u8 Data)45 void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data)
46 {
47 ODM_Write1Byte(pDM_Odm, Addr, Data);
48 }
49
odm_ConfigBB_AGC_8188E(struct odm_dm_struct * pDM_Odm,u32 Addr,u32 Bitmask,u32 Data)50 void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data)
51 {
52 ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
53 /* Add 1us delay between BB/RF register setting. */
54 ODM_delay_us(1);
55 }
56
odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct * pDM_Odm,u32 Addr,u32 Bitmask,u32 Data)57 void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
58 u32 Bitmask, u32 Data)
59 {
60 if (Addr == 0xfe)
61 ODM_sleep_ms(50);
62 else if (Addr == 0xfd)
63 ODM_delay_ms(5);
64 else if (Addr == 0xfc)
65 ODM_delay_ms(1);
66 else if (Addr == 0xfb)
67 ODM_delay_us(50);
68 else if (Addr == 0xfa)
69 ODM_delay_us(5);
70 else if (Addr == 0xf9)
71 ODM_delay_us(1);
72 else
73 storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data);
74 }
75
odm_ConfigBB_PHY_8188E(struct odm_dm_struct * pDM_Odm,u32 Addr,u32 Bitmask,u32 Data)76 void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data)
77 {
78 if (Addr == 0xfe) {
79 ODM_sleep_ms(50);
80 } else if (Addr == 0xfd) {
81 ODM_delay_ms(5);
82 } else if (Addr == 0xfc) {
83 ODM_delay_ms(1);
84 } else if (Addr == 0xfb) {
85 ODM_delay_us(50);
86 } else if (Addr == 0xfa) {
87 ODM_delay_us(5);
88 } else if (Addr == 0xf9) {
89 ODM_delay_us(1);
90 } else {
91 if (Addr == 0xa24)
92 pDM_Odm->RFCalibrateInfo.RegA24 = Data;
93 ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
94
95 /* Add 1us delay between BB/RF register setting. */
96 ODM_delay_us(1);
97 }
98 }
99