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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  *  S390 version
4  *    Copyright IBM Corp. 1999, 2000
5  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6  */
7 #ifndef _S390_PTRACE_H
8 #define _S390_PTRACE_H
9 
10 #include <linux/bits.h>
11 #include <uapi/asm/ptrace.h>
12 #include <asm/tpi.h>
13 
14 #define PIF_SYSCALL			0	/* inside a system call */
15 #define PIF_EXECVE_PGSTE_RESTART	1	/* restart execve for PGSTE binaries */
16 #define PIF_SYSCALL_RET_SET		2	/* return value was set via ptrace */
17 #define PIF_GUEST_FAULT			3	/* indicates program check in sie64a */
18 
19 #define _PIF_SYSCALL			BIT(PIF_SYSCALL)
20 #define _PIF_EXECVE_PGSTE_RESTART	BIT(PIF_EXECVE_PGSTE_RESTART)
21 #define _PIF_SYSCALL_RET_SET		BIT(PIF_SYSCALL_RET_SET)
22 #define _PIF_GUEST_FAULT		BIT(PIF_GUEST_FAULT)
23 
24 #ifndef __ASSEMBLY__
25 
26 #define PSW_KERNEL_BITS	(PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
27 			 PSW_MASK_EA | PSW_MASK_BA)
28 #define PSW_USER_BITS	(PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
29 			 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
30 			 PSW_MASK_PSTATE | PSW_ASC_PRIMARY)
31 
32 struct psw_bits {
33 	unsigned long	     :	1;
34 	unsigned long per    :	1; /* PER-Mask */
35 	unsigned long	     :	3;
36 	unsigned long dat    :	1; /* DAT Mode */
37 	unsigned long io     :	1; /* Input/Output Mask */
38 	unsigned long ext    :	1; /* External Mask */
39 	unsigned long key    :	4; /* PSW Key */
40 	unsigned long	     :	1;
41 	unsigned long mcheck :	1; /* Machine-Check Mask */
42 	unsigned long wait   :	1; /* Wait State */
43 	unsigned long pstate :	1; /* Problem State */
44 	unsigned long as     :	2; /* Address Space Control */
45 	unsigned long cc     :	2; /* Condition Code */
46 	unsigned long pm     :	4; /* Program Mask */
47 	unsigned long ri     :	1; /* Runtime Instrumentation */
48 	unsigned long	     :	6;
49 	unsigned long eaba   :	2; /* Addressing Mode */
50 	unsigned long	     : 31;
51 	unsigned long ia     : 64; /* Instruction Address */
52 };
53 
54 enum {
55 	PSW_BITS_AMODE_24BIT = 0,
56 	PSW_BITS_AMODE_31BIT = 1,
57 	PSW_BITS_AMODE_64BIT = 3
58 };
59 
60 enum {
61 	PSW_BITS_AS_PRIMARY	= 0,
62 	PSW_BITS_AS_ACCREG	= 1,
63 	PSW_BITS_AS_SECONDARY	= 2,
64 	PSW_BITS_AS_HOME	= 3
65 };
66 
67 #define psw_bits(__psw) (*({			\
68 	typecheck(psw_t, __psw);		\
69 	&(*(struct psw_bits *)(&(__psw)));	\
70 }))
71 
72 #define PGM_INT_CODE_MASK	0x7f
73 #define PGM_INT_CODE_PER	0x80
74 
75 /*
76  * The pt_regs struct defines the way the registers are stored on
77  * the stack during a system call.
78  */
79 struct pt_regs
80 {
81 	union {
82 		user_pt_regs user_regs;
83 		struct {
84 			unsigned long args[1];
85 			psw_t psw;
86 			unsigned long gprs[NUM_GPRS];
87 		};
88 	};
89 	unsigned long orig_gpr2;
90 	union {
91 		struct {
92 			unsigned int int_code;
93 			unsigned int int_parm;
94 			unsigned long int_parm_long;
95 		};
96 		struct tpi_info tpi_info;
97 	};
98 	unsigned long flags;
99 	unsigned long cr1;
100 };
101 
102 /*
103  * Program event recording (PER) register set.
104  */
105 struct per_regs {
106 	unsigned long control;		/* PER control bits */
107 	unsigned long start;		/* PER starting address */
108 	unsigned long end;		/* PER ending address */
109 };
110 
111 /*
112  * PER event contains information about the cause of the last PER exception.
113  */
114 struct per_event {
115 	unsigned short cause;		/* PER code, ATMID and AI */
116 	unsigned long address;		/* PER address */
117 	unsigned char paid;		/* PER access identification */
118 };
119 
120 /*
121  * Simplified per_info structure used to decode the ptrace user space ABI.
122  */
123 struct per_struct_kernel {
124 	unsigned long cr9;		/* PER control bits */
125 	unsigned long cr10;		/* PER starting address */
126 	unsigned long cr11;		/* PER ending address */
127 	unsigned long bits;		/* Obsolete software bits */
128 	unsigned long starting_addr;	/* User specified start address */
129 	unsigned long ending_addr;	/* User specified end address */
130 	unsigned short perc_atmid;	/* PER trap ATMID */
131 	unsigned long address;		/* PER trap instruction address */
132 	unsigned char access_id;	/* PER trap access identification */
133 };
134 
135 #define PER_EVENT_MASK			0xEB000000UL
136 
137 #define PER_EVENT_BRANCH		0x80000000UL
138 #define PER_EVENT_IFETCH		0x40000000UL
139 #define PER_EVENT_STORE			0x20000000UL
140 #define PER_EVENT_STORE_REAL		0x08000000UL
141 #define PER_EVENT_TRANSACTION_END	0x02000000UL
142 #define PER_EVENT_NULLIFICATION		0x01000000UL
143 
144 #define PER_CONTROL_MASK		0x00e00000UL
145 
146 #define PER_CONTROL_BRANCH_ADDRESS	0x00800000UL
147 #define PER_CONTROL_SUSPENSION		0x00400000UL
148 #define PER_CONTROL_ALTERATION		0x00200000UL
149 
set_pt_regs_flag(struct pt_regs * regs,int flag)150 static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
151 {
152 	regs->flags |= (1UL << flag);
153 }
154 
clear_pt_regs_flag(struct pt_regs * regs,int flag)155 static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
156 {
157 	regs->flags &= ~(1UL << flag);
158 }
159 
test_pt_regs_flag(struct pt_regs * regs,int flag)160 static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
161 {
162 	return !!(regs->flags & (1UL << flag));
163 }
164 
test_and_clear_pt_regs_flag(struct pt_regs * regs,int flag)165 static inline int test_and_clear_pt_regs_flag(struct pt_regs *regs, int flag)
166 {
167 	int ret = test_pt_regs_flag(regs, flag);
168 
169 	clear_pt_regs_flag(regs, flag);
170 	return ret;
171 }
172 
173 /*
174  * These are defined as per linux/ptrace.h, which see.
175  */
176 #define arch_has_single_step()	(1)
177 #define arch_has_block_step()	(1)
178 
179 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
180 #define instruction_pointer(regs) ((regs)->psw.addr)
181 #define user_stack_pointer(regs)((regs)->gprs[15])
182 #define profile_pc(regs) instruction_pointer(regs)
183 
regs_return_value(struct pt_regs * regs)184 static inline long regs_return_value(struct pt_regs *regs)
185 {
186 	return regs->gprs[2];
187 }
188 
instruction_pointer_set(struct pt_regs * regs,unsigned long val)189 static inline void instruction_pointer_set(struct pt_regs *regs,
190 					   unsigned long val)
191 {
192 	regs->psw.addr = val;
193 }
194 
195 int regs_query_register_offset(const char *name);
196 const char *regs_query_register_name(unsigned int offset);
197 unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
198 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
199 
kernel_stack_pointer(struct pt_regs * regs)200 static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
201 {
202 	return regs->gprs[15];
203 }
204 
regs_set_return_value(struct pt_regs * regs,unsigned long rc)205 static inline void regs_set_return_value(struct pt_regs *regs, unsigned long rc)
206 {
207 	regs->gprs[2] = rc;
208 }
209 
210 #endif /* __ASSEMBLY__ */
211 #endif /* _S390_PTRACE_H */
212