/drivers/gpu/drm/msm/dp/ |
D | dp_ctrl.h | 19 u32 pixel_rate; member
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/drivers/gpu/drm/i915/display/ |
D | intel_sprite.c | 293 unsigned int pixel_rate; in vlv_plane_min_cdclk() local 595 unsigned int pixel_rate; in ivb_plane_min_cdclk() local 615 unsigned int src_w, dst_w, pixel_rate; in ivb_sprite_min_cdclk() local 678 unsigned int pixel_rate = crtc_state->pixel_rate; in hsw_plane_min_cdclk() local 956 unsigned int hscale, pixel_rate; in g4x_sprite_min_cdclk() local
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D | skl_universal_plane.c | 300 unsigned int pixel_rate = intel_plane_pixel_rate(crtc_state, plane_state); in icl_plane_min_cdclk() local 324 unsigned int pixel_rate = intel_plane_pixel_rate(crtc_state, plane_state); in glk_plane_min_cdclk() local 351 unsigned int pixel_rate = intel_plane_pixel_rate(crtc_state, plane_state); in skl_plane_min_cdclk() local
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D | intel_atomic_plane.c | 183 unsigned int pixel_rate; in intel_plane_data_rate() local
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/drivers/media/i2c/ |
D | ov9734.c | 330 struct v4l2_ctrl *pixel_rate; member 352 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV9734_DATA_LANES; in to_pixel_rate() local 544 s64 exposure_max, h_blank, pixel_rate; in ov9734_init_controls() local
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D | imx319.c | 121 struct v4l2_ctrl *pixel_rate; member 2041 u64 pixel_rate; in imx319_set_pad_format() local 2268 u64 pixel_rate; in imx319_init_controls() local
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D | imx355.c | 107 struct v4l2_ctrl *pixel_rate; member 1342 u64 pixel_rate; in imx355_set_pad_format() local 1568 u64 pixel_rate; in imx355_init_controls() local
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D | ov2740.c | 332 struct v4l2_ctrl *pixel_rate; member 357 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV2740_DATA_LANES; in to_pixel_rate() local 549 s64 exposure_max, h_blank, pixel_rate; in ov2740_init_controls() local
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D | imx290.c | 82 struct v4l2_ctrl *pixel_rate; member 590 u64 pixel_rate; in imx290_calc_pixel_rate() local
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D | ov02a10.c | 251 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV02A10_DATA_LANES; in to_pixel_rate() local 742 s64 pixel_rate; in ov02a10_initialize_controls() local
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D | hi556.c | 485 struct v4l2_ctrl *pixel_rate; member 502 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * HI556_DATA_LANES; in to_pixel_rate() local
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D | ov5670.c | 81 u32 pixel_rate; member 1822 struct v4l2_ctrl *pixel_rate; member
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D | ov5675.c | 483 struct v4l2_ctrl *pixel_rate; member 500 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV5675_DATA_LANES; in to_pixel_rate() local
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D | imx258.c | 610 struct v4l2_ctrl *pixel_rate; member 900 s64 pixel_rate; in imx258_set_pad_format() local
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D | ov5647.c | 91 u64 pixel_rate; member 107 struct v4l2_ctrl *pixel_rate; member
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D | imx208.c | 277 struct v4l2_ctrl *pixel_rate; member 583 s64 pixel_rate; in imx208_set_pad_format() local
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D | ov13858.c | 1036 struct v4l2_ctrl *pixel_rate; member 1359 s64 pixel_rate; in ov13858_set_pad_format() local
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D | ov8856.c | 1394 struct v4l2_ctrl *pixel_rate; member 1563 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * nlanes; in to_rate() local
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D | imx214.c | 47 struct v4l2_ctrl *pixel_rate; member
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D | ov2685.c | 615 u32 pixel_rate, h_blank; in ov2685_initialize_controls() local
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/drivers/staging/media/tegra-video/ |
D | csi.h | 78 unsigned int pixel_rate; member
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/drivers/gpu/drm/i915/ |
D | intel_pm.c | 701 static unsigned int intel_wm_method1(unsigned int pixel_rate, in intel_wm_method1() 743 static unsigned int intel_wm_method2(unsigned int pixel_rate, in intel_wm_method2() 783 static unsigned int intel_calculate_wm(int pixel_rate, in intel_calculate_wm() 1643 static unsigned int vlv_wm_method2(unsigned int pixel_rate, in vlv_wm_method2() 2517 static unsigned int ilk_wm_method1(unsigned int pixel_rate, in ilk_wm_method1() 2530 static unsigned int ilk_wm_method2(unsigned int pixel_rate, in ilk_wm_method2() 5326 skl_wm_method1(const struct drm_i915_private *dev_priv, u32 pixel_rate, in skl_wm_method1() 5345 skl_wm_method2(u32 pixel_rate, u32 pipe_htotal, u32 latency, in skl_wm_method2() 5365 u32 pixel_rate; in intel_get_linetime_us() local
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/drivers/gpu/drm/msm/edp/ |
D | edp_ctrl.c | 105 u32 pixel_rate; /* in kHz */ member 1345 u32 pixel_rate, u32 *pm, u32 *pn) in msm_edp_ctrl_pixel_clock_valid()
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/drivers/media/i2c/et8ek8/ |
D | et8ek8_driver.c | 53 struct v4l2_ctrl *pixel_rate; member 726 u32 min, max, pixel_rate; in et8ek8_update_controls() local
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/drivers/gpu/drm/vc4/ |
D | vc4_hdmi.h | 200 unsigned long long pixel_rate; member
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