1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Hantro VPU codec driver
4 *
5 * Copyright 2018 Google LLC.
6 * Tomasz Figa <tfiga@chromium.org>
7 */
8
9 #ifndef HANTRO_HW_H_
10 #define HANTRO_HW_H_
11
12 #include <linux/interrupt.h>
13 #include <linux/v4l2-controls.h>
14 #include <media/v4l2-ctrls.h>
15 #include <media/videobuf2-core.h>
16
17 #define DEC_8190_ALIGN_MASK 0x07U
18
19 #define MB_DIM 16
20 #define MB_WIDTH(w) DIV_ROUND_UP(w, MB_DIM)
21 #define MB_HEIGHT(h) DIV_ROUND_UP(h, MB_DIM)
22
23 #define NUM_REF_PICTURES (V4L2_HEVC_DPB_ENTRIES_NUM_MAX + 1)
24
25 struct hantro_dev;
26 struct hantro_ctx;
27 struct hantro_buf;
28 struct hantro_variant;
29
30 /**
31 * struct hantro_aux_buf - auxiliary DMA buffer for hardware data
32 *
33 * @cpu: CPU pointer to the buffer.
34 * @dma: DMA address of the buffer.
35 * @size: Size of the buffer.
36 * @attrs: Attributes of the DMA mapping.
37 */
38 struct hantro_aux_buf {
39 void *cpu;
40 dma_addr_t dma;
41 size_t size;
42 unsigned long attrs;
43 };
44
45 /**
46 * struct hantro_jpeg_enc_hw_ctx
47 *
48 * @bounce_buffer: Bounce buffer
49 */
50 struct hantro_jpeg_enc_hw_ctx {
51 struct hantro_aux_buf bounce_buffer;
52 };
53
54 /* Max. number of entries in the DPB (HW limitation). */
55 #define HANTRO_H264_DPB_SIZE 16
56
57 /**
58 * struct hantro_h264_dec_ctrls
59 *
60 * @decode: Decode params
61 * @scaling: Scaling info
62 * @sps: SPS info
63 * @pps: PPS info
64 */
65 struct hantro_h264_dec_ctrls {
66 const struct v4l2_ctrl_h264_decode_params *decode;
67 const struct v4l2_ctrl_h264_scaling_matrix *scaling;
68 const struct v4l2_ctrl_h264_sps *sps;
69 const struct v4l2_ctrl_h264_pps *pps;
70 };
71
72 /**
73 * struct hantro_h264_dec_reflists
74 *
75 * @p: P reflist
76 * @b0: B0 reflist
77 * @b1: B1 reflist
78 */
79 struct hantro_h264_dec_reflists {
80 u8 p[HANTRO_H264_DPB_SIZE];
81 u8 b0[HANTRO_H264_DPB_SIZE];
82 u8 b1[HANTRO_H264_DPB_SIZE];
83 };
84
85 /**
86 * struct hantro_h264_dec_hw_ctx
87 *
88 * @priv: Private auxiliary buffer for hardware.
89 * @dpb: DPB
90 * @reflists: P/B0/B1 reflists
91 * @ctrls: V4L2 controls attached to a run
92 * @dpb_longterm: DPB long-term
93 * @dpb_valid: DPB valid
94 */
95 struct hantro_h264_dec_hw_ctx {
96 struct hantro_aux_buf priv;
97 struct v4l2_h264_dpb_entry dpb[HANTRO_H264_DPB_SIZE];
98 struct hantro_h264_dec_reflists reflists;
99 struct hantro_h264_dec_ctrls ctrls;
100 u32 dpb_longterm;
101 u32 dpb_valid;
102 };
103
104 /**
105 * struct hantro_hevc_dec_ctrls
106 * @decode_params: Decode params
107 * @sps: SPS info
108 * @pps: PPS info
109 * @hevc_hdr_skip_length: the number of data (in bits) to skip in the
110 * slice segment header syntax after 'slice type'
111 * token
112 */
113 struct hantro_hevc_dec_ctrls {
114 const struct v4l2_ctrl_hevc_decode_params *decode_params;
115 const struct v4l2_ctrl_hevc_sps *sps;
116 const struct v4l2_ctrl_hevc_pps *pps;
117 u32 hevc_hdr_skip_length;
118 };
119
120 /**
121 * struct hantro_hevc_dec_hw_ctx
122 * @tile_sizes: Tile sizes buffer
123 * @tile_filter: Tile vertical filter buffer
124 * @tile_sao: Tile SAO buffer
125 * @tile_bsd: Tile BSD control buffer
126 * @ref_bufs: Internal reference buffers
127 * @ref_bufs_poc: Internal reference buffers picture order count
128 * @ref_bufs_used: Bitfield of used reference buffers
129 * @ctrls: V4L2 controls attached to a run
130 * @num_tile_cols_allocated: number of allocated tiles
131 */
132 struct hantro_hevc_dec_hw_ctx {
133 struct hantro_aux_buf tile_sizes;
134 struct hantro_aux_buf tile_filter;
135 struct hantro_aux_buf tile_sao;
136 struct hantro_aux_buf tile_bsd;
137 struct hantro_aux_buf ref_bufs[NUM_REF_PICTURES];
138 int ref_bufs_poc[NUM_REF_PICTURES];
139 u32 ref_bufs_used;
140 struct hantro_hevc_dec_ctrls ctrls;
141 unsigned int num_tile_cols_allocated;
142 };
143
144 /**
145 * struct hantro_mpeg2_dec_hw_ctx
146 *
147 * @qtable: Quantization table
148 */
149 struct hantro_mpeg2_dec_hw_ctx {
150 struct hantro_aux_buf qtable;
151 };
152
153 /**
154 * struct hantro_vp8_dec_hw_ctx
155 *
156 * @segment_map: Segment map buffer.
157 * @prob_tbl: Probability table buffer.
158 */
159 struct hantro_vp8_dec_hw_ctx {
160 struct hantro_aux_buf segment_map;
161 struct hantro_aux_buf prob_tbl;
162 };
163
164 /**
165 * struct hantro_postproc_ctx
166 *
167 * @dec_q: References buffers, in decoder format.
168 */
169 struct hantro_postproc_ctx {
170 struct hantro_aux_buf dec_q[VB2_MAX_FRAME];
171 };
172
173 /**
174 * struct hantro_codec_ops - codec mode specific operations
175 *
176 * @init: If needed, can be used for initialization.
177 * Optional and called from process context.
178 * @exit: If needed, can be used to undo the .init phase.
179 * Optional and called from process context.
180 * @run: Start single {en,de)coding job. Called from atomic context
181 * to indicate that a pair of buffers is ready and the hardware
182 * should be programmed and started. Returns zero if OK, a
183 * negative value in error cases.
184 * @done: Read back processing results and additional data from hardware.
185 * @reset: Reset the hardware in case of a timeout.
186 */
187 struct hantro_codec_ops {
188 int (*init)(struct hantro_ctx *ctx);
189 void (*exit)(struct hantro_ctx *ctx);
190 int (*run)(struct hantro_ctx *ctx);
191 void (*done)(struct hantro_ctx *ctx);
192 void (*reset)(struct hantro_ctx *ctx);
193 };
194
195 /**
196 * enum hantro_enc_fmt - source format ID for hardware registers.
197 *
198 * @ROCKCHIP_VPU_ENC_FMT_YUV420P: Y/CbCr 4:2:0 planar format
199 * @ROCKCHIP_VPU_ENC_FMT_YUV420SP: Y/CbCr 4:2:0 semi-planar format
200 * @ROCKCHIP_VPU_ENC_FMT_YUYV422: YUV 4:2:2 packed format (YUYV)
201 * @ROCKCHIP_VPU_ENC_FMT_UYVY422: YUV 4:2:2 packed format (UYVY)
202 */
203 enum hantro_enc_fmt {
204 ROCKCHIP_VPU_ENC_FMT_YUV420P = 0,
205 ROCKCHIP_VPU_ENC_FMT_YUV420SP = 1,
206 ROCKCHIP_VPU_ENC_FMT_YUYV422 = 2,
207 ROCKCHIP_VPU_ENC_FMT_UYVY422 = 3,
208 };
209
210 extern const struct hantro_variant imx8mq_vpu_g2_variant;
211 extern const struct hantro_variant imx8mq_vpu_variant;
212 extern const struct hantro_variant px30_vpu_variant;
213 extern const struct hantro_variant rk3036_vpu_variant;
214 extern const struct hantro_variant rk3066_vpu_variant;
215 extern const struct hantro_variant rk3288_vpu_variant;
216 extern const struct hantro_variant rk3328_vpu_variant;
217 extern const struct hantro_variant rk3399_vpu_variant;
218 extern const struct hantro_variant sama5d4_vdec_variant;
219
220 extern const struct hantro_postproc_regs hantro_g1_postproc_regs;
221
222 extern const u32 hantro_vp8_dec_mc_filter[8][6];
223
224 void hantro_watchdog(struct work_struct *work);
225 void hantro_run(struct hantro_ctx *ctx);
226 void hantro_irq_done(struct hantro_dev *vpu,
227 enum vb2_buffer_state result);
228 void hantro_start_prepare_run(struct hantro_ctx *ctx);
229 void hantro_end_prepare_run(struct hantro_ctx *ctx);
230
231 irqreturn_t hantro_g1_irq(int irq, void *dev_id);
232 void hantro_g1_reset(struct hantro_ctx *ctx);
233
234 int hantro_h1_jpeg_enc_run(struct hantro_ctx *ctx);
235 int rockchip_vpu2_jpeg_enc_run(struct hantro_ctx *ctx);
236 int hantro_jpeg_enc_init(struct hantro_ctx *ctx);
237 void hantro_jpeg_enc_exit(struct hantro_ctx *ctx);
238 void hantro_h1_jpeg_enc_done(struct hantro_ctx *ctx);
239 void rockchip_vpu2_jpeg_enc_done(struct hantro_ctx *ctx);
240
241 dma_addr_t hantro_h264_get_ref_buf(struct hantro_ctx *ctx,
242 unsigned int dpb_idx);
243 u16 hantro_h264_get_ref_nbr(struct hantro_ctx *ctx,
244 unsigned int dpb_idx);
245 int hantro_h264_dec_prepare_run(struct hantro_ctx *ctx);
246 int rockchip_vpu2_h264_dec_run(struct hantro_ctx *ctx);
247 int hantro_g1_h264_dec_run(struct hantro_ctx *ctx);
248 int hantro_h264_dec_init(struct hantro_ctx *ctx);
249 void hantro_h264_dec_exit(struct hantro_ctx *ctx);
250
251 int hantro_hevc_dec_init(struct hantro_ctx *ctx);
252 void hantro_hevc_dec_exit(struct hantro_ctx *ctx);
253 int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx);
254 int hantro_hevc_dec_prepare_run(struct hantro_ctx *ctx);
255 dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, int poc);
256 void hantro_hevc_ref_remove_unused(struct hantro_ctx *ctx);
257 size_t hantro_hevc_chroma_offset(const struct v4l2_ctrl_hevc_sps *sps);
258 size_t hantro_hevc_motion_vectors_offset(const struct v4l2_ctrl_hevc_sps *sps);
259
260 static inline size_t
hantro_h264_mv_size(unsigned int width,unsigned int height)261 hantro_h264_mv_size(unsigned int width, unsigned int height)
262 {
263 /*
264 * A decoded 8-bit 4:2:0 NV12 frame may need memory for up to
265 * 448 bytes per macroblock with additional 32 bytes on
266 * multi-core variants.
267 *
268 * The H264 decoder needs extra space on the output buffers
269 * to store motion vectors. This is needed for reference
270 * frames and only if the format is non-post-processed NV12.
271 *
272 * Memory layout is as follow:
273 *
274 * +---------------------------+
275 * | Y-plane 256 bytes x MBs |
276 * +---------------------------+
277 * | UV-plane 128 bytes x MBs |
278 * +---------------------------+
279 * | MV buffer 64 bytes x MBs |
280 * +---------------------------+
281 * | MC sync 32 bytes |
282 * +---------------------------+
283 */
284 return 64 * MB_WIDTH(width) * MB_WIDTH(height) + 32;
285 }
286
287 int hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx);
288 int rockchip_vpu2_mpeg2_dec_run(struct hantro_ctx *ctx);
289 void hantro_mpeg2_dec_copy_qtable(u8 *qtable,
290 const struct v4l2_ctrl_mpeg2_quantisation *ctrl);
291 int hantro_mpeg2_dec_init(struct hantro_ctx *ctx);
292 void hantro_mpeg2_dec_exit(struct hantro_ctx *ctx);
293
294 int hantro_g1_vp8_dec_run(struct hantro_ctx *ctx);
295 int rockchip_vpu2_vp8_dec_run(struct hantro_ctx *ctx);
296 int hantro_vp8_dec_init(struct hantro_ctx *ctx);
297 void hantro_vp8_dec_exit(struct hantro_ctx *ctx);
298 void hantro_vp8_prob_update(struct hantro_ctx *ctx,
299 const struct v4l2_ctrl_vp8_frame *hdr);
300
301 #endif /* HANTRO_HW_H_ */
302