1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2020, Google LLC
4 *
5 * MAXIM TCPCI based TCPC driver
6 */
7
8 #include <linux/interrupt.h>
9 #include <linux/i2c.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/regmap.h>
13 #include <linux/usb/pd.h>
14 #include <linux/usb/tcpci.h>
15 #include <linux/usb/tcpm.h>
16 #include <linux/usb/typec.h>
17
18 #define PD_ACTIVITY_TIMEOUT_MS 10000
19
20 #define TCPC_VENDOR_ALERT 0x80
21 #define TCPC_VENDOR_USBSW_CTRL 0x93
22 #define TCPC_VENDOR_USBSW_CTRL_ENABLE_USB_DATA 0x9
23 #define TCPC_VENDOR_USBSW_CTRL_DISABLE_USB_DATA 0
24
25 #define TCPC_RECEIVE_BUFFER_COUNT_OFFSET 0
26 #define TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET 1
27 #define TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET 2
28
29 /*
30 * LongMessage not supported, hence 32 bytes for buf to be read from RECEIVE_BUFFER.
31 * DEVICE_CAPABILITIES_2.LongMessage = 0, the value in READABLE_BYTE_COUNT reg shall be
32 * less than or equal to 31. Since, RECEIVE_BUFFER len = 31 + 1(READABLE_BYTE_COUNT).
33 */
34 #define TCPC_RECEIVE_BUFFER_LEN 32
35
36 #define MAX_BUCK_BOOST_SID 0x69
37 #define MAX_BUCK_BOOST_OP 0xb9
38 #define MAX_BUCK_BOOST_OFF 0
39 #define MAX_BUCK_BOOST_SOURCE 0xa
40 #define MAX_BUCK_BOOST_SINK 0x5
41
42 struct max_tcpci_chip {
43 struct tcpci_data data;
44 struct tcpci *tcpci;
45 struct device *dev;
46 struct i2c_client *client;
47 struct tcpm_port *port;
48 };
49
50 static const struct regmap_range max_tcpci_tcpci_range[] = {
51 regmap_reg_range(0x00, 0x95)
52 };
53
54 static const struct regmap_access_table max_tcpci_tcpci_write_table = {
55 .yes_ranges = max_tcpci_tcpci_range,
56 .n_yes_ranges = ARRAY_SIZE(max_tcpci_tcpci_range),
57 };
58
59 static const struct regmap_config max_tcpci_regmap_config = {
60 .reg_bits = 8,
61 .val_bits = 8,
62 .max_register = 0x95,
63 .wr_table = &max_tcpci_tcpci_write_table,
64 };
65
tdata_to_max_tcpci(struct tcpci_data * tdata)66 static struct max_tcpci_chip *tdata_to_max_tcpci(struct tcpci_data *tdata)
67 {
68 return container_of(tdata, struct max_tcpci_chip, data);
69 }
70
max_tcpci_read16(struct max_tcpci_chip * chip,unsigned int reg,u16 * val)71 static int max_tcpci_read16(struct max_tcpci_chip *chip, unsigned int reg, u16 *val)
72 {
73 return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u16));
74 }
75
max_tcpci_write16(struct max_tcpci_chip * chip,unsigned int reg,u16 val)76 static int max_tcpci_write16(struct max_tcpci_chip *chip, unsigned int reg, u16 val)
77 {
78 return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u16));
79 }
80
max_tcpci_read8(struct max_tcpci_chip * chip,unsigned int reg,u8 * val)81 static int max_tcpci_read8(struct max_tcpci_chip *chip, unsigned int reg, u8 *val)
82 {
83 return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u8));
84 }
85
max_tcpci_write8(struct max_tcpci_chip * chip,unsigned int reg,u8 val)86 static int max_tcpci_write8(struct max_tcpci_chip *chip, unsigned int reg, u8 val)
87 {
88 return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u8));
89 }
90
max_tcpci_init_regs(struct max_tcpci_chip * chip)91 static void max_tcpci_init_regs(struct max_tcpci_chip *chip)
92 {
93 u16 alert_mask = 0;
94 int ret;
95
96 ret = max_tcpci_write16(chip, TCPC_ALERT, 0xffff);
97 if (ret < 0) {
98 dev_err(chip->dev, "Error writing to TCPC_ALERT ret:%d\n", ret);
99 return;
100 }
101
102 ret = max_tcpci_write16(chip, TCPC_VENDOR_ALERT, 0xffff);
103 if (ret < 0) {
104 dev_err(chip->dev, "Error writing to TCPC_VENDOR_ALERT ret:%d\n", ret);
105 return;
106 }
107
108 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, 0xff);
109 if (ret < 0) {
110 dev_err(chip->dev, "Unable to clear TCPC_ALERT_EXTENDED ret:%d\n", ret);
111 return;
112 }
113
114 /* Enable VSAFE0V detection */
115 ret = max_tcpci_write8(chip, TCPC_EXTENDED_STATUS_MASK, TCPC_EXTENDED_STATUS_VSAFE0V);
116 if (ret < 0) {
117 dev_err(chip->dev, "Unable to unmask TCPC_EXTENDED_STATUS_VSAFE0V ret:%d\n", ret);
118 return;
119 }
120
121 alert_mask = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_TX_FAILED |
122 TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_RX_STATUS | TCPC_ALERT_CC_STATUS |
123 TCPC_ALERT_VBUS_DISCNCT | TCPC_ALERT_RX_BUF_OVF | TCPC_ALERT_POWER_STATUS |
124 /* Enable Extended alert for detecting Fast Role Swap Signal */
125 TCPC_ALERT_EXTND | TCPC_ALERT_EXTENDED_STATUS;
126
127 ret = max_tcpci_write16(chip, TCPC_ALERT_MASK, alert_mask);
128 if (ret < 0) {
129 dev_err(chip->dev,
130 "Error enabling TCPC_ALERT: TCPC_ALERT_MASK write failed ret:%d\n", ret);
131 return;
132 }
133
134 /* Enable vbus voltage monitoring and voltage alerts */
135 ret = max_tcpci_write8(chip, TCPC_POWER_CTRL, 0);
136 if (ret < 0) {
137 dev_err(chip->dev, "Error writing to TCPC_POWER_CTRL ret:%d\n", ret);
138 return;
139 }
140
141 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED_MASK, TCPC_SINK_FAST_ROLE_SWAP);
142 if (ret < 0)
143 return;
144 }
145
process_rx(struct max_tcpci_chip * chip,u16 status)146 static void process_rx(struct max_tcpci_chip *chip, u16 status)
147 {
148 struct pd_message msg;
149 u8 count, frame_type, rx_buf[TCPC_RECEIVE_BUFFER_LEN];
150 int ret, payload_index;
151 u8 *rx_buf_ptr;
152
153 /*
154 * READABLE_BYTE_COUNT: Indicates the number of bytes in the RX_BUF_BYTE_x registers
155 * plus one (for the RX_BUF_FRAME_TYPE) Table 4-36.
156 * Read the count and frame type.
157 */
158 ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, 2);
159 if (ret < 0) {
160 dev_err(chip->dev, "TCPC_RX_BYTE_CNT read failed ret:%d\n", ret);
161 return;
162 }
163
164 count = rx_buf[TCPC_RECEIVE_BUFFER_COUNT_OFFSET];
165 frame_type = rx_buf[TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET];
166
167 if (count == 0 || frame_type != TCPC_RX_BUF_FRAME_TYPE_SOP) {
168 max_tcpci_write16(chip, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
169 dev_err(chip->dev, "%s\n", count == 0 ? "error: count is 0" :
170 "error frame_type is not SOP");
171 return;
172 }
173
174 if (count > sizeof(struct pd_message) || count + 1 > TCPC_RECEIVE_BUFFER_LEN) {
175 dev_err(chip->dev, "Invalid TCPC_RX_BYTE_CNT %d\n", count);
176 return;
177 }
178
179 /*
180 * Read count + 1 as RX_BUF_BYTE_x is hidden and can only be read through
181 * TCPC_RX_BYTE_CNT
182 */
183 count += 1;
184 ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, count);
185 if (ret < 0) {
186 dev_err(chip->dev, "Error: TCPC_RX_BYTE_CNT read failed: %d\n", ret);
187 return;
188 }
189
190 rx_buf_ptr = rx_buf + TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET;
191 msg.header = cpu_to_le16(*(u16 *)rx_buf_ptr);
192 rx_buf_ptr = rx_buf_ptr + sizeof(msg.header);
193 for (payload_index = 0; payload_index < pd_header_cnt_le(msg.header); payload_index++,
194 rx_buf_ptr += sizeof(msg.payload[0]))
195 msg.payload[payload_index] = cpu_to_le32(*(u32 *)rx_buf_ptr);
196
197 /*
198 * Read complete, clear RX status alert bit.
199 * Clear overflow as well if set.
200 */
201 ret = max_tcpci_write16(chip, TCPC_ALERT, status & TCPC_ALERT_RX_BUF_OVF ?
202 TCPC_ALERT_RX_STATUS | TCPC_ALERT_RX_BUF_OVF :
203 TCPC_ALERT_RX_STATUS);
204 if (ret < 0)
205 return;
206
207 tcpm_pd_receive(chip->port, &msg);
208 }
209
max_tcpci_set_vbus(struct tcpci * tcpci,struct tcpci_data * tdata,bool source,bool sink)210 static int max_tcpci_set_vbus(struct tcpci *tcpci, struct tcpci_data *tdata, bool source, bool sink)
211 {
212 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
213 u8 buffer_source[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SOURCE};
214 u8 buffer_sink[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SINK};
215 u8 buffer_none[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_OFF};
216 struct i2c_client *i2c = chip->client;
217 int ret;
218
219 struct i2c_msg msgs[] = {
220 {
221 .addr = MAX_BUCK_BOOST_SID,
222 .flags = i2c->flags & I2C_M_TEN,
223 .len = 2,
224 .buf = source ? buffer_source : sink ? buffer_sink : buffer_none,
225 },
226 };
227
228 if (source && sink) {
229 dev_err(chip->dev, "Both source and sink set\n");
230 return -EINVAL;
231 }
232
233 ret = i2c_transfer(i2c->adapter, msgs, 1);
234
235 return ret < 0 ? ret : 1;
236 }
237
process_power_status(struct max_tcpci_chip * chip)238 static void process_power_status(struct max_tcpci_chip *chip)
239 {
240 u8 pwr_status;
241 int ret;
242
243 ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &pwr_status);
244 if (ret < 0)
245 return;
246
247 if (pwr_status == 0xff)
248 max_tcpci_init_regs(chip);
249 else if (pwr_status & TCPC_POWER_STATUS_SOURCING_VBUS)
250 tcpm_sourcing_vbus(chip->port);
251 else
252 tcpm_vbus_change(chip->port);
253 }
254
max_tcpci_frs_sourcing_vbus(struct tcpci * tcpci,struct tcpci_data * tdata)255 static void max_tcpci_frs_sourcing_vbus(struct tcpci *tcpci, struct tcpci_data *tdata)
256 {
257 /*
258 * For Fast Role Swap case, Boost turns on autonomously without
259 * AP intervention, but, needs AP to enable source mode explicitly
260 * for AP to regain control.
261 */
262 max_tcpci_set_vbus(tcpci, tdata, true, false);
263 }
264
process_tx(struct max_tcpci_chip * chip,u16 status)265 static void process_tx(struct max_tcpci_chip *chip, u16 status)
266 {
267 if (status & TCPC_ALERT_TX_SUCCESS)
268 tcpm_pd_transmit_complete(chip->port, TCPC_TX_SUCCESS);
269 else if (status & TCPC_ALERT_TX_DISCARDED)
270 tcpm_pd_transmit_complete(chip->port, TCPC_TX_DISCARDED);
271 else if (status & TCPC_ALERT_TX_FAILED)
272 tcpm_pd_transmit_complete(chip->port, TCPC_TX_FAILED);
273
274 /* Reinit regs as Hard reset sets them to default value */
275 if ((status & TCPC_ALERT_TX_SUCCESS) && (status & TCPC_ALERT_TX_FAILED))
276 max_tcpci_init_regs(chip);
277 }
278
279 /* Enable USB switches when partner is USB communications capable */
max_tcpci_set_partner_usb_comm_capable(struct tcpci * tcpci,struct tcpci_data * data,bool capable)280 static void max_tcpci_set_partner_usb_comm_capable(struct tcpci *tcpci, struct tcpci_data *data,
281 bool capable)
282 {
283 struct max_tcpci_chip *chip = tdata_to_max_tcpci(data);
284 int ret;
285
286 ret = max_tcpci_write8(chip, TCPC_VENDOR_USBSW_CTRL, capable ?
287 TCPC_VENDOR_USBSW_CTRL_ENABLE_USB_DATA :
288 TCPC_VENDOR_USBSW_CTRL_DISABLE_USB_DATA);
289
290 if (ret < 0)
291 dev_err(chip->dev, "Failed to enable USB switches");
292 }
293
_max_tcpci_irq(struct max_tcpci_chip * chip,u16 status)294 static irqreturn_t _max_tcpci_irq(struct max_tcpci_chip *chip, u16 status)
295 {
296 u16 mask;
297 int ret;
298 u8 reg_status;
299
300 /*
301 * Clear alert status for everything except RX_STATUS, which shouldn't
302 * be cleared until we have successfully retrieved message.
303 */
304 if (status & ~TCPC_ALERT_RX_STATUS) {
305 mask = status & TCPC_ALERT_RX_BUF_OVF ?
306 status & ~(TCPC_ALERT_RX_STATUS | TCPC_ALERT_RX_BUF_OVF) :
307 status & ~TCPC_ALERT_RX_STATUS;
308 ret = max_tcpci_write16(chip, TCPC_ALERT, mask);
309 if (ret < 0) {
310 dev_err(chip->dev, "ALERT clear failed\n");
311 return ret;
312 }
313 }
314
315 if (status & TCPC_ALERT_RX_BUF_OVF && !(status & TCPC_ALERT_RX_STATUS)) {
316 ret = max_tcpci_write16(chip, TCPC_ALERT, (TCPC_ALERT_RX_STATUS |
317 TCPC_ALERT_RX_BUF_OVF));
318 if (ret < 0) {
319 dev_err(chip->dev, "ALERT clear failed\n");
320 return ret;
321 }
322 }
323
324 if (status & TCPC_ALERT_EXTND) {
325 ret = max_tcpci_read8(chip, TCPC_ALERT_EXTENDED, ®_status);
326 if (ret < 0)
327 return ret;
328
329 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, reg_status);
330 if (ret < 0)
331 return ret;
332
333 if (reg_status & TCPC_SINK_FAST_ROLE_SWAP) {
334 dev_info(chip->dev, "FRS Signal\n");
335 tcpm_sink_frs(chip->port);
336 }
337 }
338
339 if (status & TCPC_ALERT_EXTENDED_STATUS) {
340 ret = max_tcpci_read8(chip, TCPC_EXTENDED_STATUS, (u8 *)®_status);
341 if (ret >= 0 && (reg_status & TCPC_EXTENDED_STATUS_VSAFE0V))
342 tcpm_vbus_change(chip->port);
343 }
344
345 if (status & TCPC_ALERT_RX_STATUS)
346 process_rx(chip, status);
347
348 if (status & TCPC_ALERT_VBUS_DISCNCT)
349 tcpm_vbus_change(chip->port);
350
351 if (status & TCPC_ALERT_CC_STATUS)
352 tcpm_cc_change(chip->port);
353
354 if (status & TCPC_ALERT_POWER_STATUS)
355 process_power_status(chip);
356
357 if (status & TCPC_ALERT_RX_HARD_RST) {
358 tcpm_pd_hard_reset(chip->port);
359 max_tcpci_init_regs(chip);
360 }
361
362 if (status & TCPC_ALERT_TX_SUCCESS || status & TCPC_ALERT_TX_DISCARDED || status &
363 TCPC_ALERT_TX_FAILED)
364 process_tx(chip, status);
365
366 return IRQ_HANDLED;
367 }
368
max_tcpci_irq(int irq,void * dev_id)369 static irqreturn_t max_tcpci_irq(int irq, void *dev_id)
370 {
371 struct max_tcpci_chip *chip = dev_id;
372 u16 status;
373 irqreturn_t irq_return = IRQ_HANDLED;
374 int ret;
375
376 if (!chip->port)
377 return IRQ_HANDLED;
378
379 ret = max_tcpci_read16(chip, TCPC_ALERT, &status);
380 if (ret < 0) {
381 dev_err(chip->dev, "ALERT read failed\n");
382 return ret;
383 }
384 while (status) {
385 irq_return = _max_tcpci_irq(chip, status);
386 /* Do not return if the ALERT is already set. */
387 ret = max_tcpci_read16(chip, TCPC_ALERT, &status);
388 if (ret < 0)
389 break;
390 }
391
392 return irq_return;
393 }
394
max_tcpci_isr(int irq,void * dev_id)395 static irqreturn_t max_tcpci_isr(int irq, void *dev_id)
396 {
397 struct max_tcpci_chip *chip = dev_id;
398
399 pm_wakeup_event(chip->dev, PD_ACTIVITY_TIMEOUT_MS);
400
401 if (!chip->port)
402 return IRQ_HANDLED;
403
404 return IRQ_WAKE_THREAD;
405 }
406
max_tcpci_init_alert(struct max_tcpci_chip * chip,struct i2c_client * client)407 static int max_tcpci_init_alert(struct max_tcpci_chip *chip, struct i2c_client *client)
408 {
409 int ret;
410
411 ret = devm_request_threaded_irq(chip->dev, client->irq, max_tcpci_isr, max_tcpci_irq,
412 (IRQF_TRIGGER_LOW | IRQF_ONESHOT), dev_name(chip->dev),
413 chip);
414
415 if (ret < 0)
416 return ret;
417
418 enable_irq_wake(client->irq);
419 return 0;
420 }
421
max_tcpci_start_toggling(struct tcpci * tcpci,struct tcpci_data * tdata,enum typec_cc_status cc)422 static int max_tcpci_start_toggling(struct tcpci *tcpci, struct tcpci_data *tdata,
423 enum typec_cc_status cc)
424 {
425 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
426
427 max_tcpci_init_regs(chip);
428
429 return 0;
430 }
431
tcpci_init(struct tcpci * tcpci,struct tcpci_data * data)432 static int tcpci_init(struct tcpci *tcpci, struct tcpci_data *data)
433 {
434 /*
435 * Generic TCPCI overwrites the regs once this driver initializes
436 * them. Prevent this by returning -1.
437 */
438 return -1;
439 }
440
max_tcpci_probe(struct i2c_client * client,const struct i2c_device_id * i2c_id)441 static int max_tcpci_probe(struct i2c_client *client, const struct i2c_device_id *i2c_id)
442 {
443 int ret;
444 struct max_tcpci_chip *chip;
445 u8 power_status;
446
447 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
448 if (!chip)
449 return -ENOMEM;
450
451 chip->client = client;
452 chip->data.regmap = devm_regmap_init_i2c(client, &max_tcpci_regmap_config);
453 if (IS_ERR(chip->data.regmap)) {
454 dev_err(&client->dev, "Regmap init failed\n");
455 return PTR_ERR(chip->data.regmap);
456 }
457
458 chip->dev = &client->dev;
459 i2c_set_clientdata(client, chip);
460
461 ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &power_status);
462 if (ret < 0)
463 return ret;
464
465 /* Chip level tcpci callbacks */
466 chip->data.set_vbus = max_tcpci_set_vbus;
467 chip->data.start_drp_toggling = max_tcpci_start_toggling;
468 chip->data.TX_BUF_BYTE_x_hidden = true;
469 chip->data.init = tcpci_init;
470 chip->data.frs_sourcing_vbus = max_tcpci_frs_sourcing_vbus;
471 chip->data.auto_discharge_disconnect = true;
472 chip->data.vbus_vsafe0v = true;
473 chip->data.set_partner_usb_comm_capable = max_tcpci_set_partner_usb_comm_capable;
474
475 max_tcpci_init_regs(chip);
476 chip->tcpci = tcpci_register_port(chip->dev, &chip->data);
477 if (IS_ERR(chip->tcpci)) {
478 dev_err(&client->dev, "TCPCI port registration failed\n");
479 return PTR_ERR(chip->tcpci);
480 }
481 chip->port = tcpci_get_tcpm_port(chip->tcpci);
482 ret = max_tcpci_init_alert(chip, client);
483 if (ret < 0)
484 goto unreg_port;
485
486 device_init_wakeup(chip->dev, true);
487 return 0;
488
489 unreg_port:
490 tcpci_unregister_port(chip->tcpci);
491
492 return ret;
493 }
494
max_tcpci_remove(struct i2c_client * client)495 static int max_tcpci_remove(struct i2c_client *client)
496 {
497 struct max_tcpci_chip *chip = i2c_get_clientdata(client);
498
499 if (!IS_ERR_OR_NULL(chip->tcpci))
500 tcpci_unregister_port(chip->tcpci);
501
502 return 0;
503 }
504
505 static const struct i2c_device_id max_tcpci_id[] = {
506 { "maxtcpc", 0 },
507 { }
508 };
509 MODULE_DEVICE_TABLE(i2c, max_tcpci_id);
510
511 #ifdef CONFIG_OF
512 static const struct of_device_id max_tcpci_of_match[] = {
513 { .compatible = "maxim,max33359", },
514 {},
515 };
516 MODULE_DEVICE_TABLE(of, max_tcpci_of_match);
517 #endif
518
519 static struct i2c_driver max_tcpci_i2c_driver = {
520 .driver = {
521 .name = "maxtcpc",
522 .of_match_table = of_match_ptr(max_tcpci_of_match),
523 },
524 .probe = max_tcpci_probe,
525 .remove = max_tcpci_remove,
526 .id_table = max_tcpci_id,
527 };
528 module_i2c_driver(max_tcpci_i2c_driver);
529
530 MODULE_AUTHOR("Badhri Jagan Sridharan <badhri@google.com>");
531 MODULE_DESCRIPTION("Maxim TCPCI based USB Type-C Port Controller Interface Driver");
532 MODULE_LICENSE("GPL v2");
533