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Searched defs:reg_offset (Results 1 – 25 of 154) sorted by relevance

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/drivers/gpio/
Dgpio-madera.c28 unsigned int reg_offset = 2 * offset; in madera_gpio_get_direction() local
47 unsigned int reg_offset = 2 * offset; in madera_gpio_direction_in() local
58 unsigned int reg_offset = 2 * offset; in madera_gpio_get() local
75 unsigned int reg_offset = 2 * offset; in madera_gpio_direction_out() local
95 unsigned int reg_offset = 2 * offset; in madera_gpio_set() local
/drivers/gpu/drm/amd/amdgpu/
Dsdma_v4_4.c163 uint32_t reg_offset, in sdma_v4_4_get_ras_error_count()
198 uint32_t reg_offset = 0; in sdma_v4_4_query_ras_error_count() local
235 uint32_t reg_offset; in sdma_v4_4_reset_ras_error_count() local
Dmmsch_v1_0.h61 uint32_t reg_offset : 28; member
66 uint32_t reg_offset : 20; member
99 uint32_t reg_offset, in mmsch_v1_0_insert_direct_wt()
109 uint32_t reg_offset, in mmsch_v1_0_insert_direct_rd_mod_wt()
121 uint32_t reg_offset, in mmsch_v1_0_insert_direct_poll()
Djpeg_v1_0.c38 …_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_offset, uint32_t v… in jpeg_v1_0_decode_ring_patch_wreg()
57 uint32_t reg, reg_offset, val, mask, i; in jpeg_v1_0_decode_ring_set_patch_ring() local
351 uint32_t reg_offset = (reg << 2); in jpeg_v1_0_decode_ring_emit_reg_wait() local
395 uint32_t reg_offset = (reg << 2); in jpeg_v1_0_decode_ring_emit_wreg() local
Dsoc15.h56 uint32_t reg_offset; member
63 uint32_t reg_offset; member
73 uint32_t reg_offset; member
82 uint32_t reg_offset; member
Dmmsch_v2_0.h245 uint32_t reg_offset : 28; member
250 uint32_t reg_offset : 20; member
283 uint32_t reg_offset, in mmsch_v2_0_insert_direct_wt()
293 uint32_t reg_offset, in mmsch_v2_0_insert_direct_rd_mod_wt()
305 uint32_t reg_offset, in mmsch_v2_0_insert_direct_poll()
Dmmsch_v3_0.h54 uint32_t reg_offset : 28; member
59 uint32_t reg_offset : 20; member
Dnv.c419 u32 sh_num, u32 reg_offset) in nv_read_indexed_register()
437 u32 sh_num, u32 reg_offset) in nv_get_register_value()
449 u32 sh_num, u32 reg_offset, u32 *value) in nv_read_register()
/drivers/net/wireless/ath/ath9k/
Dhtc_drv_init.c234 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset) in ath9k_regread()
302 static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset) in ath9k_regwrite_single()
323 static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset) in ath9k_regwrite_buffer()
346 static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset) in ath9k_regwrite()
384 u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw_buffer()
467 u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw_single()
489 static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw()
Dinit.c172 static void ath9k_iowrite32(void *hw_priv, u32 val, u32 reg_offset) in ath9k_iowrite32()
187 static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset) in ath9k_ioread32()
214 static unsigned int __ath9k_reg_rmw(struct ath_softc *sc, u32 reg_offset, in __ath9k_reg_rmw()
227 static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr) in ath9k_reg_rmw()
Dar9003_hw.c1102 unsigned int dbg_reg, reg_offset; in ath9k_hw_verify_hang() local
1136 unsigned int reg_offset; in ar9003_hw_detect_mac_hang() local
/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-socfpga.c46 u32 reg_offset; member
103 u32 reg_offset, reg_shift; in socfpga_dwmac_parse_data() local
265 u32 reg_offset = dwmac->reg_offset; in socfpga_gen5_set_phy_mode() local
327 u32 reg_offset = dwmac->reg_offset; in socfpga_gen10_set_phy_mode() local
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dcommon_baco.h38 uint32_t reg_offset; member
50 uint32_t reg_offset; member
/drivers/gpu/drm/radeon/
Dcik_sdma.c251 u32 rb_cntl, reg_offset; in cik_sdma_gfx_stop() local
305 uint32_t reg_offset, value; in cik_sdma_ctx_switch_enable() local
332 u32 me_cntl, reg_offset; in cik_sdma_enable() local
369 u32 reg_offset, wb_offset; in cik_sdma_gfx_resume() local
/drivers/tty/serial/8250/
D8250_early.c39 int reg_offset = offset; in serial8250_early_in() local
62 int reg_offset = offset; in serial8250_early_out() local
/drivers/net/mdio/
Dmdio-ipq8064.c53 ipq8064_mdio_read(struct mii_bus *bus, int phy_addr, int reg_offset) in ipq8064_mdio_read()
79 ipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data) in ipq8064_mdio_write()
/drivers/reset/
Dreset-simple.c118 u32 reg_offset; member
164 u32 reg_offset = 0; in reset_simple_probe() local
Dreset-socfpga.c28 u32 reg_offset = 0x10; in a10_reset_init() local
/drivers/fpga/
Dsocfpga.c134 static u32 socfpga_fpga_readl(struct socfpga_fpga_priv *priv, u32 reg_offset) in socfpga_fpga_readl()
139 static void socfpga_fpga_writel(struct socfpga_fpga_priv *priv, u32 reg_offset, in socfpga_fpga_writel()
146 u32 reg_offset) in socfpga_fpga_raw_readl()
152 u32 reg_offset, u32 value) in socfpga_fpga_raw_writel()
/drivers/media/platform/imx-jpeg/
Dmxc-jpeg-hw.c12 #define print_wrapper_reg(dev, base_address, reg_offset)\ argument
15 #define internal_print_wrapper_reg(dev, base_address, reg_name, reg_offset) {\ argument
/drivers/pinctrl/freescale/
Dpinctrl-imx1-core.c86 u32 value, u32 reg_offset) in imx1_write_2bit()
113 u32 value, u32 reg_offset) in imx1_write_bit()
133 u32 reg_offset) in imx1_read_2bit()
146 u32 reg_offset) in imx1_read_bit()
/drivers/clocksource/
Dtimer-atmel-pit.c59 static inline unsigned int pit_read(void __iomem *base, unsigned int reg_offset) in pit_read()
64 static inline void pit_write(void __iomem *base, unsigned int reg_offset, unsigned long value) in pit_write()
/drivers/irqchip/
Dirq-bcm2836.c25 static void bcm2836_arm_irqchip_mask_per_cpu_irq(unsigned int reg_offset, in bcm2836_arm_irqchip_mask_per_cpu_irq()
34 static void bcm2836_arm_irqchip_unmask_per_cpu_irq(unsigned int reg_offset, in bcm2836_arm_irqchip_unmask_per_cpu_irq()
/drivers/phy/rockchip/
Dphy-rockchip-emmc.c85 unsigned int reg_offset; member
354 unsigned int reg_offset; in rockchip_emmc_phy_probe() local
/drivers/xen/xen-pciback/
Dconf_space_header.c346 #define CFG_FIELD_BAR(reg_offset) \ argument
357 #define CFG_FIELD_ROM(reg_offset) \ argument

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