1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2015-2017 Google, Inc
4 *
5 * USB Type-C Port Controller Interface.
6 */
7
8 #include <linux/delay.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/property.h>
14 #include <linux/regmap.h>
15 #include <linux/usb/pd.h>
16 #include <linux/usb/tcpci.h>
17 #include <linux/usb/tcpm.h>
18 #include <linux/usb/typec.h>
19
20 #define PD_RETRY_COUNT_DEFAULT 3
21 #define PD_RETRY_COUNT_3_0_OR_HIGHER 2
22 #define AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV 3500
23 #define VSINKPD_MIN_IR_DROP_MV 750
24 #define VSRC_NEW_MIN_PERCENT 95
25 #define VSRC_VALID_MIN_MV 500
26 #define VPPS_NEW_MIN_PERCENT 95
27 #define VPPS_VALID_MIN_MV 100
28 #define VSINKDISCONNECT_PD_MIN_PERCENT 90
29
30 #define tcpc_presenting_rd(reg, cc) \
31 (!(TCPC_ROLE_CTRL_DRP & (reg)) && \
32 (((reg) & (TCPC_ROLE_CTRL_## cc ##_MASK << TCPC_ROLE_CTRL_## cc ##_SHIFT)) == \
33 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_## cc ##_SHIFT)))
34
35 struct tcpci {
36 struct device *dev;
37
38 struct tcpm_port *port;
39
40 struct regmap *regmap;
41
42 bool controls_vbus;
43
44 struct tcpc_dev tcpc;
45 struct tcpci_data *data;
46 };
47
48 struct tcpci_chip {
49 struct tcpci *tcpci;
50 struct tcpci_data data;
51 };
52
tcpci_get_tcpm_port(struct tcpci * tcpci)53 struct tcpm_port *tcpci_get_tcpm_port(struct tcpci *tcpci)
54 {
55 return tcpci->port;
56 }
57 EXPORT_SYMBOL_GPL(tcpci_get_tcpm_port);
58
tcpc_to_tcpci(struct tcpc_dev * tcpc)59 static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc)
60 {
61 return container_of(tcpc, struct tcpci, tcpc);
62 }
63
tcpci_read16(struct tcpci * tcpci,unsigned int reg,u16 * val)64 static int tcpci_read16(struct tcpci *tcpci, unsigned int reg, u16 *val)
65 {
66 return regmap_raw_read(tcpci->regmap, reg, val, sizeof(u16));
67 }
68
tcpci_write16(struct tcpci * tcpci,unsigned int reg,u16 val)69 static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val)
70 {
71 return regmap_raw_write(tcpci->regmap, reg, &val, sizeof(u16));
72 }
73
tcpci_set_cc(struct tcpc_dev * tcpc,enum typec_cc_status cc)74 static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)
75 {
76 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
77 bool vconn_pres;
78 enum typec_cc_polarity polarity = TYPEC_POLARITY_CC1;
79 unsigned int reg;
80 int ret;
81
82 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®);
83 if (ret < 0)
84 return ret;
85
86 vconn_pres = !!(reg & TCPC_POWER_STATUS_VCONN_PRES);
87 if (vconn_pres) {
88 ret = regmap_read(tcpci->regmap, TCPC_TCPC_CTRL, ®);
89 if (ret < 0)
90 return ret;
91
92 if (reg & TCPC_TCPC_CTRL_ORIENTATION)
93 polarity = TYPEC_POLARITY_CC2;
94 }
95
96 switch (cc) {
97 case TYPEC_CC_RA:
98 reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) |
99 (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT);
100 break;
101 case TYPEC_CC_RD:
102 reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
103 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
104 break;
105 case TYPEC_CC_RP_DEF:
106 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
107 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
108 (TCPC_ROLE_CTRL_RP_VAL_DEF <<
109 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
110 break;
111 case TYPEC_CC_RP_1_5:
112 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
113 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
114 (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
115 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
116 break;
117 case TYPEC_CC_RP_3_0:
118 reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
119 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
120 (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
121 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
122 break;
123 case TYPEC_CC_OPEN:
124 default:
125 reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) |
126 (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
127 break;
128 }
129
130 if (vconn_pres) {
131 if (polarity == TYPEC_POLARITY_CC2) {
132 reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT);
133 reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT);
134 } else {
135 reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT);
136 reg |= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
137 }
138 }
139
140 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
141 if (ret < 0)
142 return ret;
143
144 return 0;
145 }
146
tcpci_apply_rc(struct tcpc_dev * tcpc,enum typec_cc_status cc,enum typec_cc_polarity polarity)147 static int tcpci_apply_rc(struct tcpc_dev *tcpc, enum typec_cc_status cc,
148 enum typec_cc_polarity polarity)
149 {
150 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
151 unsigned int reg;
152 int ret;
153
154 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, ®);
155 if (ret < 0)
156 return ret;
157
158 /*
159 * APPLY_RC state is when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2 and vbus autodischarge on
160 * disconnect is disabled. Bail out when ROLE_CONTROL.CC1 != ROLE_CONTROL.CC2.
161 */
162 if (((reg & (TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT)) >>
163 TCPC_ROLE_CTRL_CC2_SHIFT) !=
164 ((reg & (TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT)) >>
165 TCPC_ROLE_CTRL_CC1_SHIFT))
166 return 0;
167
168 return regmap_update_bits(tcpci->regmap, TCPC_ROLE_CTRL, polarity == TYPEC_POLARITY_CC1 ?
169 TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT :
170 TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT,
171 TCPC_ROLE_CTRL_CC_OPEN);
172 }
173
tcpci_start_toggling(struct tcpc_dev * tcpc,enum typec_port_type port_type,enum typec_cc_status cc)174 static int tcpci_start_toggling(struct tcpc_dev *tcpc,
175 enum typec_port_type port_type,
176 enum typec_cc_status cc)
177 {
178 int ret;
179 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
180 unsigned int reg = TCPC_ROLE_CTRL_DRP;
181
182 if (port_type != TYPEC_PORT_DRP)
183 return -EOPNOTSUPP;
184
185 /* Handle vendor drp toggling */
186 if (tcpci->data->start_drp_toggling) {
187 ret = tcpci->data->start_drp_toggling(tcpci, tcpci->data, cc);
188 if (ret < 0)
189 return ret;
190 }
191
192 switch (cc) {
193 default:
194 case TYPEC_CC_RP_DEF:
195 reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF <<
196 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
197 break;
198 case TYPEC_CC_RP_1_5:
199 reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
200 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
201 break;
202 case TYPEC_CC_RP_3_0:
203 reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
204 TCPC_ROLE_CTRL_RP_VAL_SHIFT);
205 break;
206 }
207
208 if (cc == TYPEC_CC_RD)
209 reg |= (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
210 (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
211 else
212 reg |= (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
213 (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT);
214 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
215 if (ret < 0)
216 return ret;
217 return regmap_write(tcpci->regmap, TCPC_COMMAND,
218 TCPC_CMD_LOOK4CONNECTION);
219 }
220
tcpci_to_typec_cc(unsigned int cc,bool sink)221 static enum typec_cc_status tcpci_to_typec_cc(unsigned int cc, bool sink)
222 {
223 switch (cc) {
224 case 0x1:
225 return sink ? TYPEC_CC_RP_DEF : TYPEC_CC_RA;
226 case 0x2:
227 return sink ? TYPEC_CC_RP_1_5 : TYPEC_CC_RD;
228 case 0x3:
229 if (sink)
230 return TYPEC_CC_RP_3_0;
231 fallthrough;
232 case 0x0:
233 default:
234 return TYPEC_CC_OPEN;
235 }
236 }
237
tcpci_get_cc(struct tcpc_dev * tcpc,enum typec_cc_status * cc1,enum typec_cc_status * cc2)238 static int tcpci_get_cc(struct tcpc_dev *tcpc,
239 enum typec_cc_status *cc1, enum typec_cc_status *cc2)
240 {
241 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
242 unsigned int reg, role_control;
243 int ret;
244
245 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, &role_control);
246 if (ret < 0)
247 return ret;
248
249 ret = regmap_read(tcpci->regmap, TCPC_CC_STATUS, ®);
250 if (ret < 0)
251 return ret;
252
253 *cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) &
254 TCPC_CC_STATUS_CC1_MASK,
255 reg & TCPC_CC_STATUS_TERM ||
256 tcpc_presenting_rd(role_control, CC1));
257 *cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) &
258 TCPC_CC_STATUS_CC2_MASK,
259 reg & TCPC_CC_STATUS_TERM ||
260 tcpc_presenting_rd(role_control, CC2));
261
262 return 0;
263 }
264
tcpci_set_polarity(struct tcpc_dev * tcpc,enum typec_cc_polarity polarity)265 static int tcpci_set_polarity(struct tcpc_dev *tcpc,
266 enum typec_cc_polarity polarity)
267 {
268 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
269 unsigned int reg;
270 int ret;
271 enum typec_cc_status cc1, cc2;
272
273 /* Obtain Rp setting from role control */
274 ret = regmap_read(tcpci->regmap, TCPC_ROLE_CTRL, ®);
275 if (ret < 0)
276 return ret;
277
278 ret = tcpci_get_cc(tcpc, &cc1, &cc2);
279 if (ret < 0)
280 return ret;
281
282 /*
283 * When port has drp toggling enabled, ROLE_CONTROL would only have the initial
284 * terminations for the toggling and does not indicate the final cc
285 * terminations when ConnectionResult is 0 i.e. drp toggling stops and
286 * the connection is resolbed. Infer port role from TCPC_CC_STATUS based on the
287 * terminations seen. The port role is then used to set the cc terminations.
288 */
289 if (reg & TCPC_ROLE_CTRL_DRP) {
290 /* Disable DRP for the OPEN setting to take effect */
291 reg = reg & ~TCPC_ROLE_CTRL_DRP;
292
293 if (polarity == TYPEC_POLARITY_CC2) {
294 reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT);
295 /* Local port is source */
296 if (cc2 == TYPEC_CC_RD)
297 /* Role control would have the Rp setting when DRP was enabled */
298 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT;
299 else
300 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT;
301 } else {
302 reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT);
303 /* Local port is source */
304 if (cc1 == TYPEC_CC_RD)
305 /* Role control would have the Rp setting when DRP was enabled */
306 reg |= TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT;
307 else
308 reg |= TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT;
309 }
310 }
311
312 if (polarity == TYPEC_POLARITY_CC2)
313 reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT;
314 else
315 reg |= TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT;
316 ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
317 if (ret < 0)
318 return ret;
319
320 return regmap_write(tcpci->regmap, TCPC_TCPC_CTRL,
321 (polarity == TYPEC_POLARITY_CC2) ?
322 TCPC_TCPC_CTRL_ORIENTATION : 0);
323 }
324
tcpci_set_partner_usb_comm_capable(struct tcpc_dev * tcpc,bool capable)325 static void tcpci_set_partner_usb_comm_capable(struct tcpc_dev *tcpc, bool capable)
326 {
327 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
328
329 if (tcpci->data->set_partner_usb_comm_capable)
330 tcpci->data->set_partner_usb_comm_capable(tcpci, tcpci->data, capable);
331 }
332
tcpci_set_vconn(struct tcpc_dev * tcpc,bool enable)333 static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable)
334 {
335 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
336 int ret;
337
338 /* Handle vendor set vconn */
339 if (tcpci->data->set_vconn) {
340 ret = tcpci->data->set_vconn(tcpci, tcpci->data, enable);
341 if (ret < 0)
342 return ret;
343 }
344
345 return regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL,
346 TCPC_POWER_CTRL_VCONN_ENABLE,
347 enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0);
348 }
349
tcpci_enable_auto_vbus_discharge(struct tcpc_dev * dev,bool enable)350 static int tcpci_enable_auto_vbus_discharge(struct tcpc_dev *dev, bool enable)
351 {
352 struct tcpci *tcpci = tcpc_to_tcpci(dev);
353 int ret;
354
355 ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_AUTO_DISCHARGE,
356 enable ? TCPC_POWER_CTRL_AUTO_DISCHARGE : 0);
357 return ret;
358 }
359
tcpci_set_auto_vbus_discharge_threshold(struct tcpc_dev * dev,enum typec_pwr_opmode mode,bool pps_active,u32 requested_vbus_voltage_mv)360 static int tcpci_set_auto_vbus_discharge_threshold(struct tcpc_dev *dev, enum typec_pwr_opmode mode,
361 bool pps_active, u32 requested_vbus_voltage_mv)
362 {
363 struct tcpci *tcpci = tcpc_to_tcpci(dev);
364 unsigned int pwr_ctrl, threshold = 0;
365 int ret;
366
367 /*
368 * Indicates that vbus is going to go away due PR_SWAP, hard reset etc.
369 * Do not discharge vbus here.
370 */
371 if (requested_vbus_voltage_mv == 0)
372 goto write_thresh;
373
374 ret = regmap_read(tcpci->regmap, TCPC_POWER_CTRL, &pwr_ctrl);
375 if (ret < 0)
376 return ret;
377
378 if (pwr_ctrl & TCPC_FAST_ROLE_SWAP_EN) {
379 /* To prevent disconnect when the source is fast role swap is capable. */
380 threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV;
381 } else if (mode == TYPEC_PWR_MODE_PD) {
382 if (pps_active)
383 threshold = ((VPPS_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) -
384 VSINKPD_MIN_IR_DROP_MV - VPPS_VALID_MIN_MV) *
385 VSINKDISCONNECT_PD_MIN_PERCENT / 100;
386 else
387 threshold = ((VSRC_NEW_MIN_PERCENT * requested_vbus_voltage_mv / 100) -
388 VSINKPD_MIN_IR_DROP_MV - VSRC_VALID_MIN_MV) *
389 VSINKDISCONNECT_PD_MIN_PERCENT / 100;
390 } else {
391 /* 3.5V for non-pd sink */
392 threshold = AUTO_DISCHARGE_DEFAULT_THRESHOLD_MV;
393 }
394
395 threshold = threshold / TCPC_VBUS_SINK_DISCONNECT_THRESH_LSB_MV;
396
397 if (threshold > TCPC_VBUS_SINK_DISCONNECT_THRESH_MAX)
398 return -EINVAL;
399
400 write_thresh:
401 return tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, threshold);
402 }
403
tcpci_enable_frs(struct tcpc_dev * dev,bool enable)404 static int tcpci_enable_frs(struct tcpc_dev *dev, bool enable)
405 {
406 struct tcpci *tcpci = tcpc_to_tcpci(dev);
407 int ret;
408
409 /* To prevent disconnect during FRS, set disconnect threshold to 3.5V */
410 ret = tcpci_write16(tcpci, TCPC_VBUS_SINK_DISCONNECT_THRESH, enable ? 0 : 0x8c);
411 if (ret < 0)
412 return ret;
413
414 ret = regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_FAST_ROLE_SWAP_EN, enable ?
415 TCPC_FAST_ROLE_SWAP_EN : 0);
416
417 return ret;
418 }
419
tcpci_frs_sourcing_vbus(struct tcpc_dev * dev)420 static void tcpci_frs_sourcing_vbus(struct tcpc_dev *dev)
421 {
422 struct tcpci *tcpci = tcpc_to_tcpci(dev);
423
424 if (tcpci->data->frs_sourcing_vbus)
425 tcpci->data->frs_sourcing_vbus(tcpci, tcpci->data);
426 }
427
tcpci_set_bist_data(struct tcpc_dev * tcpc,bool enable)428 static int tcpci_set_bist_data(struct tcpc_dev *tcpc, bool enable)
429 {
430 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
431
432 return regmap_update_bits(tcpci->regmap, TCPC_TCPC_CTRL, TCPC_TCPC_CTRL_BIST_TM,
433 enable ? TCPC_TCPC_CTRL_BIST_TM : 0);
434 }
435
tcpci_set_roles(struct tcpc_dev * tcpc,bool attached,enum typec_role role,enum typec_data_role data)436 static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached,
437 enum typec_role role, enum typec_data_role data)
438 {
439 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
440 unsigned int reg;
441 int ret;
442
443 reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT;
444 if (role == TYPEC_SOURCE)
445 reg |= TCPC_MSG_HDR_INFO_PWR_ROLE;
446 if (data == TYPEC_HOST)
447 reg |= TCPC_MSG_HDR_INFO_DATA_ROLE;
448 ret = regmap_write(tcpci->regmap, TCPC_MSG_HDR_INFO, reg);
449 if (ret < 0)
450 return ret;
451
452 return 0;
453 }
454
tcpci_set_pd_rx(struct tcpc_dev * tcpc,bool enable)455 static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable)
456 {
457 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
458 unsigned int reg = 0;
459 int ret;
460
461 if (enable)
462 reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET;
463 ret = regmap_write(tcpci->regmap, TCPC_RX_DETECT, reg);
464 if (ret < 0)
465 return ret;
466
467 return 0;
468 }
469
tcpci_get_vbus(struct tcpc_dev * tcpc)470 static int tcpci_get_vbus(struct tcpc_dev *tcpc)
471 {
472 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
473 unsigned int reg;
474 int ret;
475
476 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®);
477 if (ret < 0)
478 return ret;
479
480 return !!(reg & TCPC_POWER_STATUS_VBUS_PRES);
481 }
482
tcpci_is_vbus_vsafe0v(struct tcpc_dev * tcpc)483 static bool tcpci_is_vbus_vsafe0v(struct tcpc_dev *tcpc)
484 {
485 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
486 unsigned int reg;
487 int ret;
488
489 ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, ®);
490 if (ret < 0)
491 return false;
492
493 return !!(reg & TCPC_EXTENDED_STATUS_VSAFE0V);
494 }
495
tcpci_set_vbus(struct tcpc_dev * tcpc,bool source,bool sink)496 static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)
497 {
498 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
499 int ret;
500
501 if (tcpci->data->set_vbus) {
502 ret = tcpci->data->set_vbus(tcpci, tcpci->data, source, sink);
503 /* Bypass when ret > 0 */
504 if (ret != 0)
505 return ret < 0 ? ret : 0;
506 }
507
508 /* Disable both source and sink first before enabling anything */
509
510 if (!source) {
511 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
512 TCPC_CMD_DISABLE_SRC_VBUS);
513 if (ret < 0)
514 return ret;
515 }
516
517 if (!sink) {
518 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
519 TCPC_CMD_DISABLE_SINK_VBUS);
520 if (ret < 0)
521 return ret;
522 }
523
524 if (source) {
525 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
526 TCPC_CMD_SRC_VBUS_DEFAULT);
527 if (ret < 0)
528 return ret;
529 }
530
531 if (sink) {
532 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
533 TCPC_CMD_SINK_VBUS);
534 if (ret < 0)
535 return ret;
536 }
537
538 return 0;
539 }
540
tcpci_pd_transmit(struct tcpc_dev * tcpc,enum tcpm_transmit_type type,const struct pd_message * msg,unsigned int negotiated_rev)541 static int tcpci_pd_transmit(struct tcpc_dev *tcpc, enum tcpm_transmit_type type,
542 const struct pd_message *msg, unsigned int negotiated_rev)
543 {
544 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
545 u16 header = msg ? le16_to_cpu(msg->header) : 0;
546 unsigned int reg, cnt;
547 int ret;
548
549 cnt = msg ? pd_header_cnt(header) * 4 : 0;
550 /**
551 * TCPCI spec forbids direct access of TCPC_TX_DATA.
552 * But, since some of the chipsets offer this capability,
553 * it's fair to support both.
554 */
555 if (tcpci->data->TX_BUF_BYTE_x_hidden) {
556 u8 buf[TCPC_TRANSMIT_BUFFER_MAX_LEN] = {0,};
557 u8 pos = 0;
558
559 /* Payload + header + TCPC_TX_BYTE_CNT */
560 buf[pos++] = cnt + 2;
561
562 if (msg)
563 memcpy(&buf[pos], &msg->header, sizeof(msg->header));
564
565 pos += sizeof(header);
566
567 if (cnt > 0)
568 memcpy(&buf[pos], msg->payload, cnt);
569
570 pos += cnt;
571 ret = regmap_raw_write(tcpci->regmap, TCPC_TX_BYTE_CNT, buf, pos);
572 if (ret < 0)
573 return ret;
574 } else {
575 ret = regmap_write(tcpci->regmap, TCPC_TX_BYTE_CNT, cnt + 2);
576 if (ret < 0)
577 return ret;
578
579 ret = tcpci_write16(tcpci, TCPC_TX_HDR, header);
580 if (ret < 0)
581 return ret;
582
583 if (cnt > 0) {
584 ret = regmap_raw_write(tcpci->regmap, TCPC_TX_DATA, &msg->payload, cnt);
585 if (ret < 0)
586 return ret;
587 }
588 }
589
590 /* nRetryCount is 3 in PD2.0 spec where 2 in PD3.0 spec */
591 reg = ((negotiated_rev > PD_REV20 ? PD_RETRY_COUNT_3_0_OR_HIGHER : PD_RETRY_COUNT_DEFAULT)
592 << TCPC_TRANSMIT_RETRY_SHIFT) | (type << TCPC_TRANSMIT_TYPE_SHIFT);
593 ret = regmap_write(tcpci->regmap, TCPC_TRANSMIT, reg);
594 if (ret < 0)
595 return ret;
596
597 return 0;
598 }
599
tcpci_init(struct tcpc_dev * tcpc)600 static int tcpci_init(struct tcpc_dev *tcpc)
601 {
602 struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
603 unsigned long timeout = jiffies + msecs_to_jiffies(2000); /* XXX */
604 unsigned int reg;
605 int ret;
606
607 while (time_before_eq(jiffies, timeout)) {
608 ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, ®);
609 if (ret < 0)
610 return ret;
611 if (!(reg & TCPC_POWER_STATUS_UNINIT))
612 break;
613 usleep_range(10000, 20000);
614 }
615 if (time_after(jiffies, timeout))
616 return -ETIMEDOUT;
617
618 ret = tcpci_write16(tcpci, TCPC_FAULT_STATUS, TCPC_FAULT_STATUS_ALL_REG_RST_TO_DEFAULT);
619 if (ret < 0)
620 return ret;
621
622 /* Handle vendor init */
623 if (tcpci->data->init) {
624 ret = tcpci->data->init(tcpci, tcpci->data);
625 if (ret < 0)
626 return ret;
627 }
628
629 /* Clear all events */
630 ret = tcpci_write16(tcpci, TCPC_ALERT, 0xffff);
631 if (ret < 0)
632 return ret;
633
634 if (tcpci->controls_vbus)
635 reg = TCPC_POWER_STATUS_VBUS_PRES;
636 else
637 reg = 0;
638 ret = regmap_write(tcpci->regmap, TCPC_POWER_STATUS_MASK, reg);
639 if (ret < 0)
640 return ret;
641
642 /* Enable Vbus detection */
643 ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
644 TCPC_CMD_ENABLE_VBUS_DETECT);
645 if (ret < 0)
646 return ret;
647
648 reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED |
649 TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS |
650 TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS;
651 if (tcpci->controls_vbus)
652 reg |= TCPC_ALERT_POWER_STATUS;
653 /* Enable VSAFE0V status interrupt when detecting VSAFE0V is supported */
654 if (tcpci->data->vbus_vsafe0v) {
655 reg |= TCPC_ALERT_EXTENDED_STATUS;
656 ret = regmap_write(tcpci->regmap, TCPC_EXTENDED_STATUS_MASK,
657 TCPC_EXTENDED_STATUS_VSAFE0V);
658 if (ret < 0)
659 return ret;
660 }
661 return tcpci_write16(tcpci, TCPC_ALERT_MASK, reg);
662 }
663
tcpci_irq(struct tcpci * tcpci)664 irqreturn_t tcpci_irq(struct tcpci *tcpci)
665 {
666 u16 status;
667 int ret;
668 unsigned int raw;
669
670 tcpci_read16(tcpci, TCPC_ALERT, &status);
671
672 /*
673 * Clear alert status for everything except RX_STATUS, which shouldn't
674 * be cleared until we have successfully retrieved message.
675 */
676 if (status & ~TCPC_ALERT_RX_STATUS)
677 tcpci_write16(tcpci, TCPC_ALERT,
678 status & ~TCPC_ALERT_RX_STATUS);
679
680 if (status & TCPC_ALERT_CC_STATUS)
681 tcpm_cc_change(tcpci->port);
682
683 if (status & TCPC_ALERT_POWER_STATUS) {
684 regmap_read(tcpci->regmap, TCPC_POWER_STATUS_MASK, &raw);
685 /*
686 * If power status mask has been reset, then the TCPC
687 * has reset.
688 */
689 if (raw == 0xff)
690 tcpm_tcpc_reset(tcpci->port);
691 else
692 tcpm_vbus_change(tcpci->port);
693 }
694
695 if (status & TCPC_ALERT_RX_STATUS) {
696 struct pd_message msg;
697 unsigned int cnt, payload_cnt;
698 u16 header;
699
700 regmap_read(tcpci->regmap, TCPC_RX_BYTE_CNT, &cnt);
701 /*
702 * 'cnt' corresponds to READABLE_BYTE_COUNT in section 4.4.14
703 * of the TCPCI spec [Rev 2.0 Ver 1.0 October 2017] and is
704 * defined in table 4-36 as one greater than the number of
705 * bytes received. And that number includes the header. So:
706 */
707 if (cnt > 3)
708 payload_cnt = cnt - (1 + sizeof(msg.header));
709 else
710 payload_cnt = 0;
711
712 tcpci_read16(tcpci, TCPC_RX_HDR, &header);
713 msg.header = cpu_to_le16(header);
714
715 if (WARN_ON(payload_cnt > sizeof(msg.payload)))
716 payload_cnt = sizeof(msg.payload);
717
718 if (payload_cnt > 0)
719 regmap_raw_read(tcpci->regmap, TCPC_RX_DATA,
720 &msg.payload, payload_cnt);
721
722 /* Read complete, clear RX status alert bit */
723 tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
724
725 tcpm_pd_receive(tcpci->port, &msg);
726 }
727
728 if (tcpci->data->vbus_vsafe0v && (status & TCPC_ALERT_EXTENDED_STATUS)) {
729 ret = regmap_read(tcpci->regmap, TCPC_EXTENDED_STATUS, &raw);
730 if (!ret && (raw & TCPC_EXTENDED_STATUS_VSAFE0V))
731 tcpm_vbus_change(tcpci->port);
732 }
733
734 if (status & TCPC_ALERT_RX_HARD_RST)
735 tcpm_pd_hard_reset(tcpci->port);
736
737 if (status & TCPC_ALERT_TX_SUCCESS)
738 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_SUCCESS);
739 else if (status & TCPC_ALERT_TX_DISCARDED)
740 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_DISCARDED);
741 else if (status & TCPC_ALERT_TX_FAILED)
742 tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_FAILED);
743
744 return IRQ_HANDLED;
745 }
746 EXPORT_SYMBOL_GPL(tcpci_irq);
747
_tcpci_irq(int irq,void * dev_id)748 static irqreturn_t _tcpci_irq(int irq, void *dev_id)
749 {
750 struct tcpci_chip *chip = dev_id;
751
752 return tcpci_irq(chip->tcpci);
753 }
754
755 static const struct regmap_config tcpci_regmap_config = {
756 .reg_bits = 8,
757 .val_bits = 8,
758
759 .max_register = 0x7F, /* 0x80 .. 0xFF are vendor defined */
760 };
761
tcpci_parse_config(struct tcpci * tcpci)762 static int tcpci_parse_config(struct tcpci *tcpci)
763 {
764 tcpci->controls_vbus = true; /* XXX */
765
766 tcpci->tcpc.fwnode = device_get_named_child_node(tcpci->dev,
767 "connector");
768 if (!tcpci->tcpc.fwnode) {
769 dev_err(tcpci->dev, "Can't find connector node.\n");
770 return -EINVAL;
771 }
772
773 return 0;
774 }
775
tcpci_register_port(struct device * dev,struct tcpci_data * data)776 struct tcpci *tcpci_register_port(struct device *dev, struct tcpci_data *data)
777 {
778 struct tcpci *tcpci;
779 int err;
780
781 tcpci = devm_kzalloc(dev, sizeof(*tcpci), GFP_KERNEL);
782 if (!tcpci)
783 return ERR_PTR(-ENOMEM);
784
785 tcpci->dev = dev;
786 tcpci->data = data;
787 tcpci->regmap = data->regmap;
788
789 tcpci->tcpc.init = tcpci_init;
790 tcpci->tcpc.get_vbus = tcpci_get_vbus;
791 tcpci->tcpc.set_vbus = tcpci_set_vbus;
792 tcpci->tcpc.set_cc = tcpci_set_cc;
793 tcpci->tcpc.apply_rc = tcpci_apply_rc;
794 tcpci->tcpc.get_cc = tcpci_get_cc;
795 tcpci->tcpc.set_polarity = tcpci_set_polarity;
796 tcpci->tcpc.set_vconn = tcpci_set_vconn;
797 tcpci->tcpc.start_toggling = tcpci_start_toggling;
798
799 tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx;
800 tcpci->tcpc.set_roles = tcpci_set_roles;
801 tcpci->tcpc.pd_transmit = tcpci_pd_transmit;
802 tcpci->tcpc.set_bist_data = tcpci_set_bist_data;
803 tcpci->tcpc.enable_frs = tcpci_enable_frs;
804 tcpci->tcpc.frs_sourcing_vbus = tcpci_frs_sourcing_vbus;
805 tcpci->tcpc.set_partner_usb_comm_capable = tcpci_set_partner_usb_comm_capable;
806
807 if (tcpci->data->auto_discharge_disconnect) {
808 tcpci->tcpc.enable_auto_vbus_discharge = tcpci_enable_auto_vbus_discharge;
809 tcpci->tcpc.set_auto_vbus_discharge_threshold =
810 tcpci_set_auto_vbus_discharge_threshold;
811 regmap_update_bits(tcpci->regmap, TCPC_POWER_CTRL, TCPC_POWER_CTRL_BLEED_DISCHARGE,
812 TCPC_POWER_CTRL_BLEED_DISCHARGE);
813 }
814
815 if (tcpci->data->vbus_vsafe0v)
816 tcpci->tcpc.is_vbus_vsafe0v = tcpci_is_vbus_vsafe0v;
817
818 err = tcpci_parse_config(tcpci);
819 if (err < 0)
820 return ERR_PTR(err);
821
822 tcpci->port = tcpm_register_port(tcpci->dev, &tcpci->tcpc);
823 if (IS_ERR(tcpci->port)) {
824 fwnode_handle_put(tcpci->tcpc.fwnode);
825 return ERR_CAST(tcpci->port);
826 }
827
828 return tcpci;
829 }
830 EXPORT_SYMBOL_GPL(tcpci_register_port);
831
tcpci_unregister_port(struct tcpci * tcpci)832 void tcpci_unregister_port(struct tcpci *tcpci)
833 {
834 tcpm_unregister_port(tcpci->port);
835 fwnode_handle_put(tcpci->tcpc.fwnode);
836 }
837 EXPORT_SYMBOL_GPL(tcpci_unregister_port);
838
tcpci_probe(struct i2c_client * client,const struct i2c_device_id * i2c_id)839 static int tcpci_probe(struct i2c_client *client,
840 const struct i2c_device_id *i2c_id)
841 {
842 struct tcpci_chip *chip;
843 int err;
844 u16 val = 0;
845
846 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
847 if (!chip)
848 return -ENOMEM;
849
850 chip->data.regmap = devm_regmap_init_i2c(client, &tcpci_regmap_config);
851 if (IS_ERR(chip->data.regmap))
852 return PTR_ERR(chip->data.regmap);
853
854 i2c_set_clientdata(client, chip);
855
856 /* Disable chip interrupts before requesting irq */
857 err = regmap_raw_write(chip->data.regmap, TCPC_ALERT_MASK, &val,
858 sizeof(u16));
859 if (err < 0)
860 return err;
861
862 chip->tcpci = tcpci_register_port(&client->dev, &chip->data);
863 if (IS_ERR(chip->tcpci))
864 return PTR_ERR(chip->tcpci);
865
866 err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
867 _tcpci_irq,
868 IRQF_ONESHOT | IRQF_TRIGGER_LOW,
869 dev_name(&client->dev), chip);
870 if (err < 0) {
871 tcpci_unregister_port(chip->tcpci);
872 return err;
873 }
874
875 return 0;
876 }
877
tcpci_remove(struct i2c_client * client)878 static int tcpci_remove(struct i2c_client *client)
879 {
880 struct tcpci_chip *chip = i2c_get_clientdata(client);
881 int err;
882
883 /* Disable chip interrupts before unregistering port */
884 err = tcpci_write16(chip->tcpci, TCPC_ALERT_MASK, 0);
885 if (err < 0)
886 dev_warn(&client->dev, "Failed to disable irqs (%pe)\n", ERR_PTR(err));
887
888 tcpci_unregister_port(chip->tcpci);
889
890 return 0;
891 }
892
893 static const struct i2c_device_id tcpci_id[] = {
894 { "tcpci", 0 },
895 { }
896 };
897 MODULE_DEVICE_TABLE(i2c, tcpci_id);
898
899 #ifdef CONFIG_OF
900 static const struct of_device_id tcpci_of_match[] = {
901 { .compatible = "nxp,ptn5110", },
902 {},
903 };
904 MODULE_DEVICE_TABLE(of, tcpci_of_match);
905 #endif
906
907 static struct i2c_driver tcpci_i2c_driver = {
908 .driver = {
909 .name = "tcpci",
910 .of_match_table = of_match_ptr(tcpci_of_match),
911 },
912 .probe = tcpci_probe,
913 .remove = tcpci_remove,
914 .id_table = tcpci_id,
915 };
916 module_i2c_driver(tcpci_i2c_driver);
917
918 MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver");
919 MODULE_LICENSE("GPL");
920