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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Universal Flash Storage Host controller driver
4  * Copyright (C) 2011-2013 Samsung India Software Operations
5  * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
6  *
7  * Authors:
8  *	Santosh Yaraganavi <santosh.sy@samsung.com>
9  *	Vinayak Holikatti <h.vinayak@samsung.com>
10  */
11 
12 #ifndef _UFSHCD_H
13 #define _UFSHCD_H
14 
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/delay.h>
21 #include <linux/slab.h>
22 #include <linux/spinlock.h>
23 #include <linux/rwsem.h>
24 #include <linux/workqueue.h>
25 #include <linux/errno.h>
26 #include <linux/types.h>
27 #include <linux/wait.h>
28 #include <linux/bitops.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/clk.h>
31 #include <linux/completion.h>
32 #include <linux/regulator/consumer.h>
33 #include <linux/bitfield.h>
34 #include <linux/devfreq.h>
35 #include <linux/keyslot-manager.h>
36 #include "unipro.h"
37 
38 #include <asm/irq.h>
39 #include <asm/byteorder.h>
40 #include <scsi/scsi.h>
41 #include <scsi/scsi_cmnd.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_dbg.h>
45 #include <scsi/scsi_eh.h>
46 #include <linux/android_kabi.h>
47 
48 #include "ufs.h"
49 #include "ufs_quirks.h"
50 #include "ufshci.h"
51 
52 #define UFSHCD "ufshcd"
53 #define UFSHCD_DRIVER_VERSION "0.2"
54 
55 struct ufs_hba;
56 
57 enum dev_cmd_type {
58 	DEV_CMD_TYPE_NOP		= 0x0,
59 	DEV_CMD_TYPE_QUERY		= 0x1,
60 };
61 
62 enum ufs_event_type {
63 	/* uic specific errors */
64 	UFS_EVT_PA_ERR = 0,
65 	UFS_EVT_DL_ERR,
66 	UFS_EVT_NL_ERR,
67 	UFS_EVT_TL_ERR,
68 	UFS_EVT_DME_ERR,
69 
70 	/* fatal errors */
71 	UFS_EVT_AUTO_HIBERN8_ERR,
72 	UFS_EVT_FATAL_ERR,
73 	UFS_EVT_LINK_STARTUP_FAIL,
74 	UFS_EVT_RESUME_ERR,
75 	UFS_EVT_SUSPEND_ERR,
76 	UFS_EVT_WL_SUSP_ERR,
77 	UFS_EVT_WL_RES_ERR,
78 
79 	/* abnormal events */
80 	UFS_EVT_DEV_RESET,
81 	UFS_EVT_HOST_RESET,
82 	UFS_EVT_ABORT,
83 
84 	UFS_EVT_CNT,
85 };
86 
87 /**
88  * struct uic_command - UIC command structure
89  * @command: UIC command
90  * @argument1: UIC command argument 1
91  * @argument2: UIC command argument 2
92  * @argument3: UIC command argument 3
93  * @cmd_active: Indicate if UIC command is outstanding
94  * @done: UIC command completion
95  */
96 struct uic_command {
97 	u32 command;
98 	u32 argument1;
99 	u32 argument2;
100 	u32 argument3;
101 	int cmd_active;
102 	struct completion done;
103 };
104 
105 /* Used to differentiate the power management options */
106 enum ufs_pm_op {
107 	UFS_RUNTIME_PM,
108 	UFS_SYSTEM_PM,
109 	UFS_SHUTDOWN_PM,
110 };
111 
112 /* Host <-> Device UniPro Link state */
113 enum uic_link_state {
114 	UIC_LINK_OFF_STATE	= 0, /* Link powered down or disabled */
115 	UIC_LINK_ACTIVE_STATE	= 1, /* Link is in Fast/Slow/Sleep state */
116 	UIC_LINK_HIBERN8_STATE	= 2, /* Link is in Hibernate state */
117 	UIC_LINK_BROKEN_STATE	= 3, /* Link is in broken state */
118 };
119 
120 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
121 #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
122 				    UIC_LINK_ACTIVE_STATE)
123 #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
124 				    UIC_LINK_HIBERN8_STATE)
125 #define ufshcd_is_link_broken(hba) ((hba)->uic_link_state == \
126 				   UIC_LINK_BROKEN_STATE)
127 #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
128 #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
129 				    UIC_LINK_ACTIVE_STATE)
130 #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
131 				    UIC_LINK_HIBERN8_STATE)
132 #define ufshcd_set_link_broken(hba) ((hba)->uic_link_state = \
133 				    UIC_LINK_BROKEN_STATE)
134 
135 #define ufshcd_set_ufs_dev_active(h) \
136 	((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
137 #define ufshcd_set_ufs_dev_sleep(h) \
138 	((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
139 #define ufshcd_set_ufs_dev_poweroff(h) \
140 	((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
141 #define ufshcd_set_ufs_dev_deepsleep(h) \
142 	((h)->curr_dev_pwr_mode = UFS_DEEPSLEEP_PWR_MODE)
143 #define ufshcd_is_ufs_dev_active(h) \
144 	((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
145 #define ufshcd_is_ufs_dev_sleep(h) \
146 	((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
147 #define ufshcd_is_ufs_dev_poweroff(h) \
148 	((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
149 #define ufshcd_is_ufs_dev_deepsleep(h) \
150 	((h)->curr_dev_pwr_mode == UFS_DEEPSLEEP_PWR_MODE)
151 
152 /*
153  * UFS Power management levels.
154  * Each level is in increasing order of power savings, except DeepSleep
155  * which is lower than PowerDown with power on but not PowerDown with
156  * power off.
157  */
158 enum ufs_pm_level {
159 	UFS_PM_LVL_0,
160 	UFS_PM_LVL_1,
161 	UFS_PM_LVL_2,
162 	UFS_PM_LVL_3,
163 	UFS_PM_LVL_4,
164 	UFS_PM_LVL_5,
165 	UFS_PM_LVL_6,
166 	UFS_PM_LVL_MAX
167 };
168 
169 struct ufs_pm_lvl_states {
170 	enum ufs_dev_pwr_mode dev_state;
171 	enum uic_link_state link_state;
172 };
173 
174 /**
175  * struct ufshcd_lrb - local reference block
176  * @utr_descriptor_ptr: UTRD address of the command
177  * @ucd_req_ptr: UCD address of the command
178  * @ucd_rsp_ptr: Response UPIU address for this command
179  * @ucd_prdt_ptr: PRDT address of the command
180  * @utrd_dma_addr: UTRD dma address for debug
181  * @ucd_prdt_dma_addr: PRDT dma address for debug
182  * @ucd_rsp_dma_addr: UPIU response dma address for debug
183  * @ucd_req_dma_addr: UPIU request dma address for debug
184  * @cmd: pointer to SCSI command
185  * @sense_buffer: pointer to sense buffer address of the SCSI command
186  * @sense_bufflen: Length of the sense buffer
187  * @scsi_status: SCSI status of the command
188  * @command_type: SCSI, UFS, Query.
189  * @task_tag: Task tag of the command
190  * @lun: LUN of the command
191  * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
192  * @issue_time_stamp: time stamp for debug purposes
193  * @compl_time_stamp: time stamp for statistics
194  * @crypto_key_slot: the key slot to use for inline crypto (-1 if none)
195  * @data_unit_num: the data unit number for the first block for inline crypto
196  * @req_abort_skip: skip request abort task flag
197  */
198 struct ufshcd_lrb {
199 	struct utp_transfer_req_desc *utr_descriptor_ptr;
200 	struct utp_upiu_req *ucd_req_ptr;
201 	struct utp_upiu_rsp *ucd_rsp_ptr;
202 	struct ufshcd_sg_entry *ucd_prdt_ptr;
203 
204 	dma_addr_t utrd_dma_addr;
205 	dma_addr_t ucd_req_dma_addr;
206 	dma_addr_t ucd_rsp_dma_addr;
207 	dma_addr_t ucd_prdt_dma_addr;
208 
209 	struct scsi_cmnd *cmd;
210 	u8 *sense_buffer;
211 	unsigned int sense_bufflen;
212 	int scsi_status;
213 
214 	int command_type;
215 	int task_tag;
216 	u8 lun; /* UPIU LUN id field is only 8-bit wide */
217 	bool intr_cmd;
218 	ktime_t issue_time_stamp;
219 	ktime_t compl_time_stamp;
220 #ifdef CONFIG_SCSI_UFS_CRYPTO
221 	int crypto_key_slot;
222 	u64 data_unit_num;
223 #endif
224 
225 	bool req_abort_skip;
226 
227 	ANDROID_VENDOR_DATA(1);
228 
229 	ANDROID_KABI_RESERVE(1);
230 };
231 
232 /**
233  * struct ufs_query - holds relevant data structures for query request
234  * @request: request upiu and function
235  * @descriptor: buffer for sending/receiving descriptor
236  * @response: response upiu and response
237  */
238 struct ufs_query {
239 	struct ufs_query_req request;
240 	u8 *descriptor;
241 	struct ufs_query_res response;
242 };
243 
244 /**
245  * struct ufs_dev_cmd - all assosiated fields with device management commands
246  * @type: device management command type - Query, NOP OUT
247  * @lock: lock to allow one command at a time
248  * @complete: internal commands completion
249  */
250 struct ufs_dev_cmd {
251 	enum dev_cmd_type type;
252 	struct mutex lock;
253 	struct completion *complete;
254 	struct ufs_query query;
255 };
256 
257 /**
258  * struct ufs_clk_info - UFS clock related info
259  * @list: list headed by hba->clk_list_head
260  * @clk: clock node
261  * @name: clock name
262  * @max_freq: maximum frequency supported by the clock
263  * @min_freq: min frequency that can be used for clock scaling
264  * @curr_freq: indicates the current frequency that it is set to
265  * @keep_link_active: indicates that the clk should not be disabled if
266 		      link is active
267  * @enabled: variable to check against multiple enable/disable
268  */
269 struct ufs_clk_info {
270 	struct list_head list;
271 	struct clk *clk;
272 	const char *name;
273 	u32 max_freq;
274 	u32 min_freq;
275 	u32 curr_freq;
276 	bool keep_link_active;
277 	bool enabled;
278 };
279 
280 enum ufs_notify_change_status {
281 	PRE_CHANGE,
282 	POST_CHANGE,
283 };
284 
285 struct ufs_pa_layer_attr {
286 	u32 gear_rx;
287 	u32 gear_tx;
288 	u32 lane_rx;
289 	u32 lane_tx;
290 	u32 pwr_rx;
291 	u32 pwr_tx;
292 	u32 hs_rate;
293 };
294 
295 struct ufs_pwr_mode_info {
296 	bool is_valid;
297 	struct ufs_pa_layer_attr info;
298 };
299 
300 /**
301  * struct ufs_hba_variant_ops - variant specific callbacks
302  * @name: variant name
303  * @init: called when the driver is initialized
304  * @exit: called to cleanup everything done in init
305  * @get_ufs_hci_version: called to get UFS HCI version
306  * @clk_scale_notify: notifies that clks are scaled up/down
307  * @setup_clocks: called before touching any of the controller registers
308  * @hce_enable_notify: called before and after HCE enable bit is set to allow
309  *                     variant specific Uni-Pro initialization.
310  * @link_startup_notify: called before and after Link startup is carried out
311  *                       to allow variant specific Uni-Pro initialization.
312  * @pwr_change_notify: called before and after a power mode change
313  *			is carried out to allow vendor spesific capabilities
314  *			to be set.
315  * @setup_xfer_req: called before any transfer request is issued
316  *                  to set some things
317  * @setup_task_mgmt: called before any task management request is issued
318  *                  to set some things
319  * @hibern8_notify: called around hibern8 enter/exit
320  * @apply_dev_quirks: called to apply device specific quirks
321  * @suspend: called during host controller PM callback
322  * @resume: called during host controller PM callback
323  * @dbg_register_dump: used to dump controller debug information
324  * @phy_initialization: used to initialize phys
325  * @device_reset: called to issue a reset pulse on the UFS device
326  * @program_key: program or evict an inline encryption key
327  * @event_notify: called to notify important events
328  */
329 struct ufs_hba_variant_ops {
330 	const char *name;
331 	int	(*init)(struct ufs_hba *);
332 	void    (*exit)(struct ufs_hba *);
333 	u32	(*get_ufs_hci_version)(struct ufs_hba *);
334 	int	(*clk_scale_notify)(struct ufs_hba *, bool,
335 				    enum ufs_notify_change_status);
336 	int	(*setup_clocks)(struct ufs_hba *, bool,
337 				enum ufs_notify_change_status);
338 	int	(*hce_enable_notify)(struct ufs_hba *,
339 				     enum ufs_notify_change_status);
340 	int	(*link_startup_notify)(struct ufs_hba *,
341 				       enum ufs_notify_change_status);
342 	int	(*pwr_change_notify)(struct ufs_hba *,
343 					enum ufs_notify_change_status status,
344 					struct ufs_pa_layer_attr *,
345 					struct ufs_pa_layer_attr *);
346 	void	(*setup_xfer_req)(struct ufs_hba *, int, bool);
347 	void	(*setup_task_mgmt)(struct ufs_hba *, int, u8);
348 	void    (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
349 					enum ufs_notify_change_status);
350 	int	(*apply_dev_quirks)(struct ufs_hba *hba);
351 	void	(*fixup_dev_quirks)(struct ufs_hba *hba);
352 	int     (*suspend)(struct ufs_hba *, enum ufs_pm_op,
353 					enum ufs_notify_change_status);
354 	int     (*resume)(struct ufs_hba *, enum ufs_pm_op);
355 	void	(*dbg_register_dump)(struct ufs_hba *hba);
356 	int	(*phy_initialization)(struct ufs_hba *);
357 	int	(*device_reset)(struct ufs_hba *hba);
358 	void	(*config_scaling_param)(struct ufs_hba *hba,
359 					struct devfreq_dev_profile *profile,
360 					void *data);
361 	int	(*program_key)(struct ufs_hba *hba,
362 			       const union ufs_crypto_cfg_entry *cfg, int slot);
363 	void	(*event_notify)(struct ufs_hba *hba,
364 				enum ufs_event_type evt, void *data);
365 
366 	ANDROID_KABI_RESERVE(1);
367 	ANDROID_KABI_RESERVE(2);
368 	ANDROID_KABI_RESERVE(3);
369 	ANDROID_KABI_RESERVE(4);
370 };
371 
372 /* clock gating state  */
373 enum clk_gating_state {
374 	CLKS_OFF,
375 	CLKS_ON,
376 	REQ_CLKS_OFF,
377 	REQ_CLKS_ON,
378 };
379 
380 /**
381  * struct ufs_clk_gating - UFS clock gating related info
382  * @gate_work: worker to turn off clocks after some delay as specified in
383  * delay_ms
384  * @ungate_work: worker to turn on clocks that will be used in case of
385  * interrupt context
386  * @state: the current clocks state
387  * @delay_ms: gating delay in ms
388  * @is_suspended: clk gating is suspended when set to 1 which can be used
389  * during suspend/resume
390  * @delay_attr: sysfs attribute to control delay_attr
391  * @enable_attr: sysfs attribute to enable/disable clock gating
392  * @is_enabled: Indicates the current status of clock gating
393  * @is_initialized: Indicates whether clock gating is initialized or not
394  * @active_reqs: number of requests that are pending and should be waited for
395  * completion before gating clocks.
396  */
397 struct ufs_clk_gating {
398 	struct delayed_work gate_work;
399 	struct work_struct ungate_work;
400 	enum clk_gating_state state;
401 	unsigned long delay_ms;
402 	bool is_suspended;
403 	struct device_attribute delay_attr;
404 	struct device_attribute enable_attr;
405 	bool is_enabled;
406 	bool is_initialized;
407 	int active_reqs;
408 	struct workqueue_struct *clk_gating_workq;
409 
410 	ANDROID_KABI_RESERVE(1);
411 };
412 
413 struct ufs_saved_pwr_info {
414 	struct ufs_pa_layer_attr info;
415 	bool is_valid;
416 };
417 
418 /**
419  * struct ufs_clk_scaling - UFS clock scaling related data
420  * @active_reqs: number of requests that are pending. If this is zero when
421  * devfreq ->target() function is called then schedule "suspend_work" to
422  * suspend devfreq.
423  * @tot_busy_t: Total busy time in current polling window
424  * @window_start_t: Start time (in jiffies) of the current polling window
425  * @busy_start_t: Start time of current busy period
426  * @enable_attr: sysfs attribute to enable/disable clock scaling
427  * @saved_pwr_info: UFS power mode may also be changed during scaling and this
428  * one keeps track of previous power mode.
429  * @workq: workqueue to schedule devfreq suspend/resume work
430  * @suspend_work: worker to suspend devfreq
431  * @resume_work: worker to resume devfreq
432  * @min_gear: lowest HS gear to scale down to
433  * @is_enabled: tracks if scaling is currently enabled or not, controlled by
434 		clkscale_enable sysfs node
435  * @is_allowed: tracks if scaling is currently allowed or not, used to block
436 		clock scaling which is not invoked from devfreq governor
437  * @is_initialized: Indicates whether clock scaling is initialized or not
438  * @is_busy_started: tracks if busy period has started or not
439  * @is_suspended: tracks if devfreq is suspended or not
440  */
441 struct ufs_clk_scaling {
442 	int active_reqs;
443 	unsigned long tot_busy_t;
444 	ktime_t window_start_t;
445 	ktime_t busy_start_t;
446 	struct device_attribute enable_attr;
447 	struct ufs_saved_pwr_info saved_pwr_info;
448 	struct workqueue_struct *workq;
449 	struct work_struct suspend_work;
450 	struct work_struct resume_work;
451 	u32 min_gear;
452 	bool is_enabled;
453 	bool is_allowed;
454 	bool is_initialized;
455 	bool is_busy_started;
456 	bool is_suspended;
457 
458 	ANDROID_KABI_RESERVE(1);
459 };
460 
461 #define UFS_EVENT_HIST_LENGTH 8
462 /**
463  * struct ufs_event_hist - keeps history of errors
464  * @pos: index to indicate cyclic buffer position
465  * @reg: cyclic buffer for registers value
466  * @tstamp: cyclic buffer for time stamp
467  * @cnt: error counter
468  */
469 struct ufs_event_hist {
470 	int pos;
471 	u32 val[UFS_EVENT_HIST_LENGTH];
472 	ktime_t tstamp[UFS_EVENT_HIST_LENGTH];
473 	unsigned long long cnt;
474 };
475 
476 /**
477  * struct ufs_stats - keeps usage/err statistics
478  * @last_intr_status: record the last interrupt status.
479  * @last_intr_ts: record the last interrupt timestamp.
480  * @hibern8_exit_cnt: Counter to keep track of number of exits,
481  *		reset this after link-startup.
482  * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
483  *		Clear after the first successful command completion.
484  */
485 struct ufs_stats {
486 	u32 last_intr_status;
487 	ktime_t last_intr_ts;
488 
489 	u32 hibern8_exit_cnt;
490 	ktime_t last_hibern8_exit_tstamp;
491 	struct ufs_event_hist event[UFS_EVT_CNT];
492 };
493 
494 /**
495  * enum ufshcd_state - UFS host controller state
496  * @UFSHCD_STATE_RESET: Link is not operational. Postpone SCSI command
497  *	processing.
498  * @UFSHCD_STATE_OPERATIONAL: The host controller is operational and can process
499  *	SCSI commands.
500  * @UFSHCD_STATE_EH_SCHEDULED_NON_FATAL: The error handler has been scheduled.
501  *	SCSI commands may be submitted to the controller.
502  * @UFSHCD_STATE_EH_SCHEDULED_FATAL: The error handler has been scheduled. Fail
503  *	newly submitted SCSI commands with error code DID_BAD_TARGET.
504  * @UFSHCD_STATE_ERROR: An unrecoverable error occurred, e.g. link recovery
505  *	failed. Fail all SCSI commands with error code DID_ERROR.
506  */
507 enum ufshcd_state {
508 	UFSHCD_STATE_RESET,
509 	UFSHCD_STATE_OPERATIONAL,
510 	UFSHCD_STATE_EH_SCHEDULED_NON_FATAL,
511 	UFSHCD_STATE_EH_SCHEDULED_FATAL,
512 	UFSHCD_STATE_ERROR,
513 };
514 
515 enum ufshcd_quirks {
516 	/* Interrupt aggregation support is broken */
517 	UFSHCD_QUIRK_BROKEN_INTR_AGGR			= 1 << 0,
518 
519 	/*
520 	 * delay before each dme command is required as the unipro
521 	 * layer has shown instabilities
522 	 */
523 	UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS		= 1 << 1,
524 
525 	/*
526 	 * If UFS host controller is having issue in processing LCC (Line
527 	 * Control Command) coming from device then enable this quirk.
528 	 * When this quirk is enabled, host controller driver should disable
529 	 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
530 	 * attribute of device to 0).
531 	 */
532 	UFSHCD_QUIRK_BROKEN_LCC				= 1 << 2,
533 
534 	/*
535 	 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
536 	 * inbound Link supports unterminated line in HS mode. Setting this
537 	 * attribute to 1 fixes moving to HS gear.
538 	 */
539 	UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP		= 1 << 3,
540 
541 	/*
542 	 * This quirk needs to be enabled if the host controller only allows
543 	 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
544 	 * SLOW AUTO).
545 	 */
546 	UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE		= 1 << 4,
547 
548 	/*
549 	 * This quirk needs to be enabled if the host controller doesn't
550 	 * advertise the correct version in UFS_VER register. If this quirk
551 	 * is enabled, standard UFS host driver will call the vendor specific
552 	 * ops (get_ufs_hci_version) to get the correct version.
553 	 */
554 	UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION		= 1 << 5,
555 
556 	/*
557 	 * Clear handling for transfer/task request list is just opposite.
558 	 */
559 	UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR		= 1 << 6,
560 
561 	/*
562 	 * This quirk needs to be enabled if host controller doesn't allow
563 	 * that the interrupt aggregation timer and counter are reset by s/w.
564 	 */
565 	UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR		= 1 << 7,
566 
567 	/*
568 	 * This quirks needs to be enabled if host controller cannot be
569 	 * enabled via HCE register.
570 	 */
571 	UFSHCI_QUIRK_BROKEN_HCE				= 1 << 8,
572 
573 	/*
574 	 * This quirk needs to be enabled if the host controller regards
575 	 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
576 	 */
577 	UFSHCD_QUIRK_PRDT_BYTE_GRAN			= 1 << 9,
578 
579 	/*
580 	 * This quirk needs to be enabled if the host controller reports
581 	 * OCS FATAL ERROR with device error through sense data
582 	 */
583 	UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR		= 1 << 10,
584 
585 	/*
586 	 * This quirk needs to be enabled if the host controller has
587 	 * auto-hibernate capability but it doesn't work.
588 	 */
589 	UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8		= 1 << 11,
590 
591 	/*
592 	 * This quirk needs to disable manual flush for write booster
593 	 */
594 	UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL		= 1 << 12,
595 
596 	/*
597 	 * This quirk needs to disable unipro timeout values
598 	 * before power mode change
599 	 */
600 	UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13,
601 
602 	/*
603 	 * This quirk allows only sg entries aligned with page size.
604 	 */
605 	UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE		= 1 << 14,
606 
607 	/*
608 	 * This quirk needs to be enabled if the host controller does not
609 	 * support UIC command
610 	 */
611 	UFSHCD_QUIRK_BROKEN_UIC_CMD			= 1 << 15,
612 
613 	/*
614 	 * This quirk needs to be enabled if the host controller cannot
615 	 * support physical host configuration.
616 	 */
617 	UFSHCD_QUIRK_SKIP_PH_CONFIGURATION		= 1 << 16,
618 
619 	/*
620 	 * This quirk needs to be enabled if the host controller supports inline
621 	 * encryption, but it needs to initialize the crypto capabilities in a
622 	 * nonstandard way and/or it needs to override blk_ksm_ll_ops.  If
623 	 * enabled, the standard code won't initialize the blk_keyslot_manager;
624 	 * ufs_hba_variant_ops::init() must do it instead.
625 	 */
626 	UFSHCD_QUIRK_CUSTOM_KEYSLOT_MANAGER		= 1 << 20,
627 
628 	/*
629 	 * This quirk needs to be enabled if the host controller supports inline
630 	 * encryption, but the CRYPTO_GENERAL_ENABLE bit is not implemented and
631 	 * breaks the HCE sequence if used.
632 	 */
633 	UFSHCD_QUIRK_BROKEN_CRYPTO_ENABLE		= 1 << 21,
634 
635 	/*
636 	 * This quirk needs to be enabled if the host controller requires that
637 	 * the PRDT be cleared after each encrypted request because encryption
638 	 * keys were stored in it.
639 	 */
640 	UFSHCD_QUIRK_KEYS_IN_PRDT			= 1 << 22,
641 };
642 
643 enum ufshcd_caps {
644 	/* Allow dynamic clk gating */
645 	UFSHCD_CAP_CLK_GATING				= 1 << 0,
646 
647 	/* Allow hiberb8 with clk gating */
648 	UFSHCD_CAP_HIBERN8_WITH_CLK_GATING		= 1 << 1,
649 
650 	/* Allow dynamic clk scaling */
651 	UFSHCD_CAP_CLK_SCALING				= 1 << 2,
652 
653 	/* Allow auto bkops to enabled during runtime suspend */
654 	UFSHCD_CAP_AUTO_BKOPS_SUSPEND			= 1 << 3,
655 
656 	/*
657 	 * This capability allows host controller driver to use the UFS HCI's
658 	 * interrupt aggregation capability.
659 	 * CAUTION: Enabling this might reduce overall UFS throughput.
660 	 */
661 	UFSHCD_CAP_INTR_AGGR				= 1 << 4,
662 
663 	/*
664 	 * This capability allows the device auto-bkops to be always enabled
665 	 * except during suspend (both runtime and suspend).
666 	 * Enabling this capability means that device will always be allowed
667 	 * to do background operation when it's active but it might degrade
668 	 * the performance of ongoing read/write operations.
669 	 */
670 	UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5,
671 
672 	/*
673 	 * This capability allows host controller driver to automatically
674 	 * enable runtime power management by itself instead of waiting
675 	 * for userspace to control the power management.
676 	 */
677 	UFSHCD_CAP_RPM_AUTOSUSPEND			= 1 << 6,
678 
679 	/*
680 	 * This capability allows the host controller driver to turn-on
681 	 * WriteBooster, if the underlying device supports it and is
682 	 * provisioned to be used. This would increase the write performance.
683 	 */
684 	UFSHCD_CAP_WB_EN				= 1 << 7,
685 
686 	/*
687 	 * This capability allows the host controller driver to use the
688 	 * inline crypto engine, if it is present
689 	 */
690 	UFSHCD_CAP_CRYPTO				= 1 << 8,
691 
692 	/*
693 	 * This capability allows the controller regulators to be put into
694 	 * lpm mode aggressively during clock gating.
695 	 * This would increase power savings.
696 	 */
697 	UFSHCD_CAP_AGGR_POWER_COLLAPSE			= 1 << 9,
698 
699 	/*
700 	 * This capability allows the host controller driver to use DeepSleep,
701 	 * if it is supported by the UFS device. The host controller driver must
702 	 * support device hardware reset via the hba->device_reset() callback,
703 	 * in order to exit DeepSleep state.
704 	 */
705 	UFSHCD_CAP_DEEPSLEEP				= 1 << 10,
706 
707 	/*
708 	 * This capability allows the host controller driver to use temperature
709 	 * notification if it is supported by the UFS device.
710 	 */
711 	UFSHCD_CAP_TEMP_NOTIF				= 1 << 11,
712 
713 	/*
714 	 * Enable WriteBooster when scaling up the clock and disable
715 	 * WriteBooster when scaling the clock down.
716 	 */
717 	UFSHCD_CAP_WB_WITH_CLK_SCALING			= 1 << 12,
718 };
719 
720 struct ufs_hba_variant_params {
721 	struct devfreq_dev_profile devfreq_profile;
722 	struct devfreq_simple_ondemand_data ondemand_data;
723 	u16 hba_enable_delay_us;
724 	u32 wb_flush_threshold;
725 };
726 
727 #ifdef CONFIG_SCSI_UFS_HPB
728 /**
729  * struct ufshpb_dev_info - UFSHPB device related info
730  * @num_lu: the number of user logical unit to check whether all lu finished
731  *          initialization
732  * @rgn_size: device reported HPB region size
733  * @srgn_size: device reported HPB sub-region size
734  * @slave_conf_cnt: counter to check all lu finished initialization
735  * @hpb_disabled: flag to check if HPB is disabled
736  * @max_hpb_single_cmd: device reported bMAX_DATA_SIZE_FOR_SINGLE_CMD value
737  * @is_legacy: flag to check HPB 1.0
738  * @control_mode: either host or device
739  */
740 struct ufshpb_dev_info {
741 	int num_lu;
742 	int rgn_size;
743 	int srgn_size;
744 	atomic_t slave_conf_cnt;
745 	bool hpb_disabled;
746 	u8 max_hpb_single_cmd;
747 	bool is_legacy;
748 	u8 control_mode;
749 };
750 #endif
751 
752 struct ufs_hba_monitor {
753 	unsigned long chunk_size;
754 
755 	unsigned long nr_sec_rw[2];
756 	ktime_t total_busy[2];
757 
758 	unsigned long nr_req[2];
759 	/* latencies*/
760 	ktime_t lat_sum[2];
761 	ktime_t lat_max[2];
762 	ktime_t lat_min[2];
763 
764 	u32 nr_queued[2];
765 	ktime_t busy_start_ts[2];
766 
767 	ktime_t enabled_ts;
768 	bool enabled;
769 };
770 
771 /**
772  * struct ufs_hba - per adapter private structure
773  * @mmio_base: UFSHCI base register address
774  * @ucdl_base_addr: UFS Command Descriptor base address
775  * @utrdl_base_addr: UTP Transfer Request Descriptor base address
776  * @utmrdl_base_addr: UTP Task Management Descriptor base address
777  * @ucdl_dma_addr: UFS Command Descriptor DMA address
778  * @utrdl_dma_addr: UTRDL DMA address
779  * @utmrdl_dma_addr: UTMRDL DMA address
780  * @host: Scsi_Host instance of the driver
781  * @dev: device handle
782  * @lrb: local reference block
783  * @cmd_queue: Used to allocate command tags from hba->host->tag_set.
784  * @outstanding_tasks: Bits representing outstanding task requests
785  * @outstanding_lock: Protects @outstanding_reqs.
786  * @outstanding_reqs: Bits representing outstanding transfer requests
787  * @capabilities: UFS Controller Capabilities
788  * @nutrs: Transfer Request Queue depth supported by controller
789  * @nutmrs: Task Management Queue depth supported by controller
790  * @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock.
791  * @ufs_version: UFS Version to which controller complies
792  * @vops: pointer to variant specific operations
793  * @priv: pointer to variant specific private data
794  * @sg_entry_size: size of struct ufshcd_sg_entry (may include variant fields)
795  * @irq: Irq number of the controller
796  * @active_uic_cmd: handle of active UIC command
797  * @uic_cmd_mutex: mutex for UIC command
798  * @tmf_tag_set: TMF tag set.
799  * @tmf_queue: Used to allocate TMF tags.
800  * @pwr_done: completion for power mode change
801  * @ufshcd_state: UFSHCD state
802  * @eh_flags: Error handling flags
803  * @intr_mask: Interrupt Mask Bits
804  * @ee_ctrl_mask: Exception event control mask
805  * @is_powered: flag to check if HBA is powered
806  * @shutting_down: flag to check if shutdown has been invoked
807  * @host_sem: semaphore used to serialize concurrent contexts
808  * @eh_wq: Workqueue that eh_work works on
809  * @eh_work: Worker to handle UFS errors that require s/w attention
810  * @eeh_work: Worker to handle exception events
811  * @errors: HBA errors
812  * @uic_error: UFS interconnect layer error status
813  * @saved_err: sticky error mask
814  * @saved_uic_err: sticky UIC error mask
815  * @force_reset: flag to force eh_work perform a full reset
816  * @force_pmc: flag to force a power mode change
817  * @silence_err_logs: flag to silence error logs
818  * @dev_cmd: ufs device management command information
819  * @last_dme_cmd_tstamp: time stamp of the last completed DME command
820  * @auto_bkops_enabled: to track whether bkops is enabled in device
821  * @vreg_info: UFS device voltage regulator information
822  * @clk_list_head: UFS host controller clocks list node head
823  * @pwr_info: holds current power mode
824  * @max_pwr_info: keeps the device max valid pwm
825  * @desc_size: descriptor sizes reported by device
826  * @urgent_bkops_lvl: keeps track of urgent bkops level for device
827  * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
828  *  device is known or not.
829  * @scsi_block_reqs_cnt: reference counting for scsi block requests
830  * @crypto_capabilities: Content of crypto capabilities register (0x100)
831  * @crypto_cap_array: Array of crypto capabilities
832  * @crypto_cfg_register: Start of the crypto cfg array
833  * @ksm: the keyslot manager tied to this hba
834  */
835 struct ufs_hba {
836 	void __iomem *mmio_base;
837 
838 	/* Virtual memory reference */
839 	struct utp_transfer_cmd_desc *ucdl_base_addr;
840 	struct utp_transfer_req_desc *utrdl_base_addr;
841 	struct utp_task_req_desc *utmrdl_base_addr;
842 
843 	/* DMA memory reference */
844 	dma_addr_t ucdl_dma_addr;
845 	dma_addr_t utrdl_dma_addr;
846 	dma_addr_t utmrdl_dma_addr;
847 
848 	struct Scsi_Host *host;
849 	struct device *dev;
850 	struct request_queue *cmd_queue;
851 	/*
852 	 * This field is to keep a reference to "scsi_device" corresponding to
853 	 * "UFS device" W-LU.
854 	 */
855 	struct scsi_device *sdev_ufs_device;
856 	struct scsi_device *sdev_rpmb;
857 
858 #ifdef CONFIG_SCSI_UFS_HWMON
859 	struct device *hwmon_device;
860 #endif
861 
862 	enum ufs_dev_pwr_mode curr_dev_pwr_mode;
863 	enum uic_link_state uic_link_state;
864 	/* Desired UFS power management level during runtime PM */
865 	enum ufs_pm_level rpm_lvl;
866 	/* Desired UFS power management level during system PM */
867 	enum ufs_pm_level spm_lvl;
868 	struct device_attribute rpm_lvl_attr;
869 	struct device_attribute spm_lvl_attr;
870 	int pm_op_in_progress;
871 
872 	/* Auto-Hibernate Idle Timer register value */
873 	u32 ahit;
874 
875 	struct ufshcd_lrb *lrb;
876 
877 	unsigned long outstanding_tasks;
878 	spinlock_t outstanding_lock;
879 	unsigned long outstanding_reqs;
880 
881 	u32 capabilities;
882 	int nutrs;
883 	int nutmrs;
884 	u32 reserved_slot;
885 	u32 ufs_version;
886 	const struct ufs_hba_variant_ops *vops;
887 	struct ufs_hba_variant_params *vps;
888 	void *priv;
889 	size_t sg_entry_size;
890 	unsigned int irq;
891 	bool is_irq_enabled;
892 	enum ufs_ref_clk_freq dev_ref_clk_freq;
893 
894 	unsigned int quirks;	/* Deviations from standard UFSHCI spec. */
895 
896 	/* Device deviations from standard UFS device spec. */
897 	unsigned int dev_quirks;
898 
899 	struct blk_mq_tag_set tmf_tag_set;
900 	struct request_queue *tmf_queue;
901 	struct request **tmf_rqs;
902 
903 	struct uic_command *active_uic_cmd;
904 	struct mutex uic_cmd_mutex;
905 	struct completion *uic_async_done;
906 
907 	enum ufshcd_state ufshcd_state;
908 	u32 eh_flags;
909 	u32 intr_mask;
910 	u16 ee_ctrl_mask; /* Exception event mask */
911 	u16 ee_drv_mask;  /* Exception event mask for driver */
912 	u16 ee_usr_mask;  /* Exception event mask for user (via debugfs) */
913 	struct mutex ee_ctrl_mutex;
914 	bool is_powered;
915 	bool shutting_down;
916 	struct semaphore host_sem;
917 
918 	/* Work Queues */
919 	struct workqueue_struct *eh_wq;
920 	struct work_struct eh_work;
921 	struct work_struct eeh_work;
922 
923 	/* HBA Errors */
924 	u32 errors;
925 	u32 uic_error;
926 	u32 saved_err;
927 	u32 saved_uic_err;
928 	struct ufs_stats ufs_stats;
929 	bool force_reset;
930 	bool force_pmc;
931 	bool silence_err_logs;
932 
933 	/* Device management request data */
934 	struct ufs_dev_cmd dev_cmd;
935 	ktime_t last_dme_cmd_tstamp;
936 	int nop_out_timeout;
937 
938 	/* Keeps information of the UFS device connected to this host */
939 	struct ufs_dev_info dev_info;
940 	bool auto_bkops_enabled;
941 	struct ufs_vreg_info vreg_info;
942 	struct list_head clk_list_head;
943 
944 	/* Number of requests aborts */
945 	int req_abort_count;
946 
947 	/* Number of lanes available (1 or 2) for Rx/Tx */
948 	u32 lanes_per_direction;
949 	struct ufs_pa_layer_attr pwr_info;
950 	struct ufs_pwr_mode_info max_pwr_info;
951 
952 	struct ufs_clk_gating clk_gating;
953 	/* Control to enable/disable host capabilities */
954 	u32 caps;
955 
956 	struct devfreq *devfreq;
957 	struct ufs_clk_scaling clk_scaling;
958 	bool is_sys_suspended;
959 
960 	enum bkops_status urgent_bkops_lvl;
961 	bool is_urgent_bkops_lvl_checked;
962 
963 	struct rw_semaphore clk_scaling_lock;
964 	unsigned char desc_size[QUERY_DESC_IDN_MAX];
965 	atomic_t scsi_block_reqs_cnt;
966 
967 	struct device		bsg_dev;
968 	struct request_queue	*bsg_queue;
969 	struct delayed_work rpm_dev_flush_recheck_work;
970 
971 #ifdef CONFIG_SCSI_UFS_HPB
972 	struct ufshpb_dev_info ufshpb_dev;
973 #endif
974 
975 	struct ufs_hba_monitor	monitor;
976 
977 #ifdef CONFIG_SCSI_UFS_CRYPTO
978 	union ufs_crypto_capabilities crypto_capabilities;
979 	union ufs_crypto_cap_entry *crypto_cap_array;
980 	u32 crypto_cfg_register;
981 	struct blk_keyslot_manager ksm;
982 #endif
983 #ifdef CONFIG_DEBUG_FS
984 	struct dentry *debugfs_root;
985 	struct delayed_work debugfs_ee_work;
986 	u32 debugfs_ee_rate_limit_ms;
987 #endif
988 	u32 luns_avail;
989 	bool complete_put;
990 
991 	ANDROID_VENDOR_DATA(1);
992 	ANDROID_OEM_DATA_ARRAY(1, 2);
993 
994 	ANDROID_KABI_RESERVE(1);
995 	ANDROID_KABI_RESERVE(2);
996 	ANDROID_KABI_RESERVE(3);
997 	ANDROID_KABI_RESERVE(4);
998 };
999 
1000 /* Returns true if clocks can be gated. Otherwise false */
ufshcd_is_clkgating_allowed(struct ufs_hba * hba)1001 static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
1002 {
1003 	return hba->caps & UFSHCD_CAP_CLK_GATING;
1004 }
ufshcd_can_hibern8_during_gating(struct ufs_hba * hba)1005 static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
1006 {
1007 	return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
1008 }
ufshcd_is_clkscaling_supported(struct ufs_hba * hba)1009 static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
1010 {
1011 	return hba->caps & UFSHCD_CAP_CLK_SCALING;
1012 }
ufshcd_can_autobkops_during_suspend(struct ufs_hba * hba)1013 static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
1014 {
1015 	return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
1016 }
ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba * hba)1017 static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba)
1018 {
1019 	return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND;
1020 }
1021 
ufshcd_is_intr_aggr_allowed(struct ufs_hba * hba)1022 static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
1023 {
1024 	return (hba->caps & UFSHCD_CAP_INTR_AGGR) &&
1025 		!(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR);
1026 }
1027 
ufshcd_can_aggressive_pc(struct ufs_hba * hba)1028 static inline bool ufshcd_can_aggressive_pc(struct ufs_hba *hba)
1029 {
1030 	return !!(ufshcd_is_link_hibern8(hba) &&
1031 		  (hba->caps & UFSHCD_CAP_AGGR_POWER_COLLAPSE));
1032 }
1033 
ufshcd_is_auto_hibern8_supported(struct ufs_hba * hba)1034 static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba)
1035 {
1036 	return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) &&
1037 		!(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8);
1038 }
1039 
ufshcd_is_auto_hibern8_enabled(struct ufs_hba * hba)1040 static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba)
1041 {
1042 	return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit) ? true : false;
1043 }
1044 
ufshcd_is_wb_allowed(struct ufs_hba * hba)1045 static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba)
1046 {
1047 	return hba->caps & UFSHCD_CAP_WB_EN;
1048 }
1049 
ufshcd_is_user_access_allowed(struct ufs_hba * hba)1050 static inline bool ufshcd_is_user_access_allowed(struct ufs_hba *hba)
1051 {
1052 	return !hba->shutting_down;
1053 }
1054 
ufshcd_enable_wb_if_scaling_up(struct ufs_hba * hba)1055 static inline bool ufshcd_enable_wb_if_scaling_up(struct ufs_hba *hba)
1056 {
1057 	return hba->caps & UFSHCD_CAP_WB_WITH_CLK_SCALING;
1058 }
1059 
1060 #define ufshcd_writel(hba, val, reg)	\
1061 	writel((val), (hba)->mmio_base + (reg))
1062 #define ufshcd_readl(hba, reg)	\
1063 	readl((hba)->mmio_base + (reg))
1064 
1065 /**
1066  * ufshcd_rmwl - read modify write into a register
1067  * @hba - per adapter instance
1068  * @mask - mask to apply on read value
1069  * @val - actual value to write
1070  * @reg - register address
1071  */
ufshcd_rmwl(struct ufs_hba * hba,u32 mask,u32 val,u32 reg)1072 static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
1073 {
1074 	u32 tmp;
1075 
1076 	tmp = ufshcd_readl(hba, reg);
1077 	tmp &= ~mask;
1078 	tmp |= (val & mask);
1079 	ufshcd_writel(hba, tmp, reg);
1080 }
1081 
1082 int ufshcd_alloc_host(struct device *, struct ufs_hba **);
1083 void ufshcd_dealloc_host(struct ufs_hba *);
1084 int ufshcd_hba_enable(struct ufs_hba *hba);
1085 int ufshcd_init(struct ufs_hba *, void __iomem *, unsigned int);
1086 int ufshcd_link_recovery(struct ufs_hba *hba);
1087 int ufshcd_make_hba_operational(struct ufs_hba *hba);
1088 void ufshcd_remove(struct ufs_hba *);
1089 int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
1090 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
1091 void ufshcd_delay_us(unsigned long us, unsigned long tolerance);
1092 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
1093 				u32 val, unsigned long interval_us,
1094 				unsigned long timeout_ms);
1095 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
1096 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val);
1097 void ufshcd_hba_stop(struct ufs_hba *hba);
1098 
check_upiu_size(void)1099 static inline void check_upiu_size(void)
1100 {
1101 	BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
1102 		GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
1103 }
1104 
1105 /**
1106  * ufshcd_set_variant - set variant specific data to the hba
1107  * @hba - per adapter instance
1108  * @variant - pointer to variant specific data
1109  */
ufshcd_set_variant(struct ufs_hba * hba,void * variant)1110 static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
1111 {
1112 	BUG_ON(!hba);
1113 	hba->priv = variant;
1114 }
1115 
1116 /**
1117  * ufshcd_get_variant - get variant specific data from the hba
1118  * @hba - per adapter instance
1119  */
ufshcd_get_variant(struct ufs_hba * hba)1120 static inline void *ufshcd_get_variant(struct ufs_hba *hba)
1121 {
1122 	BUG_ON(!hba);
1123 	return hba->priv;
1124 }
ufshcd_keep_autobkops_enabled_except_suspend(struct ufs_hba * hba)1125 static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
1126 							struct ufs_hba *hba)
1127 {
1128 	return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
1129 }
1130 
ufshcd_wb_get_query_index(struct ufs_hba * hba)1131 static inline u8 ufshcd_wb_get_query_index(struct ufs_hba *hba)
1132 {
1133 	if (hba->dev_info.wb_buffer_type == WB_BUF_MODE_LU_DEDICATED)
1134 		return hba->dev_info.wb_dedicated_lu;
1135 	return 0;
1136 }
1137 
1138 #ifdef CONFIG_SCSI_UFS_HWMON
1139 void ufs_hwmon_probe(struct ufs_hba *hba, u8 mask);
1140 void ufs_hwmon_remove(struct ufs_hba *hba);
1141 #else
ufs_hwmon_probe(struct ufs_hba * hba,u8 mask)1142 static inline void ufs_hwmon_probe(struct ufs_hba *hba, u8 mask) {}
ufs_hwmon_remove(struct ufs_hba * hba)1143 static inline void ufs_hwmon_remove(struct ufs_hba *hba) {}
1144 #endif
1145 
1146 #ifdef CONFIG_PM
1147 extern int ufshcd_runtime_suspend(struct device *dev);
1148 extern int ufshcd_runtime_resume(struct device *dev);
1149 #endif
1150 #ifdef CONFIG_PM_SLEEP
1151 extern int ufshcd_system_suspend(struct device *dev);
1152 extern int ufshcd_system_resume(struct device *dev);
1153 extern int ufshcd_system_freeze(struct device *dev);
1154 extern int ufshcd_system_thaw(struct device *dev);
1155 extern int ufshcd_system_restore(struct device *dev);
1156 #endif
1157 extern int ufshcd_shutdown(struct ufs_hba *hba);
1158 
1159 extern int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
1160 				      int agreed_gear,
1161 				      int adapt_val);
1162 extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
1163 			       u8 attr_set, u32 mib_val, u8 peer);
1164 extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
1165 			       u32 *mib_val, u8 peer);
1166 extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
1167 			struct ufs_pa_layer_attr *desired_pwr_mode);
1168 extern int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode);
1169 
1170 /* UIC command interfaces for DME primitives */
1171 #define DME_LOCAL	0
1172 #define DME_PEER	1
1173 #define ATTR_SET_NOR	0	/* NORMAL */
1174 #define ATTR_SET_ST	1	/* STATIC */
1175 
ufshcd_dme_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1176 static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
1177 				 u32 mib_val)
1178 {
1179 	return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
1180 				   mib_val, DME_LOCAL);
1181 }
1182 
ufshcd_dme_st_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1183 static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
1184 				    u32 mib_val)
1185 {
1186 	return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
1187 				   mib_val, DME_LOCAL);
1188 }
1189 
ufshcd_dme_peer_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1190 static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
1191 				      u32 mib_val)
1192 {
1193 	return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
1194 				   mib_val, DME_PEER);
1195 }
1196 
ufshcd_dme_peer_st_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1197 static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
1198 					 u32 mib_val)
1199 {
1200 	return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
1201 				   mib_val, DME_PEER);
1202 }
1203 
ufshcd_dme_get(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val)1204 static inline int ufshcd_dme_get(struct ufs_hba *hba,
1205 				 u32 attr_sel, u32 *mib_val)
1206 {
1207 	return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
1208 }
1209 
ufshcd_dme_peer_get(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val)1210 static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
1211 				      u32 attr_sel, u32 *mib_val)
1212 {
1213 	return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
1214 }
1215 
ufshcd_is_hs_mode(struct ufs_pa_layer_attr * pwr_info)1216 static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
1217 {
1218 	return (pwr_info->pwr_rx == FAST_MODE ||
1219 		pwr_info->pwr_rx == FASTAUTO_MODE) &&
1220 		(pwr_info->pwr_tx == FAST_MODE ||
1221 		pwr_info->pwr_tx == FASTAUTO_MODE);
1222 }
1223 
ufshcd_disable_host_tx_lcc(struct ufs_hba * hba)1224 static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
1225 {
1226 	return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
1227 }
1228 
1229 /* Expose Query-Request API */
1230 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
1231 				  enum query_opcode opcode,
1232 				  enum desc_idn idn, u8 index,
1233 				  u8 selector,
1234 				  u8 *desc_buf, int *buf_len);
1235 int ufshcd_read_desc_param(struct ufs_hba *hba,
1236 			   enum desc_idn desc_id,
1237 			   int desc_index,
1238 			   u8 param_offset,
1239 			   u8 *param_read_buf,
1240 			   u8 param_size);
1241 int ufshcd_query_attr_retry(struct ufs_hba *hba, enum query_opcode opcode,
1242 			    enum attr_idn idn, u8 index, u8 selector,
1243 			    u32 *attr_val);
1244 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
1245 		      enum attr_idn idn, u8 index, u8 selector, u32 *attr_val);
1246 int ufshcd_query_attr_retry(struct ufs_hba *hba,
1247 	enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
1248 	u32 *attr_val);
1249 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
1250 	enum flag_idn idn, u8 index, bool *flag_res);
1251 int ufshcd_query_flag_retry(struct ufs_hba *hba,
1252 	enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res);
1253 int ufshcd_bkops_ctrl(struct ufs_hba *hba, enum bkops_status status);
1254 
1255 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba);
1256 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
1257 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups);
1258 #define SD_ASCII_STD true
1259 #define SD_RAW false
1260 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
1261 			    u8 **buf, bool ascii);
1262 
1263 int ufshcd_hold(struct ufs_hba *hba, bool async);
1264 void ufshcd_release(struct ufs_hba *hba);
1265 
1266 void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
1267 				  int *desc_length);
1268 
1269 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
1270 int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg);
1271 
1272 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd);
1273 
1274 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
1275 			     struct utp_upiu_req *req_upiu,
1276 			     struct utp_upiu_req *rsp_upiu,
1277 			     int msgcode,
1278 			     u8 *desc_buff, int *buff_len,
1279 			     enum query_opcode desc_op);
1280 
1281 int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable);
1282 int ufshcd_suspend_prepare(struct device *dev);
1283 void ufshcd_resume_complete(struct device *dev);
1284 
1285 /* Wrapper functions for safely calling variant operations */
ufshcd_get_var_name(struct ufs_hba * hba)1286 static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
1287 {
1288 	if (hba->vops)
1289 		return hba->vops->name;
1290 	return "";
1291 }
1292 
ufshcd_vops_init(struct ufs_hba * hba)1293 static inline int ufshcd_vops_init(struct ufs_hba *hba)
1294 {
1295 	if (hba->vops && hba->vops->init)
1296 		return hba->vops->init(hba);
1297 
1298 	return 0;
1299 }
1300 
ufshcd_vops_exit(struct ufs_hba * hba)1301 static inline void ufshcd_vops_exit(struct ufs_hba *hba)
1302 {
1303 	if (hba->vops && hba->vops->exit)
1304 		return hba->vops->exit(hba);
1305 }
1306 
ufshcd_vops_get_ufs_hci_version(struct ufs_hba * hba)1307 static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
1308 {
1309 	if (hba->vops && hba->vops->get_ufs_hci_version)
1310 		return hba->vops->get_ufs_hci_version(hba);
1311 
1312 	return ufshcd_readl(hba, REG_UFS_VERSION);
1313 }
1314 
ufshcd_vops_clk_scale_notify(struct ufs_hba * hba,bool up,enum ufs_notify_change_status status)1315 static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
1316 			bool up, enum ufs_notify_change_status status)
1317 {
1318 	if (hba->vops && hba->vops->clk_scale_notify)
1319 		return hba->vops->clk_scale_notify(hba, up, status);
1320 	return 0;
1321 }
1322 
ufshcd_vops_event_notify(struct ufs_hba * hba,enum ufs_event_type evt,void * data)1323 static inline void ufshcd_vops_event_notify(struct ufs_hba *hba,
1324 					    enum ufs_event_type evt,
1325 					    void *data)
1326 {
1327 	if (hba->vops && hba->vops->event_notify)
1328 		hba->vops->event_notify(hba, evt, data);
1329 }
1330 
ufshcd_vops_setup_clocks(struct ufs_hba * hba,bool on,enum ufs_notify_change_status status)1331 static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
1332 					enum ufs_notify_change_status status)
1333 {
1334 	if (hba->vops && hba->vops->setup_clocks)
1335 		return hba->vops->setup_clocks(hba, on, status);
1336 	return 0;
1337 }
1338 
ufshcd_vops_hce_enable_notify(struct ufs_hba * hba,bool status)1339 static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
1340 						bool status)
1341 {
1342 	if (hba->vops && hba->vops->hce_enable_notify)
1343 		return hba->vops->hce_enable_notify(hba, status);
1344 
1345 	return 0;
1346 }
ufshcd_vops_link_startup_notify(struct ufs_hba * hba,bool status)1347 static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
1348 						bool status)
1349 {
1350 	if (hba->vops && hba->vops->link_startup_notify)
1351 		return hba->vops->link_startup_notify(hba, status);
1352 
1353 	return 0;
1354 }
1355 
ufshcd_vops_phy_initialization(struct ufs_hba * hba)1356 static inline int ufshcd_vops_phy_initialization(struct ufs_hba *hba)
1357 {
1358 	if (hba->vops && hba->vops->phy_initialization)
1359 		return hba->vops->phy_initialization(hba);
1360 
1361 	return 0;
1362 }
1363 
ufshcd_vops_pwr_change_notify(struct ufs_hba * hba,enum ufs_notify_change_status status,struct ufs_pa_layer_attr * dev_max_params,struct ufs_pa_layer_attr * dev_req_params)1364 static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
1365 				  enum ufs_notify_change_status status,
1366 				  struct ufs_pa_layer_attr *dev_max_params,
1367 				  struct ufs_pa_layer_attr *dev_req_params)
1368 {
1369 	if (hba->vops && hba->vops->pwr_change_notify)
1370 		return hba->vops->pwr_change_notify(hba, status,
1371 					dev_max_params, dev_req_params);
1372 
1373 	return -ENOTSUPP;
1374 }
1375 
ufshcd_vops_setup_task_mgmt(struct ufs_hba * hba,int tag,u8 tm_function)1376 static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
1377 					int tag, u8 tm_function)
1378 {
1379 	if (hba->vops && hba->vops->setup_task_mgmt)
1380 		return hba->vops->setup_task_mgmt(hba, tag, tm_function);
1381 }
1382 
ufshcd_vops_hibern8_notify(struct ufs_hba * hba,enum uic_cmd_dme cmd,enum ufs_notify_change_status status)1383 static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
1384 					enum uic_cmd_dme cmd,
1385 					enum ufs_notify_change_status status)
1386 {
1387 	if (hba->vops && hba->vops->hibern8_notify)
1388 		return hba->vops->hibern8_notify(hba, cmd, status);
1389 }
1390 
ufshcd_vops_apply_dev_quirks(struct ufs_hba * hba)1391 static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
1392 {
1393 	if (hba->vops && hba->vops->apply_dev_quirks)
1394 		return hba->vops->apply_dev_quirks(hba);
1395 	return 0;
1396 }
1397 
ufshcd_vops_fixup_dev_quirks(struct ufs_hba * hba)1398 static inline void ufshcd_vops_fixup_dev_quirks(struct ufs_hba *hba)
1399 {
1400 	if (hba->vops && hba->vops->fixup_dev_quirks)
1401 		hba->vops->fixup_dev_quirks(hba);
1402 }
1403 
ufshcd_vops_suspend(struct ufs_hba * hba,enum ufs_pm_op op,enum ufs_notify_change_status status)1404 static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op,
1405 				enum ufs_notify_change_status status)
1406 {
1407 	if (hba->vops && hba->vops->suspend)
1408 		return hba->vops->suspend(hba, op, status);
1409 
1410 	return 0;
1411 }
1412 
ufshcd_vops_resume(struct ufs_hba * hba,enum ufs_pm_op op)1413 static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
1414 {
1415 	if (hba->vops && hba->vops->resume)
1416 		return hba->vops->resume(hba, op);
1417 
1418 	return 0;
1419 }
1420 
ufshcd_vops_dbg_register_dump(struct ufs_hba * hba)1421 static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
1422 {
1423 	if (hba->vops && hba->vops->dbg_register_dump)
1424 		hba->vops->dbg_register_dump(hba);
1425 }
1426 
ufshcd_vops_device_reset(struct ufs_hba * hba)1427 static inline int ufshcd_vops_device_reset(struct ufs_hba *hba)
1428 {
1429 	if (hba->vops && hba->vops->device_reset)
1430 		return hba->vops->device_reset(hba);
1431 
1432 	return -EOPNOTSUPP;
1433 }
1434 
ufshcd_vops_config_scaling_param(struct ufs_hba * hba,struct devfreq_dev_profile * profile,void * data)1435 static inline void ufshcd_vops_config_scaling_param(struct ufs_hba *hba,
1436 						    struct devfreq_dev_profile
1437 						    *profile, void *data)
1438 {
1439 	if (hba->vops && hba->vops->config_scaling_param)
1440 		hba->vops->config_scaling_param(hba, profile, data);
1441 }
1442 
1443 extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
1444 
1445 /*
1446  * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1447  * @scsi_lun: scsi LUN id
1448  *
1449  * Returns UPIU LUN id
1450  */
ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)1451 static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1452 {
1453 	if (scsi_is_wlun(scsi_lun))
1454 		return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1455 			| UFS_UPIU_WLUN_ID;
1456 	else
1457 		return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1458 }
1459 
1460 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
1461 		     const char *prefix);
1462 
1463 int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask);
1464 int ufshcd_write_ee_control(struct ufs_hba *hba);
1465 int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, u16 *other_mask,
1466 			     u16 set, u16 clr);
1467 
ufshcd_update_ee_drv_mask(struct ufs_hba * hba,u16 set,u16 clr)1468 static inline int ufshcd_update_ee_drv_mask(struct ufs_hba *hba,
1469 					    u16 set, u16 clr)
1470 {
1471 	return ufshcd_update_ee_control(hba, &hba->ee_drv_mask,
1472 					&hba->ee_usr_mask, set, clr);
1473 }
1474 
ufshcd_update_ee_usr_mask(struct ufs_hba * hba,u16 set,u16 clr)1475 static inline int ufshcd_update_ee_usr_mask(struct ufs_hba *hba,
1476 					    u16 set, u16 clr)
1477 {
1478 	return ufshcd_update_ee_control(hba, &hba->ee_usr_mask,
1479 					&hba->ee_drv_mask, set, clr);
1480 }
1481 
ufshcd_rpm_get_sync(struct ufs_hba * hba)1482 static inline int ufshcd_rpm_get_sync(struct ufs_hba *hba)
1483 {
1484 	return pm_runtime_get_sync(&hba->sdev_ufs_device->sdev_gendev);
1485 }
1486 
ufshcd_rpm_put_sync(struct ufs_hba * hba)1487 static inline int ufshcd_rpm_put_sync(struct ufs_hba *hba)
1488 {
1489 	return pm_runtime_put_sync(&hba->sdev_ufs_device->sdev_gendev);
1490 }
1491 
ufshcd_rpm_put(struct ufs_hba * hba)1492 static inline int ufshcd_rpm_put(struct ufs_hba *hba)
1493 {
1494 	return pm_runtime_put(&hba->sdev_ufs_device->sdev_gendev);
1495 }
1496 
1497 int ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp);
1498 void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba);
1499 void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba);
1500 void ufshcd_add_command_trace(struct ufs_hba *hba, unsigned int tag,
1501 				     enum ufs_trace_str_t str_t);
1502 
1503 #endif /* End of Header */
1504