1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct dc_stream_status { 42 int primary_otg_inst; 43 int stream_enc_inst; 44 int plane_count; 45 int audio_inst; 46 struct timing_sync_info timing_sync_info; 47 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 48 bool is_abm_supported; 49 }; 50 51 // TODO: References to this needs to be removed.. 52 struct freesync_context { 53 bool dummy; 54 }; 55 56 enum hubp_dmdata_mode { 57 DMDATA_SW_MODE, 58 DMDATA_HW_MODE 59 }; 60 61 struct dc_dmdata_attributes { 62 /* Specifies whether dynamic meta data will be updated by software 63 * or has to be fetched by hardware (DMA mode) 64 */ 65 enum hubp_dmdata_mode dmdata_mode; 66 /* Specifies if current dynamic meta data is to be used only for the current frame */ 67 bool dmdata_repeat; 68 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 69 uint32_t dmdata_size; 70 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 71 bool dmdata_updated; 72 /* If hardware mode is used, the base address where DMDATA surface is located */ 73 PHYSICAL_ADDRESS_LOC address; 74 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 75 bool dmdata_qos_mode; 76 /* If qos_mode = 1, this is the QOS value to be used: */ 77 uint32_t dmdata_qos_level; 78 /* Specifies the value in unit of REFCLK cycles to be added to the 79 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 80 */ 81 uint32_t dmdata_dl_delta; 82 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 83 uint32_t *dmdata_sw_data; 84 }; 85 86 struct dc_writeback_info { 87 bool wb_enabled; 88 int dwb_pipe_inst; 89 struct dc_dwb_params dwb_params; 90 struct mcif_buf_params mcif_buf_params; 91 struct mcif_warmup_params mcif_warmup_params; 92 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 93 struct dc_plane_state *writeback_source_plane; 94 /* source MPCC instance. for use by internally by dc */ 95 int mpcc_inst; 96 }; 97 98 struct dc_writeback_update { 99 unsigned int num_wb_info; 100 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 101 }; 102 103 enum vertical_interrupt_ref_point { 104 START_V_UPDATE = 0, 105 START_V_SYNC, 106 INVALID_POINT 107 108 //For now, only v_update interrupt is used. 109 //START_V_BLANK, 110 //START_V_ACTIVE 111 }; 112 113 struct periodic_interrupt_config { 114 enum vertical_interrupt_ref_point ref_point; 115 int lines_offset; 116 }; 117 118 union stream_update_flags { 119 struct { 120 uint32_t scaling:1; 121 uint32_t out_tf:1; 122 uint32_t out_csc:1; 123 uint32_t abm_level:1; 124 uint32_t dpms_off:1; 125 uint32_t gamut_remap:1; 126 uint32_t wb_update:1; 127 uint32_t dsc_changed : 1; 128 } bits; 129 130 uint32_t raw; 131 }; 132 133 struct test_pattern { 134 enum dp_test_pattern type; 135 enum dp_test_pattern_color_space color_space; 136 struct link_training_settings const *p_link_settings; 137 unsigned char const *p_custom_pattern; 138 unsigned int cust_pattern_size; 139 }; 140 141 struct dc_stream_state { 142 // sink is deprecated, new code should not reference 143 // this pointer 144 struct dc_sink *sink; 145 146 struct dc_link *link; 147 /* For dynamic link encoder assignment, update the link encoder assigned to 148 * a stream via the volatile dc_state rather than the static dc_link. 149 */ 150 struct link_encoder *link_enc; 151 struct dc_panel_patch sink_patches; 152 union display_content_support content_support; 153 struct dc_crtc_timing timing; 154 struct dc_crtc_timing_adjust adjust; 155 struct dc_info_packet vrr_infopacket; 156 struct dc_info_packet vsc_infopacket; 157 struct dc_info_packet vsp_infopacket; 158 159 struct rect src; /* composition area */ 160 struct rect dst; /* stream addressable area */ 161 162 // TODO: References to this needs to be removed.. 163 struct freesync_context freesync_ctx; 164 165 struct audio_info audio_info; 166 167 struct dc_info_packet hdr_static_metadata; 168 PHYSICAL_ADDRESS_LOC dmdata_address; 169 bool use_dynamic_meta; 170 171 struct dc_transfer_func *out_transfer_func; 172 struct colorspace_transform gamut_remap_matrix; 173 struct dc_csc_transform csc_color_matrix; 174 175 enum dc_color_space output_color_space; 176 enum dc_dither_option dither_option; 177 178 enum view_3d_format view_format; 179 180 bool use_vsc_sdp_for_colorimetry; 181 bool ignore_msa_timing_param; 182 183 bool freesync_on_desktop; 184 185 bool converter_disable_audio; 186 uint8_t qs_bit; 187 uint8_t qy_bit; 188 189 /* TODO: custom INFO packets */ 190 /* TODO: ABM info (DMCU) */ 191 /* TODO: CEA VIC */ 192 193 /* DMCU info */ 194 unsigned int abm_level; 195 196 struct periodic_interrupt_config periodic_interrupt; 197 198 /* from core_stream struct */ 199 struct dc_context *ctx; 200 201 /* used by DCP and FMT */ 202 struct bit_depth_reduction_params bit_depth_params; 203 struct clamping_and_pixel_encoding_params clamping; 204 205 int phy_pix_clk; 206 enum signal_type signal; 207 bool dpms_off; 208 209 void *dm_stream_context; 210 211 struct dc_cursor_attributes cursor_attributes; 212 struct dc_cursor_position cursor_position; 213 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 214 215 /* from stream struct */ 216 struct kref refcount; 217 218 struct crtc_trigger_info triggered_crtc_reset; 219 220 /* writeback */ 221 unsigned int num_wb_info; 222 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 223 const struct dc_transfer_func *func_shaper; 224 const struct dc_3dlut *lut3d_func; 225 /* Computed state bits */ 226 bool mode_changed : 1; 227 228 /* Output from DC when stream state is committed or altered 229 * DC may only access these values during: 230 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 231 * values may not change outside of those calls 232 */ 233 struct { 234 // For interrupt management, some hardware instance 235 // offsets need to be exposed to DM 236 uint8_t otg_offset; 237 } out; 238 239 bool apply_edp_fast_boot_optimization; 240 bool apply_seamless_boot_optimization; 241 242 uint32_t stream_id; 243 244 struct test_pattern test_pattern; 245 union stream_update_flags update_flags; 246 247 bool has_non_synchronizable_pclk; 248 bool vblank_synchronized; 249 }; 250 251 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 252 253 struct dc_stream_update { 254 struct dc_stream_state *stream; 255 256 struct rect src; 257 struct rect dst; 258 struct dc_transfer_func *out_transfer_func; 259 struct dc_info_packet *hdr_static_metadata; 260 unsigned int *abm_level; 261 262 struct periodic_interrupt_config *periodic_interrupt; 263 264 struct dc_info_packet *vrr_infopacket; 265 struct dc_info_packet *vsc_infopacket; 266 struct dc_info_packet *vsp_infopacket; 267 268 bool *dpms_off; 269 bool integer_scaling_update; 270 271 struct colorspace_transform *gamut_remap; 272 enum dc_color_space *output_color_space; 273 enum dc_dither_option *dither_option; 274 275 struct dc_csc_transform *output_csc_transform; 276 277 struct dc_writeback_update *wb_update; 278 struct dc_dsc_config *dsc_config; 279 struct dc_transfer_func *func_shaper; 280 struct dc_3dlut *lut3d_func; 281 282 struct test_pattern *pending_test_pattern; 283 }; 284 285 bool dc_is_stream_unchanged( 286 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 287 bool dc_is_stream_scaling_unchanged( 288 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 289 290 /* 291 * Setup stream attributes if no stream updates are provided 292 * there will be no impact on the stream parameters 293 * 294 * Set up surface attributes and associate to a stream 295 * The surfaces parameter is an absolute set of all surface active for the stream. 296 * If no surfaces are provided, the stream will be blanked; no memory read. 297 * Any flip related attribute changes must be done through this interface. 298 * 299 * After this call: 300 * Surfaces attributes are programmed and configured to be composed into stream. 301 * This does not trigger a flip. No surface address is programmed. 302 * 303 */ 304 bool dc_update_planes_and_stream(struct dc *dc, 305 struct dc_surface_update *surface_updates, int surface_count, 306 struct dc_stream_state *dc_stream, 307 struct dc_stream_update *stream_update); 308 309 /* 310 * Set up surface attributes and associate to a stream 311 * The surfaces parameter is an absolute set of all surface active for the stream. 312 * If no surfaces are provided, the stream will be blanked; no memory read. 313 * Any flip related attribute changes must be done through this interface. 314 * 315 * After this call: 316 * Surfaces attributes are programmed and configured to be composed into stream. 317 * This does not trigger a flip. No surface address is programmed. 318 */ 319 void dc_commit_updates_for_stream(struct dc *dc, 320 struct dc_surface_update *srf_updates, 321 int surface_count, 322 struct dc_stream_state *stream, 323 struct dc_stream_update *stream_update, 324 struct dc_state *state); 325 /* 326 * Log the current stream state. 327 */ 328 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 329 330 uint8_t dc_get_current_stream_count(struct dc *dc); 331 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 332 struct dc_stream_state *dc_stream_find_from_link(const struct dc_link *link); 333 334 /* 335 * Return the current frame counter. 336 */ 337 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 338 339 /* 340 * Send dp sdp message. 341 */ 342 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 343 const uint8_t *custom_sdp_message, 344 unsigned int sdp_message_size); 345 346 /* TODO: Return parsed values rather than direct register read 347 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 348 * being refactored properly to be dce-specific 349 */ 350 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 351 uint32_t *v_blank_start, 352 uint32_t *v_blank_end, 353 uint32_t *h_position, 354 uint32_t *v_position); 355 356 enum dc_status dc_add_stream_to_ctx( 357 struct dc *dc, 358 struct dc_state *new_ctx, 359 struct dc_stream_state *stream); 360 361 enum dc_status dc_remove_stream_from_ctx( 362 struct dc *dc, 363 struct dc_state *new_ctx, 364 struct dc_stream_state *stream); 365 366 367 bool dc_add_plane_to_context( 368 const struct dc *dc, 369 struct dc_stream_state *stream, 370 struct dc_plane_state *plane_state, 371 struct dc_state *context); 372 373 bool dc_remove_plane_from_context( 374 const struct dc *dc, 375 struct dc_stream_state *stream, 376 struct dc_plane_state *plane_state, 377 struct dc_state *context); 378 379 bool dc_rem_all_planes_for_stream( 380 const struct dc *dc, 381 struct dc_stream_state *stream, 382 struct dc_state *context); 383 384 bool dc_add_all_planes_for_stream( 385 const struct dc *dc, 386 struct dc_stream_state *stream, 387 struct dc_plane_state * const *plane_states, 388 int plane_count, 389 struct dc_state *context); 390 391 bool dc_stream_add_writeback(struct dc *dc, 392 struct dc_stream_state *stream, 393 struct dc_writeback_info *wb_info); 394 395 bool dc_stream_remove_writeback(struct dc *dc, 396 struct dc_stream_state *stream, 397 uint32_t dwb_pipe_inst); 398 399 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 400 struct dc_state *state, 401 struct dc_stream_state *stream); 402 403 bool dc_stream_warmup_writeback(struct dc *dc, 404 int num_dwb, 405 struct dc_writeback_info *wb_info); 406 407 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 408 409 bool dc_stream_set_dynamic_metadata(struct dc *dc, 410 struct dc_stream_state *stream, 411 struct dc_dmdata_attributes *dmdata_attr); 412 413 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 414 415 /* 416 * Set up streams and links associated to drive sinks 417 * The streams parameter is an absolute set of all active streams. 418 * 419 * After this call: 420 * Phy, Encoder, Timing Generator are programmed and enabled. 421 * New streams are enabled with blank stream; no memory read. 422 */ 423 /* 424 * Enable stereo when commit_streams is not required, 425 * for example, frame alternate. 426 */ 427 void dc_enable_stereo( 428 struct dc *dc, 429 struct dc_state *context, 430 struct dc_stream_state *streams[], 431 uint8_t stream_count); 432 433 /* Triggers multi-stream synchronization. */ 434 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 435 436 enum surface_update_type dc_check_update_surfaces_for_stream( 437 struct dc *dc, 438 struct dc_surface_update *updates, 439 int surface_count, 440 struct dc_stream_update *stream_update, 441 const struct dc_stream_status *stream_status); 442 443 /** 444 * Create a new default stream for the requested sink 445 */ 446 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 447 448 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 449 450 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 451 452 void dc_stream_retain(struct dc_stream_state *dc_stream); 453 void dc_stream_release(struct dc_stream_state *dc_stream); 454 455 struct dc_stream_status *dc_stream_get_status_from_state( 456 struct dc_state *state, 457 struct dc_stream_state *stream); 458 struct dc_stream_status *dc_stream_get_status( 459 struct dc_stream_state *dc_stream); 460 461 #ifndef TRIM_FSFT 462 bool dc_optimize_timing_for_fsft( 463 struct dc_stream_state *pStream, 464 unsigned int max_input_rate_in_khz); 465 #endif 466 467 /******************************************************************************* 468 * Cursor interfaces - To manages the cursor within a stream 469 ******************************************************************************/ 470 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 471 bool dc_stream_set_cursor_attributes( 472 struct dc_stream_state *stream, 473 const struct dc_cursor_attributes *attributes); 474 475 bool dc_stream_set_cursor_position( 476 struct dc_stream_state *stream, 477 const struct dc_cursor_position *position); 478 479 480 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 481 struct dc_stream_state *stream, 482 struct dc_crtc_timing_adjust *adjust); 483 484 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 485 struct dc_stream_state *stream, 486 uint32_t *refresh_rate); 487 488 bool dc_stream_get_crtc_position(struct dc *dc, 489 struct dc_stream_state **stream, 490 int num_streams, 491 unsigned int *v_pos, 492 unsigned int *nom_v_pos); 493 494 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 495 bool dc_stream_forward_dmcu_crc_window(struct dc *dc, struct dc_stream_state *stream, 496 struct crc_params *crc_window); 497 bool dc_stream_stop_dmcu_crc_win_update(struct dc *dc, 498 struct dc_stream_state *stream); 499 #endif 500 501 bool dc_stream_configure_crc(struct dc *dc, 502 struct dc_stream_state *stream, 503 struct crc_params *crc_window, 504 bool enable, 505 bool continuous); 506 507 bool dc_stream_get_crc(struct dc *dc, 508 struct dc_stream_state *stream, 509 uint32_t *r_cr, 510 uint32_t *g_y, 511 uint32_t *b_cb); 512 513 void dc_stream_set_static_screen_params(struct dc *dc, 514 struct dc_stream_state **stream, 515 int num_streams, 516 const struct dc_static_screen_params *params); 517 518 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 519 enum dc_dynamic_expansion option); 520 521 void dc_stream_set_dither_option(struct dc_stream_state *stream, 522 enum dc_dither_option option); 523 524 bool dc_stream_set_gamut_remap(struct dc *dc, 525 const struct dc_stream_state *stream); 526 527 bool dc_stream_program_csc_matrix(struct dc *dc, 528 struct dc_stream_state *stream); 529 530 bool dc_stream_get_crtc_position(struct dc *dc, 531 struct dc_stream_state **stream, 532 int num_streams, 533 unsigned int *v_pos, 534 unsigned int *nom_v_pos); 535 536 #endif /* DC_STREAM_H_ */ 537