1 /*
2 * Copyright © 2014 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 /**
25 * DOC: Interrupt management for the V3D engine
26 *
27 * We have an interrupt status register (V3D_INTCTL) which reports
28 * interrupts, and where writing 1 bits clears those interrupts.
29 * There are also a pair of interrupt registers
30 * (V3D_INTENA/V3D_INTDIS) where writing a 1 to their bits enables or
31 * disables that specific interrupt, and 0s written are ignored
32 * (reading either one returns the set of enabled interrupts).
33 *
34 * When we take a binning flush done interrupt, we need to submit the
35 * next frame for binning and move the finished frame to the render
36 * thread.
37 *
38 * When we take a render frame interrupt, we need to wake the
39 * processes waiting for some frame to be done, and get the next frame
40 * submitted ASAP (so the hardware doesn't sit idle when there's work
41 * to do).
42 *
43 * When we take the binner out of memory interrupt, we need to
44 * allocate some new memory and pass it to the binner so that the
45 * current job can make progress.
46 */
47
48 #include <linux/platform_device.h>
49
50 #include <drm/drm_drv.h>
51
52 #include "vc4_drv.h"
53 #include "vc4_regs.h"
54
55 #define V3D_DRIVER_IRQS (V3D_INT_OUTOMEM | \
56 V3D_INT_FLDONE | \
57 V3D_INT_FRDONE)
58
59 DECLARE_WAIT_QUEUE_HEAD(render_wait);
60
61 static void
vc4_overflow_mem_work(struct work_struct * work)62 vc4_overflow_mem_work(struct work_struct *work)
63 {
64 struct vc4_dev *vc4 =
65 container_of(work, struct vc4_dev, overflow_mem_work);
66 struct vc4_bo *bo;
67 int bin_bo_slot;
68 struct vc4_exec_info *exec;
69 unsigned long irqflags;
70
71 mutex_lock(&vc4->bin_bo_lock);
72
73 if (!vc4->bin_bo)
74 goto complete;
75
76 bo = vc4->bin_bo;
77
78 bin_bo_slot = vc4_v3d_get_bin_slot(vc4);
79 if (bin_bo_slot < 0) {
80 DRM_ERROR("Couldn't allocate binner overflow mem\n");
81 goto complete;
82 }
83
84 spin_lock_irqsave(&vc4->job_lock, irqflags);
85
86 if (vc4->bin_alloc_overflow) {
87 /* If we had overflow memory allocated previously,
88 * then that chunk will free when the current bin job
89 * is done. If we don't have a bin job running, then
90 * the chunk will be done whenever the list of render
91 * jobs has drained.
92 */
93 exec = vc4_first_bin_job(vc4);
94 if (!exec)
95 exec = vc4_last_render_job(vc4);
96 if (exec) {
97 exec->bin_slots |= vc4->bin_alloc_overflow;
98 } else {
99 /* There's nothing queued in the hardware, so
100 * the old slot is free immediately.
101 */
102 vc4->bin_alloc_used &= ~vc4->bin_alloc_overflow;
103 }
104 }
105 vc4->bin_alloc_overflow = BIT(bin_bo_slot);
106
107 V3D_WRITE(V3D_BPOA, bo->base.paddr + bin_bo_slot * vc4->bin_alloc_size);
108 V3D_WRITE(V3D_BPOS, bo->base.base.size);
109 V3D_WRITE(V3D_INTCTL, V3D_INT_OUTOMEM);
110 V3D_WRITE(V3D_INTENA, V3D_INT_OUTOMEM);
111 spin_unlock_irqrestore(&vc4->job_lock, irqflags);
112
113 complete:
114 mutex_unlock(&vc4->bin_bo_lock);
115 }
116
117 static void
vc4_irq_finish_bin_job(struct drm_device * dev)118 vc4_irq_finish_bin_job(struct drm_device *dev)
119 {
120 struct vc4_dev *vc4 = to_vc4_dev(dev);
121 struct vc4_exec_info *next, *exec = vc4_first_bin_job(vc4);
122
123 if (!exec)
124 return;
125
126 vc4_move_job_to_render(dev, exec);
127 next = vc4_first_bin_job(vc4);
128
129 /* Only submit the next job in the bin list if it matches the perfmon
130 * attached to the one that just finished (or if both jobs don't have
131 * perfmon attached to them).
132 */
133 if (next && next->perfmon == exec->perfmon)
134 vc4_submit_next_bin_job(dev);
135 }
136
137 static void
vc4_cancel_bin_job(struct drm_device * dev)138 vc4_cancel_bin_job(struct drm_device *dev)
139 {
140 struct vc4_dev *vc4 = to_vc4_dev(dev);
141 struct vc4_exec_info *exec = vc4_first_bin_job(vc4);
142
143 if (!exec)
144 return;
145
146 /* Stop the perfmon so that the next bin job can be started. */
147 if (exec->perfmon)
148 vc4_perfmon_stop(vc4, exec->perfmon, false);
149
150 list_move_tail(&exec->head, &vc4->bin_job_list);
151 vc4_submit_next_bin_job(dev);
152 }
153
154 static void
vc4_irq_finish_render_job(struct drm_device * dev)155 vc4_irq_finish_render_job(struct drm_device *dev)
156 {
157 struct vc4_dev *vc4 = to_vc4_dev(dev);
158 struct vc4_exec_info *exec = vc4_first_render_job(vc4);
159 struct vc4_exec_info *nextbin, *nextrender;
160
161 if (!exec)
162 return;
163
164 vc4->finished_seqno++;
165 list_move_tail(&exec->head, &vc4->job_done_list);
166
167 nextbin = vc4_first_bin_job(vc4);
168 nextrender = vc4_first_render_job(vc4);
169
170 /* Only stop the perfmon if following jobs in the queue don't expect it
171 * to be enabled.
172 */
173 if (exec->perfmon && !nextrender &&
174 (!nextbin || nextbin->perfmon != exec->perfmon))
175 vc4_perfmon_stop(vc4, exec->perfmon, true);
176
177 /* If there's a render job waiting, start it. If this is not the case
178 * we may have to unblock the binner if it's been stalled because of
179 * perfmon (this can be checked by comparing the perfmon attached to
180 * the finished renderjob to the one attached to the next bin job: if
181 * they don't match, this means the binner is stalled and should be
182 * restarted).
183 */
184 if (nextrender)
185 vc4_submit_next_render_job(dev);
186 else if (nextbin && nextbin->perfmon != exec->perfmon)
187 vc4_submit_next_bin_job(dev);
188
189 if (exec->fence) {
190 dma_fence_signal_locked(exec->fence);
191 dma_fence_put(exec->fence);
192 exec->fence = NULL;
193 }
194
195 wake_up_all(&vc4->job_wait_queue);
196 schedule_work(&vc4->job_done_work);
197 }
198
199 static irqreturn_t
vc4_irq(int irq,void * arg)200 vc4_irq(int irq, void *arg)
201 {
202 struct drm_device *dev = arg;
203 struct vc4_dev *vc4 = to_vc4_dev(dev);
204 uint32_t intctl;
205 irqreturn_t status = IRQ_NONE;
206
207 barrier();
208 intctl = V3D_READ(V3D_INTCTL);
209
210 /* Acknowledge the interrupts we're handling here. The binner
211 * last flush / render frame done interrupt will be cleared,
212 * while OUTOMEM will stay high until the underlying cause is
213 * cleared.
214 */
215 V3D_WRITE(V3D_INTCTL, intctl);
216
217 if (intctl & V3D_INT_OUTOMEM) {
218 /* Disable OUTOMEM until the work is done. */
219 V3D_WRITE(V3D_INTDIS, V3D_INT_OUTOMEM);
220 schedule_work(&vc4->overflow_mem_work);
221 status = IRQ_HANDLED;
222 }
223
224 if (intctl & V3D_INT_FLDONE) {
225 spin_lock(&vc4->job_lock);
226 vc4_irq_finish_bin_job(dev);
227 spin_unlock(&vc4->job_lock);
228 status = IRQ_HANDLED;
229 }
230
231 if (intctl & V3D_INT_FRDONE) {
232 spin_lock(&vc4->job_lock);
233 vc4_irq_finish_render_job(dev);
234 spin_unlock(&vc4->job_lock);
235 status = IRQ_HANDLED;
236 }
237
238 return status;
239 }
240
241 static void
vc4_irq_prepare(struct drm_device * dev)242 vc4_irq_prepare(struct drm_device *dev)
243 {
244 struct vc4_dev *vc4 = to_vc4_dev(dev);
245
246 if (!vc4->v3d)
247 return;
248
249 init_waitqueue_head(&vc4->job_wait_queue);
250 INIT_WORK(&vc4->overflow_mem_work, vc4_overflow_mem_work);
251
252 /* Clear any pending interrupts someone might have left around
253 * for us.
254 */
255 V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS);
256 }
257
258 void
vc4_irq_enable(struct drm_device * dev)259 vc4_irq_enable(struct drm_device *dev)
260 {
261 struct vc4_dev *vc4 = to_vc4_dev(dev);
262
263 if (!vc4->v3d)
264 return;
265
266 /* Enable the render done interrupts. The out-of-memory interrupt is
267 * enabled as soon as we have a binner BO allocated.
268 */
269 V3D_WRITE(V3D_INTENA, V3D_INT_FLDONE | V3D_INT_FRDONE);
270 }
271
272 void
vc4_irq_disable(struct drm_device * dev)273 vc4_irq_disable(struct drm_device *dev)
274 {
275 struct vc4_dev *vc4 = to_vc4_dev(dev);
276
277 if (!vc4->v3d)
278 return;
279
280 /* Disable sending interrupts for our driver's IRQs. */
281 V3D_WRITE(V3D_INTDIS, V3D_DRIVER_IRQS);
282
283 /* Clear any pending interrupts we might have left. */
284 V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS);
285
286 /* Finish any interrupt handler still in flight. */
287 disable_irq(vc4->irq);
288
289 cancel_work_sync(&vc4->overflow_mem_work);
290 }
291
vc4_irq_install(struct drm_device * dev,int irq)292 int vc4_irq_install(struct drm_device *dev, int irq)
293 {
294 int ret;
295
296 if (irq == IRQ_NOTCONNECTED)
297 return -ENOTCONN;
298
299 vc4_irq_prepare(dev);
300
301 ret = request_irq(irq, vc4_irq, 0, dev->driver->name, dev);
302 if (ret)
303 return ret;
304
305 vc4_irq_enable(dev);
306
307 return 0;
308 }
309
vc4_irq_uninstall(struct drm_device * dev)310 void vc4_irq_uninstall(struct drm_device *dev)
311 {
312 struct vc4_dev *vc4 = to_vc4_dev(dev);
313
314 vc4_irq_disable(dev);
315 free_irq(vc4->irq, dev);
316 }
317
318 /** Reinitializes interrupt registers when a GPU reset is performed. */
vc4_irq_reset(struct drm_device * dev)319 void vc4_irq_reset(struct drm_device *dev)
320 {
321 struct vc4_dev *vc4 = to_vc4_dev(dev);
322 unsigned long irqflags;
323
324 /* Acknowledge any stale IRQs. */
325 V3D_WRITE(V3D_INTCTL, V3D_DRIVER_IRQS);
326
327 /*
328 * Turn all our interrupts on. Binner out of memory is the
329 * only one we expect to trigger at this point, since we've
330 * just come from poweron and haven't supplied any overflow
331 * memory yet.
332 */
333 V3D_WRITE(V3D_INTENA, V3D_DRIVER_IRQS);
334
335 spin_lock_irqsave(&vc4->job_lock, irqflags);
336 vc4_cancel_bin_job(dev);
337 vc4_irq_finish_render_job(dev);
338 spin_unlock_irqrestore(&vc4->job_lock, irqflags);
339 }
340