1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Xilinx Zynq MPSoC Firmware layer
4 *
5 * Copyright (C) 2014-2021 Xilinx, Inc.
6 *
7 * Michal Simek <michal.simek@xilinx.com>
8 * Davorin Mista <davorin.mista@aggios.com>
9 * Jolly Shah <jollys@xilinx.com>
10 * Rajan Vaja <rajanv@xilinx.com>
11 */
12
13 #include <linux/arm-smccc.h>
14 #include <linux/compiler.h>
15 #include <linux/device.h>
16 #include <linux/init.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_platform.h>
21 #include <linux/slab.h>
22 #include <linux/uaccess.h>
23 #include <linux/hashtable.h>
24
25 #include <linux/firmware/xlnx-zynqmp.h>
26 #include "zynqmp-debug.h"
27
28 /* Max HashMap Order for PM API feature check (1<<7 = 128) */
29 #define PM_API_FEATURE_CHECK_MAX_ORDER 7
30
31 static bool feature_check_enabled;
32 static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
33
34 /**
35 * struct pm_api_feature_data - PM API Feature data
36 * @pm_api_id: PM API Id, used as key to index into hashmap
37 * @feature_status: status of PM API feature: valid, invalid
38 * @hentry: hlist_node that hooks this entry into hashtable
39 */
40 struct pm_api_feature_data {
41 u32 pm_api_id;
42 int feature_status;
43 struct hlist_node hentry;
44 };
45
46 static const struct mfd_cell firmware_devs[] = {
47 {
48 .name = "zynqmp_power_controller",
49 },
50 };
51
52 /**
53 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes
54 * @ret_status: PMUFW return code
55 *
56 * Return: corresponding Linux error code
57 */
zynqmp_pm_ret_code(u32 ret_status)58 static int zynqmp_pm_ret_code(u32 ret_status)
59 {
60 switch (ret_status) {
61 case XST_PM_SUCCESS:
62 case XST_PM_DOUBLE_REQ:
63 return 0;
64 case XST_PM_NO_FEATURE:
65 return -ENOTSUPP;
66 case XST_PM_NO_ACCESS:
67 return -EACCES;
68 case XST_PM_ABORT_SUSPEND:
69 return -ECANCELED;
70 case XST_PM_MULT_USER:
71 return -EUSERS;
72 case XST_PM_INTERNAL:
73 case XST_PM_CONFLICT:
74 case XST_PM_INVALID_NODE:
75 default:
76 return -EINVAL;
77 }
78 }
79
do_fw_call_fail(u64 arg0,u64 arg1,u64 arg2,u32 * ret_payload)80 static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2,
81 u32 *ret_payload)
82 {
83 return -ENODEV;
84 }
85
86 /*
87 * PM function call wrapper
88 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration
89 */
90 static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail;
91
92 /**
93 * do_fw_call_smc() - Call system-level platform management layer (SMC)
94 * @arg0: Argument 0 to SMC call
95 * @arg1: Argument 1 to SMC call
96 * @arg2: Argument 2 to SMC call
97 * @ret_payload: Returned value array
98 *
99 * Invoke platform management function via SMC call (no hypervisor present).
100 *
101 * Return: Returns status, either success or error+reason
102 */
do_fw_call_smc(u64 arg0,u64 arg1,u64 arg2,u32 * ret_payload)103 static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2,
104 u32 *ret_payload)
105 {
106 struct arm_smccc_res res;
107
108 arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
109
110 if (ret_payload) {
111 ret_payload[0] = lower_32_bits(res.a0);
112 ret_payload[1] = upper_32_bits(res.a0);
113 ret_payload[2] = lower_32_bits(res.a1);
114 ret_payload[3] = upper_32_bits(res.a1);
115 }
116
117 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
118 }
119
120 /**
121 * do_fw_call_hvc() - Call system-level platform management layer (HVC)
122 * @arg0: Argument 0 to HVC call
123 * @arg1: Argument 1 to HVC call
124 * @arg2: Argument 2 to HVC call
125 * @ret_payload: Returned value array
126 *
127 * Invoke platform management function via HVC
128 * HVC-based for communication through hypervisor
129 * (no direct communication with ATF).
130 *
131 * Return: Returns status, either success or error+reason
132 */
do_fw_call_hvc(u64 arg0,u64 arg1,u64 arg2,u32 * ret_payload)133 static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2,
134 u32 *ret_payload)
135 {
136 struct arm_smccc_res res;
137
138 arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
139
140 if (ret_payload) {
141 ret_payload[0] = lower_32_bits(res.a0);
142 ret_payload[1] = upper_32_bits(res.a0);
143 ret_payload[2] = lower_32_bits(res.a1);
144 ret_payload[3] = upper_32_bits(res.a1);
145 }
146
147 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
148 }
149
150 /**
151 * zynqmp_pm_feature() - Check weather given feature is supported or not
152 * @api_id: API ID to check
153 *
154 * Return: Returns status, either success or error+reason
155 */
zynqmp_pm_feature(u32 api_id)156 static int zynqmp_pm_feature(u32 api_id)
157 {
158 int ret;
159 u32 ret_payload[PAYLOAD_ARG_CNT];
160 u64 smc_arg[2];
161 struct pm_api_feature_data *feature_data;
162
163 if (!feature_check_enabled)
164 return 0;
165
166 /* Check for existing entry in hash table for given api */
167 hash_for_each_possible(pm_api_features_map, feature_data, hentry,
168 api_id) {
169 if (feature_data->pm_api_id == api_id)
170 return feature_data->feature_status;
171 }
172
173 /* Add new entry if not present */
174 feature_data = kmalloc(sizeof(*feature_data), GFP_ATOMIC);
175 if (!feature_data)
176 return -ENOMEM;
177
178 feature_data->pm_api_id = api_id;
179 smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
180 smc_arg[1] = api_id;
181
182 ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload);
183 if (ret)
184 ret = -EOPNOTSUPP;
185 else
186 ret = ret_payload[1];
187
188 feature_data->feature_status = ret;
189 hash_add(pm_api_features_map, &feature_data->hentry, api_id);
190
191 return ret;
192 }
193
194 /**
195 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer
196 * caller function depending on the configuration
197 * @pm_api_id: Requested PM-API call
198 * @arg0: Argument 0 to requested PM-API call
199 * @arg1: Argument 1 to requested PM-API call
200 * @arg2: Argument 2 to requested PM-API call
201 * @arg3: Argument 3 to requested PM-API call
202 * @ret_payload: Returned value array
203 *
204 * Invoke platform management function for SMC or HVC call, depending on
205 * configuration.
206 * Following SMC Calling Convention (SMCCC) for SMC64:
207 * Pm Function Identifier,
208 * PM_SIP_SVC + PM_API_ID =
209 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
210 * ((SMC_64) << FUNCID_CC_SHIFT)
211 * ((SIP_START) << FUNCID_OEN_SHIFT)
212 * ((PM_API_ID) & FUNCID_NUM_MASK))
213 *
214 * PM_SIP_SVC - Registered ZynqMP SIP Service Call.
215 * PM_API_ID - Platform Management API ID.
216 *
217 * Return: Returns status, either success or error+reason
218 */
zynqmp_pm_invoke_fn(u32 pm_api_id,u32 arg0,u32 arg1,u32 arg2,u32 arg3,u32 * ret_payload)219 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
220 u32 arg2, u32 arg3, u32 *ret_payload)
221 {
222 /*
223 * Added SIP service call Function Identifier
224 * Make sure to stay in x0 register
225 */
226 u64 smc_arg[4];
227 int ret;
228
229 /* Check if feature is supported or not */
230 ret = zynqmp_pm_feature(pm_api_id);
231 if (ret < 0)
232 return ret;
233
234 smc_arg[0] = PM_SIP_SVC | pm_api_id;
235 smc_arg[1] = ((u64)arg1 << 32) | arg0;
236 smc_arg[2] = ((u64)arg3 << 32) | arg2;
237
238 return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload);
239 }
240
241 static u32 pm_api_version;
242 static u32 pm_tz_version;
243
244 /**
245 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware
246 * @version: Returned version value
247 *
248 * Return: Returns status, either success or error+reason
249 */
zynqmp_pm_get_api_version(u32 * version)250 int zynqmp_pm_get_api_version(u32 *version)
251 {
252 u32 ret_payload[PAYLOAD_ARG_CNT];
253 int ret;
254
255 if (!version)
256 return -EINVAL;
257
258 /* Check is PM API version already verified */
259 if (pm_api_version > 0) {
260 *version = pm_api_version;
261 return 0;
262 }
263 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload);
264 *version = ret_payload[1];
265
266 return ret;
267 }
268 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version);
269
270 /**
271 * zynqmp_pm_get_chipid - Get silicon ID registers
272 * @idcode: IDCODE register
273 * @version: version register
274 *
275 * Return: Returns the status of the operation and the idcode and version
276 * registers in @idcode and @version.
277 */
zynqmp_pm_get_chipid(u32 * idcode,u32 * version)278 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
279 {
280 u32 ret_payload[PAYLOAD_ARG_CNT];
281 int ret;
282
283 if (!idcode || !version)
284 return -EINVAL;
285
286 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
287 *idcode = ret_payload[1];
288 *version = ret_payload[2];
289
290 return ret;
291 }
292 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid);
293
294 /**
295 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
296 * @version: Returned version value
297 *
298 * Return: Returns status, either success or error+reason
299 */
zynqmp_pm_get_trustzone_version(u32 * version)300 static int zynqmp_pm_get_trustzone_version(u32 *version)
301 {
302 u32 ret_payload[PAYLOAD_ARG_CNT];
303 int ret;
304
305 if (!version)
306 return -EINVAL;
307
308 /* Check is PM trustzone version already verified */
309 if (pm_tz_version > 0) {
310 *version = pm_tz_version;
311 return 0;
312 }
313 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0,
314 0, 0, ret_payload);
315 *version = ret_payload[1];
316
317 return ret;
318 }
319
320 /**
321 * get_set_conduit_method() - Choose SMC or HVC based communication
322 * @np: Pointer to the device_node structure
323 *
324 * Use SMC or HVC-based functions to communicate with EL2/EL3.
325 *
326 * Return: Returns 0 on success or error code
327 */
get_set_conduit_method(struct device_node * np)328 static int get_set_conduit_method(struct device_node *np)
329 {
330 const char *method;
331
332 if (of_property_read_string(np, "method", &method)) {
333 pr_warn("%s missing \"method\" property\n", __func__);
334 return -ENXIO;
335 }
336
337 if (!strcmp("hvc", method)) {
338 do_fw_call = do_fw_call_hvc;
339 } else if (!strcmp("smc", method)) {
340 do_fw_call = do_fw_call_smc;
341 } else {
342 pr_warn("%s Invalid \"method\" property: %s\n",
343 __func__, method);
344 return -EINVAL;
345 }
346
347 return 0;
348 }
349
350 /**
351 * zynqmp_pm_query_data() - Get query data from firmware
352 * @qdata: Variable to the zynqmp_pm_query_data structure
353 * @out: Returned output value
354 *
355 * Return: Returns status, either success or error+reason
356 */
zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata,u32 * out)357 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
358 {
359 int ret;
360
361 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1,
362 qdata.arg2, qdata.arg3, out);
363
364 /*
365 * For clock name query, all bytes in SMC response are clock name
366 * characters and return code is always success. For invalid clocks,
367 * clock name bytes would be zeros.
368 */
369 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
370 }
371 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
372
373 /**
374 * zynqmp_pm_clock_enable() - Enable the clock for given id
375 * @clock_id: ID of the clock to be enabled
376 *
377 * This function is used by master to enable the clock
378 * including peripherals and PLL clocks.
379 *
380 * Return: Returns status, either success or error+reason
381 */
zynqmp_pm_clock_enable(u32 clock_id)382 int zynqmp_pm_clock_enable(u32 clock_id)
383 {
384 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL);
385 }
386 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
387
388 /**
389 * zynqmp_pm_clock_disable() - Disable the clock for given id
390 * @clock_id: ID of the clock to be disable
391 *
392 * This function is used by master to disable the clock
393 * including peripherals and PLL clocks.
394 *
395 * Return: Returns status, either success or error+reason
396 */
zynqmp_pm_clock_disable(u32 clock_id)397 int zynqmp_pm_clock_disable(u32 clock_id)
398 {
399 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL);
400 }
401 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
402
403 /**
404 * zynqmp_pm_clock_getstate() - Get the clock state for given id
405 * @clock_id: ID of the clock to be queried
406 * @state: 1/0 (Enabled/Disabled)
407 *
408 * This function is used by master to get the state of clock
409 * including peripherals and PLL clocks.
410 *
411 * Return: Returns status, either success or error+reason
412 */
zynqmp_pm_clock_getstate(u32 clock_id,u32 * state)413 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
414 {
415 u32 ret_payload[PAYLOAD_ARG_CNT];
416 int ret;
417
418 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0,
419 0, 0, ret_payload);
420 *state = ret_payload[1];
421
422 return ret;
423 }
424 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
425
426 /**
427 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id
428 * @clock_id: ID of the clock
429 * @divider: divider value
430 *
431 * This function is used by master to set divider for any clock
432 * to achieve desired rate.
433 *
434 * Return: Returns status, either success or error+reason
435 */
zynqmp_pm_clock_setdivider(u32 clock_id,u32 divider)436 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
437 {
438 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider,
439 0, 0, NULL);
440 }
441 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
442
443 /**
444 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id
445 * @clock_id: ID of the clock
446 * @divider: divider value
447 *
448 * This function is used by master to get divider values
449 * for any clock.
450 *
451 * Return: Returns status, either success or error+reason
452 */
zynqmp_pm_clock_getdivider(u32 clock_id,u32 * divider)453 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
454 {
455 u32 ret_payload[PAYLOAD_ARG_CNT];
456 int ret;
457
458 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0,
459 0, 0, ret_payload);
460 *divider = ret_payload[1];
461
462 return ret;
463 }
464 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
465
466 /**
467 * zynqmp_pm_clock_setrate() - Set the clock rate for given id
468 * @clock_id: ID of the clock
469 * @rate: rate value in hz
470 *
471 * This function is used by master to set rate for any clock.
472 *
473 * Return: Returns status, either success or error+reason
474 */
zynqmp_pm_clock_setrate(u32 clock_id,u64 rate)475 int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
476 {
477 return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id,
478 lower_32_bits(rate),
479 upper_32_bits(rate),
480 0, NULL);
481 }
482 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate);
483
484 /**
485 * zynqmp_pm_clock_getrate() - Get the clock rate for given id
486 * @clock_id: ID of the clock
487 * @rate: rate value in hz
488 *
489 * This function is used by master to get rate
490 * for any clock.
491 *
492 * Return: Returns status, either success or error+reason
493 */
zynqmp_pm_clock_getrate(u32 clock_id,u64 * rate)494 int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
495 {
496 u32 ret_payload[PAYLOAD_ARG_CNT];
497 int ret;
498
499 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0,
500 0, 0, ret_payload);
501 *rate = ((u64)ret_payload[2] << 32) | ret_payload[1];
502
503 return ret;
504 }
505 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate);
506
507 /**
508 * zynqmp_pm_clock_setparent() - Set the clock parent for given id
509 * @clock_id: ID of the clock
510 * @parent_id: parent id
511 *
512 * This function is used by master to set parent for any clock.
513 *
514 * Return: Returns status, either success or error+reason
515 */
zynqmp_pm_clock_setparent(u32 clock_id,u32 parent_id)516 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
517 {
518 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id,
519 parent_id, 0, 0, NULL);
520 }
521 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
522
523 /**
524 * zynqmp_pm_clock_getparent() - Get the clock parent for given id
525 * @clock_id: ID of the clock
526 * @parent_id: parent id
527 *
528 * This function is used by master to get parent index
529 * for any clock.
530 *
531 * Return: Returns status, either success or error+reason
532 */
zynqmp_pm_clock_getparent(u32 clock_id,u32 * parent_id)533 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
534 {
535 u32 ret_payload[PAYLOAD_ARG_CNT];
536 int ret;
537
538 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0,
539 0, 0, ret_payload);
540 *parent_id = ret_payload[1];
541
542 return ret;
543 }
544 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
545
546 /**
547 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode
548 *
549 * @clk_id: PLL clock ID
550 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT)
551 *
552 * This function sets PLL mode
553 *
554 * Return: Returns status, either success or error+reason
555 */
zynqmp_pm_set_pll_frac_mode(u32 clk_id,u32 mode)556 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
557 {
558 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE,
559 clk_id, mode, NULL);
560 }
561 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
562
563 /**
564 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode
565 *
566 * @clk_id: PLL clock ID
567 * @mode: PLL mode
568 *
569 * This function return current PLL mode
570 *
571 * Return: Returns status, either success or error+reason
572 */
zynqmp_pm_get_pll_frac_mode(u32 clk_id,u32 * mode)573 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
574 {
575 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE,
576 clk_id, 0, mode);
577 }
578 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
579
580 /**
581 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data
582 *
583 * @clk_id: PLL clock ID
584 * @data: fraction data
585 *
586 * This function sets fraction data.
587 * It is valid for fraction mode only.
588 *
589 * Return: Returns status, either success or error+reason
590 */
zynqmp_pm_set_pll_frac_data(u32 clk_id,u32 data)591 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
592 {
593 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA,
594 clk_id, data, NULL);
595 }
596 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
597
598 /**
599 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data
600 *
601 * @clk_id: PLL clock ID
602 * @data: fraction data
603 *
604 * This function returns fraction data value.
605 *
606 * Return: Returns status, either success or error+reason
607 */
zynqmp_pm_get_pll_frac_data(u32 clk_id,u32 * data)608 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
609 {
610 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA,
611 clk_id, 0, data);
612 }
613 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
614
615 /**
616 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device
617 *
618 * @node_id: Node ID of the device
619 * @type: Type of tap delay to set (input/output)
620 * @value: Value to set fot the tap delay
621 *
622 * This function sets input/output tap delay for the SD device.
623 *
624 * Return: Returns status, either success or error+reason
625 */
zynqmp_pm_set_sd_tapdelay(u32 node_id,u32 type,u32 value)626 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
627 {
628 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY,
629 type, value, NULL);
630 }
631 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
632
633 /**
634 * zynqmp_pm_sd_dll_reset() - Reset DLL logic
635 *
636 * @node_id: Node ID of the device
637 * @type: Reset type
638 *
639 * This function resets DLL logic for the SD device.
640 *
641 * Return: Returns status, either success or error+reason
642 */
zynqmp_pm_sd_dll_reset(u32 node_id,u32 type)643 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
644 {
645 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET,
646 type, 0, NULL);
647 }
648 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
649
650 /**
651 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs)
652 * @index: GGS register index
653 * @value: Register value to be written
654 *
655 * This function writes value to GGS register.
656 *
657 * Return: Returns status, either success or error+reason
658 */
zynqmp_pm_write_ggs(u32 index,u32 value)659 int zynqmp_pm_write_ggs(u32 index, u32 value)
660 {
661 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS,
662 index, value, NULL);
663 }
664 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
665
666 /**
667 * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs)
668 * @index: GGS register index
669 * @value: Register value to be written
670 *
671 * This function returns GGS register value.
672 *
673 * Return: Returns status, either success or error+reason
674 */
zynqmp_pm_read_ggs(u32 index,u32 * value)675 int zynqmp_pm_read_ggs(u32 index, u32 *value)
676 {
677 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS,
678 index, 0, value);
679 }
680 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
681
682 /**
683 * zynqmp_pm_write_pggs() - PM API for writing persistent global general
684 * storage (pggs)
685 * @index: PGGS register index
686 * @value: Register value to be written
687 *
688 * This function writes value to PGGS register.
689 *
690 * Return: Returns status, either success or error+reason
691 */
zynqmp_pm_write_pggs(u32 index,u32 value)692 int zynqmp_pm_write_pggs(u32 index, u32 value)
693 {
694 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value,
695 NULL);
696 }
697 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
698
699 /**
700 * zynqmp_pm_read_pggs() - PM API for reading persistent global general
701 * storage (pggs)
702 * @index: PGGS register index
703 * @value: Register value to be written
704 *
705 * This function returns PGGS register value.
706 *
707 * Return: Returns status, either success or error+reason
708 */
zynqmp_pm_read_pggs(u32 index,u32 * value)709 int zynqmp_pm_read_pggs(u32 index, u32 *value)
710 {
711 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0,
712 value);
713 }
714 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
715
716 /**
717 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
718 * @value: Status value to be written
719 *
720 * This function sets healthy bit value to indicate boot health status
721 * to firmware.
722 *
723 * Return: Returns status, either success or error+reason
724 */
zynqmp_pm_set_boot_health_status(u32 value)725 int zynqmp_pm_set_boot_health_status(u32 value)
726 {
727 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS,
728 value, 0, NULL);
729 }
730
731 /**
732 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release)
733 * @reset: Reset to be configured
734 * @assert_flag: Flag stating should reset be asserted (1) or
735 * released (0)
736 *
737 * Return: Returns status, either success or error+reason
738 */
zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,const enum zynqmp_pm_reset_action assert_flag)739 int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
740 const enum zynqmp_pm_reset_action assert_flag)
741 {
742 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag,
743 0, 0, NULL);
744 }
745 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
746
747 /**
748 * zynqmp_pm_reset_get_status - Get status of the reset
749 * @reset: Reset whose status should be returned
750 * @status: Returned status
751 *
752 * Return: Returns status, either success or error+reason
753 */
zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset,u32 * status)754 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status)
755 {
756 u32 ret_payload[PAYLOAD_ARG_CNT];
757 int ret;
758
759 if (!status)
760 return -EINVAL;
761
762 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0,
763 0, 0, ret_payload);
764 *status = ret_payload[1];
765
766 return ret;
767 }
768 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
769
770 /**
771 * zynqmp_pm_fpga_load - Perform the fpga load
772 * @address: Address to write to
773 * @size: pl bitstream size
774 * @flags: Bitstream type
775 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration
776 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration
777 *
778 * This function provides access to pmufw. To transfer
779 * the required bitstream into PL.
780 *
781 * Return: Returns status, either success or error+reason
782 */
zynqmp_pm_fpga_load(const u64 address,const u32 size,const u32 flags)783 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
784 {
785 return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
786 upper_32_bits(address), size, flags, NULL);
787 }
788 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
789
790 /**
791 * zynqmp_pm_fpga_get_status - Read value from PCAP status register
792 * @value: Value to read
793 *
794 * This function provides access to the pmufw to get the PCAP
795 * status
796 *
797 * Return: Returns status, either success or error+reason
798 */
zynqmp_pm_fpga_get_status(u32 * value)799 int zynqmp_pm_fpga_get_status(u32 *value)
800 {
801 u32 ret_payload[PAYLOAD_ARG_CNT];
802 int ret;
803
804 if (!value)
805 return -EINVAL;
806
807 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload);
808 *value = ret_payload[1];
809
810 return ret;
811 }
812 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
813
814 /**
815 * zynqmp_pm_pinctrl_request - Request Pin from firmware
816 * @pin: Pin number to request
817 *
818 * This function requests pin from firmware.
819 *
820 * Return: Returns status, either success or error+reason.
821 */
zynqmp_pm_pinctrl_request(const u32 pin)822 int zynqmp_pm_pinctrl_request(const u32 pin)
823 {
824 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL);
825 }
826 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request);
827
828 /**
829 * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released
830 * @pin: Pin number to release
831 *
832 * This function release pin from firmware.
833 *
834 * Return: Returns status, either success or error+reason.
835 */
zynqmp_pm_pinctrl_release(const u32 pin)836 int zynqmp_pm_pinctrl_release(const u32 pin)
837 {
838 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, NULL);
839 }
840 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release);
841
842 /**
843 * zynqmp_pm_pinctrl_get_function - Read function id set for the given pin
844 * @pin: Pin number
845 * @id: Buffer to store function ID
846 *
847 * This function provides the function currently set for the given pin.
848 *
849 * Return: Returns status, either success or error+reason
850 */
zynqmp_pm_pinctrl_get_function(const u32 pin,u32 * id)851 int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id)
852 {
853 u32 ret_payload[PAYLOAD_ARG_CNT];
854 int ret;
855
856 if (!id)
857 return -EINVAL;
858
859 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, pin, 0,
860 0, 0, ret_payload);
861 *id = ret_payload[1];
862
863 return ret;
864 }
865 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function);
866
867 /**
868 * zynqmp_pm_pinctrl_set_function - Set requested function for the pin
869 * @pin: Pin number
870 * @id: Function ID to set
871 *
872 * This function sets requested function for the given pin.
873 *
874 * Return: Returns status, either success or error+reason.
875 */
zynqmp_pm_pinctrl_set_function(const u32 pin,const u32 id)876 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id)
877 {
878 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, pin, id,
879 0, 0, NULL);
880 }
881 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function);
882
883 /**
884 * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin
885 * @pin: Pin number
886 * @param: Parameter to get
887 * @value: Buffer to store parameter value
888 *
889 * This function gets requested configuration parameter for the given pin.
890 *
891 * Return: Returns status, either success or error+reason.
892 */
zynqmp_pm_pinctrl_get_config(const u32 pin,const u32 param,u32 * value)893 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
894 u32 *value)
895 {
896 u32 ret_payload[PAYLOAD_ARG_CNT];
897 int ret;
898
899 if (!value)
900 return -EINVAL;
901
902 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, pin, param,
903 0, 0, ret_payload);
904 *value = ret_payload[1];
905
906 return ret;
907 }
908 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config);
909
910 /**
911 * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin
912 * @pin: Pin number
913 * @param: Parameter to set
914 * @value: Parameter value to set
915 *
916 * This function sets requested configuration parameter for the given pin.
917 *
918 * Return: Returns status, either success or error+reason.
919 */
zynqmp_pm_pinctrl_set_config(const u32 pin,const u32 param,u32 value)920 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
921 u32 value)
922 {
923 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, pin,
924 param, value, 0, NULL);
925 }
926 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config);
927
928 /**
929 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller
930 * master has initialized its own power management
931 *
932 * Return: Returns status, either success or error+reason
933 *
934 * This API function is to be used for notify the power management controller
935 * about the completed power management initialization.
936 */
zynqmp_pm_init_finalize(void)937 int zynqmp_pm_init_finalize(void)
938 {
939 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL);
940 }
941 EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
942
943 /**
944 * zynqmp_pm_set_suspend_mode() - Set system suspend mode
945 * @mode: Mode to set for system suspend
946 *
947 * This API function is used to set mode of system suspend.
948 *
949 * Return: Returns status, either success or error+reason
950 */
zynqmp_pm_set_suspend_mode(u32 mode)951 int zynqmp_pm_set_suspend_mode(u32 mode)
952 {
953 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL);
954 }
955 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
956
957 /**
958 * zynqmp_pm_request_node() - Request a node with specific capabilities
959 * @node: Node ID of the slave
960 * @capabilities: Requested capabilities of the slave
961 * @qos: Quality of service (not supported)
962 * @ack: Flag to specify whether acknowledge is requested
963 *
964 * This function is used by master to request particular node from firmware.
965 * Every master must request node before using it.
966 *
967 * Return: Returns status, either success or error+reason
968 */
zynqmp_pm_request_node(const u32 node,const u32 capabilities,const u32 qos,const enum zynqmp_pm_request_ack ack)969 int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
970 const u32 qos, const enum zynqmp_pm_request_ack ack)
971 {
972 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities,
973 qos, ack, NULL);
974 }
975 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
976
977 /**
978 * zynqmp_pm_release_node() - Release a node
979 * @node: Node ID of the slave
980 *
981 * This function is used by master to inform firmware that master
982 * has released node. Once released, master must not use that node
983 * without re-request.
984 *
985 * Return: Returns status, either success or error+reason
986 */
zynqmp_pm_release_node(const u32 node)987 int zynqmp_pm_release_node(const u32 node)
988 {
989 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL);
990 }
991 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
992
993 /**
994 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves
995 * @node: Node ID of the slave
996 * @capabilities: Requested capabilities of the slave
997 * @qos: Quality of service (not supported)
998 * @ack: Flag to specify whether acknowledge is requested
999 *
1000 * This API function is to be used for slaves a PU already has requested
1001 * to change its capabilities.
1002 *
1003 * Return: Returns status, either success or error+reason
1004 */
zynqmp_pm_set_requirement(const u32 node,const u32 capabilities,const u32 qos,const enum zynqmp_pm_request_ack ack)1005 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
1006 const u32 qos,
1007 const enum zynqmp_pm_request_ack ack)
1008 {
1009 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities,
1010 qos, ack, NULL);
1011 }
1012 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
1013
1014 /**
1015 * zynqmp_pm_load_pdi - Load and process PDI
1016 * @src: Source device where PDI is located
1017 * @address: PDI src address
1018 *
1019 * This function provides support to load PDI from linux
1020 *
1021 * Return: Returns status, either success or error+reason
1022 */
zynqmp_pm_load_pdi(const u32 src,const u64 address)1023 int zynqmp_pm_load_pdi(const u32 src, const u64 address)
1024 {
1025 return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src,
1026 lower_32_bits(address),
1027 upper_32_bits(address), 0, NULL);
1028 }
1029 EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
1030
1031 /**
1032 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using
1033 * AES-GCM core.
1034 * @address: Address of the AesParams structure.
1035 * @out: Returned output value
1036 *
1037 * Return: Returns status, either success or error code.
1038 */
zynqmp_pm_aes_engine(const u64 address,u32 * out)1039 int zynqmp_pm_aes_engine(const u64 address, u32 *out)
1040 {
1041 u32 ret_payload[PAYLOAD_ARG_CNT];
1042 int ret;
1043
1044 if (!out)
1045 return -EINVAL;
1046
1047 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
1048 lower_32_bits(address),
1049 0, 0, ret_payload);
1050 *out = ret_payload[1];
1051
1052 return ret;
1053 }
1054 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
1055
1056 /**
1057 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart
1058 * @type: Shutdown or restart? 0 for shutdown, 1 for restart
1059 * @subtype: Specifies which system should be restarted or shut down
1060 *
1061 * Return: Returns status, either success or error+reason
1062 */
zynqmp_pm_system_shutdown(const u32 type,const u32 subtype)1063 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
1064 {
1065 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype,
1066 0, 0, NULL);
1067 }
1068
1069 /**
1070 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
1071 * @subtype: Shutdown subtype
1072 * @name: Matching string for scope argument
1073 *
1074 * This struct encapsulates mapping between shutdown scope ID and string.
1075 */
1076 struct zynqmp_pm_shutdown_scope {
1077 const enum zynqmp_pm_shutdown_subtype subtype;
1078 const char *name;
1079 };
1080
1081 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = {
1082 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = {
1083 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM,
1084 .name = "subsystem",
1085 },
1086 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = {
1087 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY,
1088 .name = "ps_only",
1089 },
1090 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = {
1091 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM,
1092 .name = "system",
1093 },
1094 };
1095
1096 static struct zynqmp_pm_shutdown_scope *selected_scope =
1097 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM];
1098
1099 /**
1100 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid
1101 * @scope_string: Shutdown scope string
1102 *
1103 * Return: Return pointer to matching shutdown scope struct from
1104 * array of available options in system if string is valid,
1105 * otherwise returns NULL.
1106 */
1107 static struct zynqmp_pm_shutdown_scope*
zynqmp_pm_is_shutdown_scope_valid(const char * scope_string)1108 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string)
1109 {
1110 int count;
1111
1112 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++)
1113 if (sysfs_streq(scope_string, shutdown_scopes[count].name))
1114 return &shutdown_scopes[count];
1115
1116 return NULL;
1117 }
1118
shutdown_scope_show(struct device * device,struct device_attribute * attr,char * buf)1119 static ssize_t shutdown_scope_show(struct device *device,
1120 struct device_attribute *attr,
1121 char *buf)
1122 {
1123 int i;
1124
1125 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) {
1126 if (&shutdown_scopes[i] == selected_scope) {
1127 strcat(buf, "[");
1128 strcat(buf, shutdown_scopes[i].name);
1129 strcat(buf, "]");
1130 } else {
1131 strcat(buf, shutdown_scopes[i].name);
1132 }
1133 strcat(buf, " ");
1134 }
1135 strcat(buf, "\n");
1136
1137 return strlen(buf);
1138 }
1139
shutdown_scope_store(struct device * device,struct device_attribute * attr,const char * buf,size_t count)1140 static ssize_t shutdown_scope_store(struct device *device,
1141 struct device_attribute *attr,
1142 const char *buf, size_t count)
1143 {
1144 int ret;
1145 struct zynqmp_pm_shutdown_scope *scope;
1146
1147 scope = zynqmp_pm_is_shutdown_scope_valid(buf);
1148 if (!scope)
1149 return -EINVAL;
1150
1151 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
1152 scope->subtype);
1153 if (ret) {
1154 pr_err("unable to set shutdown scope %s\n", buf);
1155 return ret;
1156 }
1157
1158 selected_scope = scope;
1159
1160 return count;
1161 }
1162
1163 static DEVICE_ATTR_RW(shutdown_scope);
1164
health_status_store(struct device * device,struct device_attribute * attr,const char * buf,size_t count)1165 static ssize_t health_status_store(struct device *device,
1166 struct device_attribute *attr,
1167 const char *buf, size_t count)
1168 {
1169 int ret;
1170 unsigned int value;
1171
1172 ret = kstrtouint(buf, 10, &value);
1173 if (ret)
1174 return ret;
1175
1176 ret = zynqmp_pm_set_boot_health_status(value);
1177 if (ret) {
1178 dev_err(device, "unable to set healthy bit value to %u\n",
1179 value);
1180 return ret;
1181 }
1182
1183 return count;
1184 }
1185
1186 static DEVICE_ATTR_WO(health_status);
1187
ggs_show(struct device * device,struct device_attribute * attr,char * buf,u32 reg)1188 static ssize_t ggs_show(struct device *device,
1189 struct device_attribute *attr,
1190 char *buf,
1191 u32 reg)
1192 {
1193 int ret;
1194 u32 ret_payload[PAYLOAD_ARG_CNT];
1195
1196 ret = zynqmp_pm_read_ggs(reg, ret_payload);
1197 if (ret)
1198 return ret;
1199
1200 return sprintf(buf, "0x%x\n", ret_payload[1]);
1201 }
1202
ggs_store(struct device * device,struct device_attribute * attr,const char * buf,size_t count,u32 reg)1203 static ssize_t ggs_store(struct device *device,
1204 struct device_attribute *attr,
1205 const char *buf, size_t count,
1206 u32 reg)
1207 {
1208 long value;
1209 int ret;
1210
1211 if (reg >= GSS_NUM_REGS)
1212 return -EINVAL;
1213
1214 ret = kstrtol(buf, 16, &value);
1215 if (ret) {
1216 count = -EFAULT;
1217 goto err;
1218 }
1219
1220 ret = zynqmp_pm_write_ggs(reg, value);
1221 if (ret)
1222 count = -EFAULT;
1223 err:
1224 return count;
1225 }
1226
1227 /* GGS register show functions */
1228 #define GGS0_SHOW(N) \
1229 ssize_t ggs##N##_show(struct device *device, \
1230 struct device_attribute *attr, \
1231 char *buf) \
1232 { \
1233 return ggs_show(device, attr, buf, N); \
1234 }
1235
1236 static GGS0_SHOW(0);
1237 static GGS0_SHOW(1);
1238 static GGS0_SHOW(2);
1239 static GGS0_SHOW(3);
1240
1241 /* GGS register store function */
1242 #define GGS0_STORE(N) \
1243 ssize_t ggs##N##_store(struct device *device, \
1244 struct device_attribute *attr, \
1245 const char *buf, \
1246 size_t count) \
1247 { \
1248 return ggs_store(device, attr, buf, count, N); \
1249 }
1250
1251 static GGS0_STORE(0);
1252 static GGS0_STORE(1);
1253 static GGS0_STORE(2);
1254 static GGS0_STORE(3);
1255
pggs_show(struct device * device,struct device_attribute * attr,char * buf,u32 reg)1256 static ssize_t pggs_show(struct device *device,
1257 struct device_attribute *attr,
1258 char *buf,
1259 u32 reg)
1260 {
1261 int ret;
1262 u32 ret_payload[PAYLOAD_ARG_CNT];
1263
1264 ret = zynqmp_pm_read_pggs(reg, ret_payload);
1265 if (ret)
1266 return ret;
1267
1268 return sprintf(buf, "0x%x\n", ret_payload[1]);
1269 }
1270
pggs_store(struct device * device,struct device_attribute * attr,const char * buf,size_t count,u32 reg)1271 static ssize_t pggs_store(struct device *device,
1272 struct device_attribute *attr,
1273 const char *buf, size_t count,
1274 u32 reg)
1275 {
1276 long value;
1277 int ret;
1278
1279 if (reg >= GSS_NUM_REGS)
1280 return -EINVAL;
1281
1282 ret = kstrtol(buf, 16, &value);
1283 if (ret) {
1284 count = -EFAULT;
1285 goto err;
1286 }
1287
1288 ret = zynqmp_pm_write_pggs(reg, value);
1289 if (ret)
1290 count = -EFAULT;
1291
1292 err:
1293 return count;
1294 }
1295
1296 #define PGGS0_SHOW(N) \
1297 ssize_t pggs##N##_show(struct device *device, \
1298 struct device_attribute *attr, \
1299 char *buf) \
1300 { \
1301 return pggs_show(device, attr, buf, N); \
1302 }
1303
1304 #define PGGS0_STORE(N) \
1305 ssize_t pggs##N##_store(struct device *device, \
1306 struct device_attribute *attr, \
1307 const char *buf, \
1308 size_t count) \
1309 { \
1310 return pggs_store(device, attr, buf, count, N); \
1311 }
1312
1313 /* PGGS register show functions */
1314 static PGGS0_SHOW(0);
1315 static PGGS0_SHOW(1);
1316 static PGGS0_SHOW(2);
1317 static PGGS0_SHOW(3);
1318
1319 /* PGGS register store functions */
1320 static PGGS0_STORE(0);
1321 static PGGS0_STORE(1);
1322 static PGGS0_STORE(2);
1323 static PGGS0_STORE(3);
1324
1325 /* GGS register attributes */
1326 static DEVICE_ATTR_RW(ggs0);
1327 static DEVICE_ATTR_RW(ggs1);
1328 static DEVICE_ATTR_RW(ggs2);
1329 static DEVICE_ATTR_RW(ggs3);
1330
1331 /* PGGS register attributes */
1332 static DEVICE_ATTR_RW(pggs0);
1333 static DEVICE_ATTR_RW(pggs1);
1334 static DEVICE_ATTR_RW(pggs2);
1335 static DEVICE_ATTR_RW(pggs3);
1336
1337 static struct attribute *zynqmp_firmware_attrs[] = {
1338 &dev_attr_ggs0.attr,
1339 &dev_attr_ggs1.attr,
1340 &dev_attr_ggs2.attr,
1341 &dev_attr_ggs3.attr,
1342 &dev_attr_pggs0.attr,
1343 &dev_attr_pggs1.attr,
1344 &dev_attr_pggs2.attr,
1345 &dev_attr_pggs3.attr,
1346 &dev_attr_shutdown_scope.attr,
1347 &dev_attr_health_status.attr,
1348 NULL,
1349 };
1350
1351 ATTRIBUTE_GROUPS(zynqmp_firmware);
1352
zynqmp_firmware_probe(struct platform_device * pdev)1353 static int zynqmp_firmware_probe(struct platform_device *pdev)
1354 {
1355 struct device *dev = &pdev->dev;
1356 struct device_node *np;
1357 int ret;
1358
1359 np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp");
1360 if (!np) {
1361 np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
1362 if (!np)
1363 return 0;
1364
1365 feature_check_enabled = true;
1366 }
1367 of_node_put(np);
1368
1369 ret = get_set_conduit_method(dev->of_node);
1370 if (ret)
1371 return ret;
1372
1373 /* Check PM API version number */
1374 zynqmp_pm_get_api_version(&pm_api_version);
1375 if (pm_api_version < ZYNQMP_PM_VERSION) {
1376 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
1377 __func__,
1378 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
1379 pm_api_version >> 16, pm_api_version & 0xFFFF);
1380 }
1381
1382 pr_info("%s Platform Management API v%d.%d\n", __func__,
1383 pm_api_version >> 16, pm_api_version & 0xFFFF);
1384
1385 /* Check trustzone version number */
1386 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
1387 if (ret)
1388 panic("Legacy trustzone found without version support\n");
1389
1390 if (pm_tz_version < ZYNQMP_TZ_VERSION)
1391 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
1392 __func__,
1393 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
1394 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1395
1396 pr_info("%s Trustzone version v%d.%d\n", __func__,
1397 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1398
1399 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
1400 ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
1401 if (ret) {
1402 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
1403 return ret;
1404 }
1405
1406 zynqmp_pm_api_debugfs_init();
1407
1408 return of_platform_populate(dev->of_node, NULL, NULL, dev);
1409 }
1410
zynqmp_firmware_remove(struct platform_device * pdev)1411 static int zynqmp_firmware_remove(struct platform_device *pdev)
1412 {
1413 struct pm_api_feature_data *feature_data;
1414 struct hlist_node *tmp;
1415 int i;
1416
1417 mfd_remove_devices(&pdev->dev);
1418 zynqmp_pm_api_debugfs_exit();
1419
1420 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) {
1421 hash_del(&feature_data->hentry);
1422 kfree(feature_data);
1423 }
1424
1425 return 0;
1426 }
1427
1428 static const struct of_device_id zynqmp_firmware_of_match[] = {
1429 {.compatible = "xlnx,zynqmp-firmware"},
1430 {.compatible = "xlnx,versal-firmware"},
1431 {},
1432 };
1433 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
1434
1435 static struct platform_driver zynqmp_firmware_driver = {
1436 .driver = {
1437 .name = "zynqmp_firmware",
1438 .of_match_table = zynqmp_firmware_of_match,
1439 .dev_groups = zynqmp_firmware_groups,
1440 },
1441 .probe = zynqmp_firmware_probe,
1442 .remove = zynqmp_firmware_remove,
1443 };
1444 module_platform_driver(zynqmp_firmware_driver);
1445