1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * linux/include/linux/mmc/host.h
4 *
5 * Host driver specific definitions.
6 */
7 #ifndef LINUX_MMC_HOST_H
8 #define LINUX_MMC_HOST_H
9
10 #include <linux/sched.h>
11 #include <linux/device.h>
12 #include <linux/fault-inject.h>
13
14 #include <linux/mmc/core.h>
15 #include <linux/mmc/card.h>
16 #include <linux/mmc/pm.h>
17 #include <linux/dma-direction.h>
18 #include <linux/keyslot-manager.h>
19 #include <linux/android_kabi.h>
20
21 #include <linux/android_vendor.h>
22
23 struct mmc_ios {
24 unsigned int clock; /* clock rate */
25 unsigned short vdd;
26 unsigned int power_delay_ms; /* waiting for stable power */
27
28 /* vdd stores the bit number of the selected voltage range from below. */
29
30 unsigned char bus_mode; /* command output mode */
31
32 #define MMC_BUSMODE_OPENDRAIN 1
33 #define MMC_BUSMODE_PUSHPULL 2
34
35 unsigned char chip_select; /* SPI chip select */
36
37 #define MMC_CS_DONTCARE 0
38 #define MMC_CS_HIGH 1
39 #define MMC_CS_LOW 2
40
41 unsigned char power_mode; /* power supply mode */
42
43 #define MMC_POWER_OFF 0
44 #define MMC_POWER_UP 1
45 #define MMC_POWER_ON 2
46 #define MMC_POWER_UNDEFINED 3
47
48 unsigned char bus_width; /* data bus width */
49
50 #define MMC_BUS_WIDTH_1 0
51 #define MMC_BUS_WIDTH_4 2
52 #define MMC_BUS_WIDTH_8 3
53
54 unsigned char timing; /* timing specification used */
55
56 #define MMC_TIMING_LEGACY 0
57 #define MMC_TIMING_MMC_HS 1
58 #define MMC_TIMING_SD_HS 2
59 #define MMC_TIMING_UHS_SDR12 3
60 #define MMC_TIMING_UHS_SDR25 4
61 #define MMC_TIMING_UHS_SDR50 5
62 #define MMC_TIMING_UHS_SDR104 6
63 #define MMC_TIMING_UHS_DDR50 7
64 #define MMC_TIMING_MMC_DDR52 8
65 #define MMC_TIMING_MMC_HS200 9
66 #define MMC_TIMING_MMC_HS400 10
67 #define MMC_TIMING_SD_EXP 11
68 #define MMC_TIMING_SD_EXP_1_2V 12
69
70 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
71
72 #define MMC_SIGNAL_VOLTAGE_330 0
73 #define MMC_SIGNAL_VOLTAGE_180 1
74 #define MMC_SIGNAL_VOLTAGE_120 2
75
76 unsigned char drv_type; /* driver type (A, B, C, D) */
77
78 #define MMC_SET_DRIVER_TYPE_B 0
79 #define MMC_SET_DRIVER_TYPE_A 1
80 #define MMC_SET_DRIVER_TYPE_C 2
81 #define MMC_SET_DRIVER_TYPE_D 3
82
83 bool enhanced_strobe; /* hs400es selection */
84 };
85
86 struct mmc_clk_phase {
87 bool valid;
88 u16 in_deg;
89 u16 out_deg;
90 };
91
92 #define MMC_NUM_CLK_PHASES (MMC_TIMING_MMC_HS400 + 1)
93 struct mmc_clk_phase_map {
94 struct mmc_clk_phase phase[MMC_NUM_CLK_PHASES];
95 };
96
97 struct mmc_host;
98
99 enum mmc_err_stat {
100 MMC_ERR_CMD_TIMEOUT,
101 MMC_ERR_CMD_CRC,
102 MMC_ERR_DAT_TIMEOUT,
103 MMC_ERR_DAT_CRC,
104 MMC_ERR_AUTO_CMD,
105 MMC_ERR_ADMA,
106 MMC_ERR_TUNING,
107 MMC_ERR_CMDQ_RED,
108 MMC_ERR_CMDQ_GCE,
109 MMC_ERR_CMDQ_ICCE,
110 MMC_ERR_REQ_TIMEOUT,
111 MMC_ERR_CMDQ_REQ_TIMEOUT,
112 MMC_ERR_ICE_CFG,
113 MMC_ERR_CTRL_TIMEOUT,
114 MMC_ERR_UNEXPECTED_IRQ,
115 MMC_ERR_MAX,
116 };
117
118 struct mmc_host_ops {
119 /*
120 * It is optional for the host to implement pre_req and post_req in
121 * order to support double buffering of requests (prepare one
122 * request while another request is active).
123 * pre_req() must always be followed by a post_req().
124 * To undo a call made to pre_req(), call post_req() with
125 * a nonzero err condition.
126 */
127 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
128 int err);
129 void (*pre_req)(struct mmc_host *host, struct mmc_request *req);
130 void (*request)(struct mmc_host *host, struct mmc_request *req);
131 /* Submit one request to host in atomic context. */
132 int (*request_atomic)(struct mmc_host *host,
133 struct mmc_request *req);
134
135 /*
136 * Avoid calling the next three functions too often or in a "fast
137 * path", since underlaying controller might implement them in an
138 * expensive and/or slow way. Also note that these functions might
139 * sleep, so don't call them in the atomic contexts!
140 */
141
142 /*
143 * Notes to the set_ios callback:
144 * ios->clock might be 0. For some controllers, setting 0Hz
145 * as any other frequency works. However, some controllers
146 * explicitly need to disable the clock. Otherwise e.g. voltage
147 * switching might fail because the SDCLK is not really quiet.
148 */
149 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
150
151 /*
152 * Return values for the get_ro callback should be:
153 * 0 for a read/write card
154 * 1 for a read-only card
155 * -ENOSYS when not supported (equal to NULL callback)
156 * or a negative errno value when something bad happened
157 */
158 int (*get_ro)(struct mmc_host *host);
159
160 /*
161 * Return values for the get_cd callback should be:
162 * 0 for a absent card
163 * 1 for a present card
164 * -ENOSYS when not supported (equal to NULL callback)
165 * or a negative errno value when something bad happened
166 */
167 int (*get_cd)(struct mmc_host *host);
168
169 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
170 /* Mandatory callback when using MMC_CAP2_SDIO_IRQ_NOTHREAD. */
171 void (*ack_sdio_irq)(struct mmc_host *host);
172
173 /* optional callback for HC quirks */
174 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
175
176 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
177
178 /* Check if the card is pulling dat[0] low */
179 int (*card_busy)(struct mmc_host *host);
180
181 /* The tuning command opcode value is different for SD and eMMC cards */
182 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
183
184 /* Prepare HS400 target operating frequency depending host driver */
185 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
186
187 /* Execute HS400 tuning depending host driver */
188 int (*execute_hs400_tuning)(struct mmc_host *host, struct mmc_card *card);
189
190 /* Prepare switch to DDR during the HS400 init sequence */
191 int (*hs400_prepare_ddr)(struct mmc_host *host);
192
193 /* Prepare for switching from HS400 to HS200 */
194 void (*hs400_downgrade)(struct mmc_host *host);
195
196 /* Complete selection of HS400 */
197 void (*hs400_complete)(struct mmc_host *host);
198
199 /* Prepare enhanced strobe depending host driver */
200 void (*hs400_enhanced_strobe)(struct mmc_host *host,
201 struct mmc_ios *ios);
202 int (*select_drive_strength)(struct mmc_card *card,
203 unsigned int max_dtr, int host_drv,
204 int card_drv, int *drv_type);
205 /* Reset the eMMC card via RST_n */
206 void (*hw_reset)(struct mmc_host *host);
207 void (*card_event)(struct mmc_host *host);
208
209 /*
210 * Optional callback to support controllers with HW issues for multiple
211 * I/O. Returns the number of supported blocks for the request.
212 */
213 int (*multi_io_quirk)(struct mmc_card *card,
214 unsigned int direction, int blk_size);
215
216 /* Initialize an SD express card, mandatory for MMC_CAP2_SD_EXP. */
217 int (*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios);
218
219 ANDROID_KABI_RESERVE(1);
220 ANDROID_KABI_RESERVE(2);
221 };
222
223 struct mmc_cqe_ops {
224 /* Allocate resources, and make the CQE operational */
225 int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
226 /* Free resources, and make the CQE non-operational */
227 void (*cqe_disable)(struct mmc_host *host);
228 /*
229 * Issue a read, write or DCMD request to the CQE. Also deal with the
230 * effect of ->cqe_off().
231 */
232 int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
233 /* Free resources (e.g. DMA mapping) associated with the request */
234 void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
235 /*
236 * Prepare the CQE and host controller to accept non-CQ commands. There
237 * is no corresponding ->cqe_on(), instead ->cqe_request() is required
238 * to deal with that.
239 */
240 void (*cqe_off)(struct mmc_host *host);
241 /*
242 * Wait for all CQE tasks to complete. Return an error if recovery
243 * becomes necessary.
244 */
245 int (*cqe_wait_for_idle)(struct mmc_host *host);
246 /*
247 * Notify CQE that a request has timed out. Return false if the request
248 * completed or true if a timeout happened in which case indicate if
249 * recovery is needed.
250 */
251 bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
252 bool *recovery_needed);
253 /*
254 * Stop all CQE activity and prepare the CQE and host controller to
255 * accept recovery commands.
256 */
257 void (*cqe_recovery_start)(struct mmc_host *host);
258 /*
259 * Clear the queue and call mmc_cqe_request_done() on all requests.
260 * Requests that errored will have the error set on the mmc_request
261 * (data->error or cmd->error for DCMD). Requests that did not error
262 * will have zero data bytes transferred.
263 */
264 void (*cqe_recovery_finish)(struct mmc_host *host);
265
266 ANDROID_KABI_RESERVE(1);
267 ANDROID_KABI_RESERVE(2);
268 };
269
270 struct mmc_async_req {
271 /* active mmc request */
272 struct mmc_request *mrq;
273 /*
274 * Check error status of completed mmc request.
275 * Returns 0 if success otherwise non zero.
276 */
277 enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
278 };
279
280 /**
281 * struct mmc_slot - MMC slot functions
282 *
283 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL
284 * @handler_priv: MMC/SD-card slot context
285 *
286 * Some MMC/SD host controllers implement slot-functions like card and
287 * write-protect detection natively. However, a large number of controllers
288 * leave these functions to the CPU. This struct provides a hook to attach
289 * such slot-function drivers.
290 */
291 struct mmc_slot {
292 int cd_irq;
293 bool cd_wake_enabled;
294 void *handler_priv;
295 ANDROID_OEM_DATA(1);
296 };
297
298 /**
299 * mmc_context_info - synchronization details for mmc context
300 * @is_done_rcv wake up reason was done request
301 * @is_new_req wake up reason was new request
302 * @is_waiting_last_req mmc context waiting for single running request
303 * @wait wait queue
304 */
305 struct mmc_context_info {
306 bool is_done_rcv;
307 bool is_new_req;
308 bool is_waiting_last_req;
309 wait_queue_head_t wait;
310 };
311
312 struct regulator;
313 struct mmc_pwrseq;
314
315 struct mmc_supply {
316 struct regulator *vmmc; /* Card power supply */
317 struct regulator *vqmmc; /* Optional Vccq supply */
318 };
319
320 struct mmc_ctx {
321 struct task_struct *task;
322 };
323
324 struct mmc_host {
325 struct device *parent;
326 struct device class_dev;
327 int index;
328 const struct mmc_host_ops *ops;
329 struct mmc_pwrseq *pwrseq;
330 unsigned int f_min;
331 unsigned int f_max;
332 unsigned int f_init;
333 u32 ocr_avail;
334 u32 ocr_avail_sdio; /* SDIO-specific OCR */
335 u32 ocr_avail_sd; /* SD-specific OCR */
336 u32 ocr_avail_mmc; /* MMC-specific OCR */
337 struct wakeup_source *ws; /* Enable consume of uevents */
338 u32 max_current_330;
339 u32 max_current_300;
340 u32 max_current_180;
341
342 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
343 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
344 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
345 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
346 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
347 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
348 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
349 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
350 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
351 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
352 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
353 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
354 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
355 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
356 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
357 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
358 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
359
360 u32 caps; /* Host capabilities */
361
362 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
363 #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
364 #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */
365 #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
366 #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
367 #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
368 #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
369 #define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */
370 #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
371 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
372 #define MMC_CAP_3_3V_DDR (1 << 11) /* Host supports eMMC DDR 3.3V */
373 #define MMC_CAP_1_8V_DDR (1 << 12) /* Host supports eMMC DDR 1.8V */
374 #define MMC_CAP_1_2V_DDR (1 << 13) /* Host supports eMMC DDR 1.2V */
375 #define MMC_CAP_DDR (MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | \
376 MMC_CAP_1_2V_DDR)
377 #define MMC_CAP_POWER_OFF_CARD (1 << 14) /* Can power off after boot */
378 #define MMC_CAP_BUS_WIDTH_TEST (1 << 15) /* CMD14/CMD19 bus width ok */
379 #define MMC_CAP_UHS_SDR12 (1 << 16) /* Host supports UHS SDR12 mode */
380 #define MMC_CAP_UHS_SDR25 (1 << 17) /* Host supports UHS SDR25 mode */
381 #define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */
382 #define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */
383 #define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */
384 #define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
385 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
386 MMC_CAP_UHS_DDR50)
387 #define MMC_CAP_SYNC_RUNTIME_PM (1 << 21) /* Synced runtime PM suspends. */
388 #define MMC_CAP_NEED_RSP_BUSY (1 << 22) /* Commands with R1B can't use R1. */
389 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
390 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
391 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
392 #define MMC_CAP_DONE_COMPLETE (1 << 27) /* RW reqs can be completed within mmc_request_done() */
393 #define MMC_CAP_CD_WAKE (1 << 28) /* Enable card detect wake */
394 #define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */
395 #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
396 #define MMC_CAP_HW_RESET (1 << 31) /* Reset the eMMC card via RST_n */
397
398 u32 caps2; /* More host capabilities */
399
400 #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
401 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */
402 #define MMC_CAP2_FULL_PWR_CYCLE_IN_SUSPEND (1 << 3) /* Can do full power cycle in suspend */
403 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
404 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
405 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
406 MMC_CAP2_HS200_1_2V_SDR)
407 #define MMC_CAP2_SD_EXP (1 << 7) /* SD express via PCIe */
408 #define MMC_CAP2_SD_EXP_1_2V (1 << 8) /* SD express 1.2V */
409 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */
410 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */
411 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
412 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
413 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
414 #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
415 MMC_CAP2_HS400_1_2V)
416 #define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
417 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
418 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
419 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
420 #define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */
421 #define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */
422 #define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */
423 #define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */
424 #define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */
425 #define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */
426 #define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */
427 #define MMC_CAP2_MERGE_CAPABLE (1 << 26) /* Host can merge a segment over the segment size */
428 #ifdef CONFIG_MMC_CRYPTO
429 #define MMC_CAP2_CRYPTO (1 << 27) /* Host supports inline encryption */
430 #else
431 #define MMC_CAP2_CRYPTO 0
432 #endif
433 #define MMC_CAP2_ALT_GPT_TEGRA (1 << 28) /* Host with eMMC that has GPT entry at a non-standard location */
434
435 int fixed_drv_type; /* fixed driver type for non-removable media */
436
437 mmc_pm_flag_t pm_caps; /* supported pm features */
438
439 /* host specific block data */
440 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
441 unsigned short max_segs; /* see blk_queue_max_segments */
442 unsigned short unused;
443 unsigned int max_req_size; /* maximum number of bytes in one req */
444 unsigned int max_blk_size; /* maximum size of one mmc block */
445 unsigned int max_blk_count; /* maximum number of blocks in one req */
446 unsigned int max_busy_timeout; /* max busy timeout in ms */
447
448 /* private data */
449 spinlock_t lock; /* lock for claim and bus ops */
450
451 struct mmc_ios ios; /* current io bus settings */
452
453 /* group bitfields together to minimize padding */
454 unsigned int use_spi_crc:1;
455 unsigned int claimed:1; /* host exclusively claimed */
456 unsigned int doing_init_tune:1; /* initial tuning in progress */
457 unsigned int can_retune:1; /* re-tuning can be used */
458 unsigned int doing_retune:1; /* re-tuning in progress */
459 unsigned int retune_now:1; /* do re-tuning at next req */
460 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */
461 unsigned int retune_crc_disable:1; /* don't trigger retune upon crc */
462 unsigned int can_dma_map_merge:1; /* merging can be used */
463
464 int rescan_disable; /* disable card detection */
465 int rescan_entered; /* used with nonremovable devices */
466
467 int need_retune; /* re-tuning is needed */
468 int hold_retune; /* hold off re-tuning */
469 unsigned int retune_period; /* re-tuning period in secs */
470 struct timer_list retune_timer; /* for periodic re-tuning */
471
472 bool trigger_card_event; /* card_event necessary */
473
474 struct mmc_card *card; /* device attached to this host */
475
476 wait_queue_head_t wq;
477 struct mmc_ctx *claimer; /* context that has host claimed */
478 int claim_cnt; /* "claim" nesting count */
479 struct mmc_ctx default_ctx; /* default context */
480
481 struct delayed_work detect;
482 int detect_change; /* card detect flag */
483 struct mmc_slot slot;
484
485 const struct mmc_bus_ops *bus_ops; /* current bus driver */
486
487 unsigned int sdio_irqs;
488 struct task_struct *sdio_irq_thread;
489 struct delayed_work sdio_irq_work;
490 bool sdio_irq_pending;
491 atomic_t sdio_irq_thread_abort;
492
493 mmc_pm_flag_t pm_flags; /* requested pm features */
494
495 struct led_trigger *led; /* activity led */
496
497 #ifdef CONFIG_REGULATOR
498 bool regulator_enabled; /* regulator state */
499 #endif
500 struct mmc_supply supply;
501
502 struct dentry *debugfs_root;
503
504 /* Ongoing data transfer that allows commands during transfer */
505 struct mmc_request *ongoing_mrq;
506
507 #ifdef CONFIG_FAIL_MMC_REQUEST
508 struct fault_attr fail_mmc_request;
509 #endif
510
511 unsigned int actual_clock; /* Actual HC clock rate */
512
513 unsigned int slotno; /* used for sdio acpi binding */
514
515 int dsr_req; /* DSR value is valid */
516 u32 dsr; /* optional driver stage (DSR) value */
517
518 /* Command Queue Engine (CQE) support */
519 const struct mmc_cqe_ops *cqe_ops;
520 void *cqe_private;
521 int cqe_qdepth;
522 bool cqe_enabled;
523 bool cqe_on;
524 bool cqe_recovery_reset_always;
525
526 /* Inline encryption support */
527 #ifdef CONFIG_MMC_CRYPTO
528 struct blk_keyslot_manager ksm;
529 #endif
530
531 /* Host Software Queue support */
532 bool hsq_enabled;
533
534 u32 err_stats[MMC_ERR_MAX];
535
536 ANDROID_KABI_RESERVE(1);
537 ANDROID_KABI_RESERVE(2);
538 ANDROID_OEM_DATA(1);
539
540 unsigned long private[] ____cacheline_aligned;
541 };
542
543 struct device_node;
544
545 struct mmc_host *mmc_alloc_host(int extra, struct device *);
546 int mmc_add_host(struct mmc_host *);
547 void mmc_remove_host(struct mmc_host *);
548 void mmc_free_host(struct mmc_host *);
549 void mmc_of_parse_clk_phase(struct mmc_host *host,
550 struct mmc_clk_phase_map *map);
551 int mmc_of_parse(struct mmc_host *host);
552 int mmc_of_parse_voltage(struct mmc_host *host, u32 *mask);
553
mmc_priv(struct mmc_host * host)554 static inline void *mmc_priv(struct mmc_host *host)
555 {
556 return (void *)host->private;
557 }
558
mmc_from_priv(void * priv)559 static inline struct mmc_host *mmc_from_priv(void *priv)
560 {
561 return container_of(priv, struct mmc_host, private);
562 }
563
564 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
565
566 #define mmc_dev(x) ((x)->parent)
567 #define mmc_classdev(x) (&(x)->class_dev)
568 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
569
570 void mmc_detect_change(struct mmc_host *, unsigned long delay);
571 void mmc_request_done(struct mmc_host *, struct mmc_request *);
572 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
573
574 void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
575
576 /*
577 * May be called from host driver's system/runtime suspend/resume callbacks,
578 * to know if SDIO IRQs has been claimed.
579 */
sdio_irq_claimed(struct mmc_host * host)580 static inline bool sdio_irq_claimed(struct mmc_host *host)
581 {
582 return host->sdio_irqs > 0;
583 }
584
mmc_signal_sdio_irq(struct mmc_host * host)585 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
586 {
587 host->ops->enable_sdio_irq(host, 0);
588 host->sdio_irq_pending = true;
589 if (host->sdio_irq_thread)
590 wake_up_process(host->sdio_irq_thread);
591 }
592
593 void sdio_signal_irq(struct mmc_host *host);
594
595 #ifdef CONFIG_REGULATOR
596 int mmc_regulator_set_ocr(struct mmc_host *mmc,
597 struct regulator *supply,
598 unsigned short vdd_bit);
599 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
600 #else
mmc_regulator_set_ocr(struct mmc_host * mmc,struct regulator * supply,unsigned short vdd_bit)601 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
602 struct regulator *supply,
603 unsigned short vdd_bit)
604 {
605 return 0;
606 }
607
mmc_regulator_set_vqmmc(struct mmc_host * mmc,struct mmc_ios * ios)608 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
609 struct mmc_ios *ios)
610 {
611 return -EINVAL;
612 }
613 #endif
614
615 int mmc_regulator_get_supply(struct mmc_host *mmc);
616
mmc_card_is_removable(struct mmc_host * host)617 static inline int mmc_card_is_removable(struct mmc_host *host)
618 {
619 return !(host->caps & MMC_CAP_NONREMOVABLE);
620 }
621
mmc_card_keep_power(struct mmc_host * host)622 static inline int mmc_card_keep_power(struct mmc_host *host)
623 {
624 return host->pm_flags & MMC_PM_KEEP_POWER;
625 }
626
mmc_card_wake_sdio_irq(struct mmc_host * host)627 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
628 {
629 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
630 }
631
632 /* TODO: Move to private header */
mmc_card_hs(struct mmc_card * card)633 static inline int mmc_card_hs(struct mmc_card *card)
634 {
635 return card->host->ios.timing == MMC_TIMING_SD_HS ||
636 card->host->ios.timing == MMC_TIMING_MMC_HS;
637 }
638
639 /* TODO: Move to private header */
mmc_card_uhs(struct mmc_card * card)640 static inline int mmc_card_uhs(struct mmc_card *card)
641 {
642 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
643 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
644 }
645
646 void mmc_retune_timer_stop(struct mmc_host *host);
647
mmc_retune_needed(struct mmc_host * host)648 static inline void mmc_retune_needed(struct mmc_host *host)
649 {
650 if (host->can_retune)
651 host->need_retune = 1;
652 }
653
mmc_can_retune(struct mmc_host * host)654 static inline bool mmc_can_retune(struct mmc_host *host)
655 {
656 return host->can_retune == 1;
657 }
658
mmc_doing_retune(struct mmc_host * host)659 static inline bool mmc_doing_retune(struct mmc_host *host)
660 {
661 return host->doing_retune == 1;
662 }
663
mmc_doing_tune(struct mmc_host * host)664 static inline bool mmc_doing_tune(struct mmc_host *host)
665 {
666 return host->doing_retune == 1 || host->doing_init_tune == 1;
667 }
668
mmc_get_dma_dir(struct mmc_data * data)669 static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
670 {
671 return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
672 }
673
mmc_debugfs_err_stats_inc(struct mmc_host * host,enum mmc_err_stat stat)674 static inline void mmc_debugfs_err_stats_inc(struct mmc_host *host,
675 enum mmc_err_stat stat)
676 {
677 host->err_stats[stat] += 1;
678 }
679
680 int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
681 int mmc_send_abort_tuning(struct mmc_host *host, u32 opcode);
682 int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd);
683
684 #endif /* LINUX_MMC_HOST_H */
685