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Searched refs:ARM64_FEATURE_MASK (Results 1 – 7 of 7) sorted by relevance

/arch/arm64/include/asm/
Dkvm_pkvm.h53 ARM64_FEATURE_MASK(ID_AA64PFR0_FP) | \
54 ARM64_FEATURE_MASK(ID_AA64PFR0_ASIMD) | \
55 ARM64_FEATURE_MASK(ID_AA64PFR0_DIT) \
67 FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL0), ID_AA64PFR0_ELx_64BIT_ONLY) | \
68 FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1), ID_AA64PFR0_ELx_64BIT_ONLY) | \
69 FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL2), ID_AA64PFR0_ELx_64BIT_ONLY) | \
70 FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL3), ID_AA64PFR0_ELx_64BIT_ONLY) | \
71 FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_RAS), ID_AA64PFR0_RAS_V1) \
80 ARM64_FEATURE_MASK(ID_AA64PFR1_BT) | \
81 ARM64_FEATURE_MASK(ID_AA64PFR1_SSBS) \
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Dsysreg.h1226 #define ARM64_FEATURE_MASK(x) (GENMASK_ULL(x##_SHIFT + ARM64_FEATURE_FIELD_BITS - 1, x##_SHIFT)) macro
/arch/arm64/kvm/hyp/nvhe/
Dsys_regs.c93 allow_mask &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_SVE); in get_pvm_id_aa64pfr0()
99 set_mask |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_CSV2), in get_pvm_id_aa64pfr0()
101 set_mask |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_CSV3), in get_pvm_id_aa64pfr0()
113 allow_mask &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_MTE); in get_pvm_id_aa64pfr1()
178 allow_mask &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR1_APA) | in get_pvm_id_aa64isar1()
179 ARM64_FEATURE_MASK(ID_AA64ISAR1_API) | in get_pvm_id_aa64isar1()
180 ARM64_FEATURE_MASK(ID_AA64ISAR1_GPA) | in get_pvm_id_aa64isar1()
181 ARM64_FEATURE_MASK(ID_AA64ISAR1_GPI)); in get_pvm_id_aa64isar1()
275 BUILD_BUG_ON(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1), in pvm_access_id_aarch32()
Dpkvm.c38 BUILD_BUG_ON(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL0), in pvm_init_traps_aa64pfr0()
40 BUILD_BUG_ON(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1), in pvm_init_traps_aa64pfr0()
47 BUILD_BUG_ON(!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_FP), in pvm_init_traps_aa64pfr0()
49 BUILD_BUG_ON(!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_ASIMD), in pvm_init_traps_aa64pfr0()
53 if (FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_RAS), feature_ids) < in pvm_init_traps_aa64pfr0()
60 if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_AMU), feature_ids)) { in pvm_init_traps_aa64pfr0()
66 if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_SVE), feature_ids)) in pvm_init_traps_aa64pfr0()
84 if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR1_MTE), feature_ids)) { in pvm_init_traps_aa64pfr1()
104 if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_PMUVER), feature_ids)) { in pvm_init_traps_aa64dfr0()
111 if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_DEBUGVER), feature_ids)) in pvm_init_traps_aa64dfr0()
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Dswitch.c187 BUILD_BUG_ON(!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_FP), in kvm_handle_pvm_fpsimd()
189 BUILD_BUG_ON(!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_ASIMD), in kvm_handle_pvm_fpsimd()
/arch/arm64/kvm/
Dsys_regs.c1044 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_SVE); in read_id_reg()
1045 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_AMU); in read_id_reg()
1046 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_CSV2); in read_id_reg()
1047 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_CSV2), (u64)vcpu->kvm->arch.pfr0_csv2); in read_id_reg()
1048 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_CSV3); in read_id_reg()
1049 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_CSV3), (u64)vcpu->kvm->arch.pfr0_csv3); in read_id_reg()
1051 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_GIC); in read_id_reg()
1052 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_GIC), 1); in read_id_reg()
1057 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_MTE); in read_id_reg()
1061 val &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR1_APA) | in read_id_reg()
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Darm.c338 r = kvm_cap && FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_PMUVER), in pkvm_check_extension()
342 r = kvm_cap && FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_SVE), in pkvm_check_extension()
347 FIELD_GET(ARM64_FEATURE_MASK(ID_AA64ISAR1_API), in pkvm_check_extension()
349 FIELD_GET(ARM64_FEATURE_MASK(ID_AA64ISAR1_APA), in pkvm_check_extension()
354 FIELD_GET(ARM64_FEATURE_MASK(ID_AA64ISAR1_GPI), in pkvm_check_extension()
356 FIELD_GET(ARM64_FEATURE_MASK(ID_AA64ISAR1_GPA), in pkvm_check_extension()