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Searched refs:CVMX_GMXX_TX_SPI_CTL (Results 1 – 2 of 2) sorted by relevance

/arch/mips/cavium-octeon/executive/
Dcvmx-spi.c379 cvmx_write_csr(CVMX_GMXX_TX_SPI_CTL(interface), in cvmx_spi_calendar_setup_cb()
/arch/mips/include/asm/octeon/
Dcvmx-gmxx-defs.h329 #define CVMX_GMXX_TX_SPI_CTL(block_id) (CVMX_ADD_IO_SEG(0x00011800080004C0ull) + ((block_id) & 1) *… macro