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Searched refs:ID_ISAR5_SEVL_SHIFT (Results 1 – 2 of 2) sorted by relevance

/arch/arm64/include/asm/
Dsysreg.h1004 #define ID_ISAR5_SEVL_SHIFT 0 macro
/arch/arm64/kernel/
Dcpufeature.c458 ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_ISAR5_SEVL_SHIFT, 4, 0),