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Searched refs:MCI_STATUS_MISCV (Results 1 – 5 of 5) sorted by relevance

/arch/x86/kernel/cpu/mce/
Dapei.c50 m.status = MCI_STATUS_VAL | MCI_STATUS_EN | MCI_STATUS_ADDRV | MCI_STATUS_MISCV | 0x9f; in apei_mce_report_mem_error()
Dcore.c525 if (!(m->status & MCI_STATUS_MISCV)) in mce_usable_address()
572 if (!mca_cfg.ser || !(m->status & MCI_STATUS_MISCV)) in whole_page()
668 if (m->status & MCI_STATUS_MISCV) in mce_read_aux()
677 if (mca_cfg.ser && (m->status & MCI_STATUS_MISCV)) { in mce_read_aux()
1739 MCI_STATUS_EN|MCI_STATUS_MISCV|MCI_STATUS_ADDRV| in quirk_sandybridge_ifu()
1743 MCI_STATUS_MISCV|MCI_STATUS_ADDRV|MCI_STATUS_S| in quirk_sandybridge_ifu()
Dseverity.c70 #define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV)
Dinject.c494 i_mce.status |= MCI_STATUS_MISCV; in do_inject()
/arch/x86/include/asm/
Dmce.h37 #define MCI_STATUS_MISCV BIT_ULL(59) /* misc error reg. valid */ macro