Searched refs:OCP_MOD (Results 1 – 6 of 6) sorted by relevance
/arch/arm/mach-omap2/ |
D | prm2xxx.h | 36 #define OMAP2420_PRCM_REVISION OMAP2420_PRM_REGADDR(OCP_MOD, 0x0000) 38 #define OMAP2420_PRCM_SYSCONFIG OMAP2420_PRM_REGADDR(OCP_MOD, 0x0010) 41 #define OMAP2420_PRCM_IRQSTATUS_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x0018) 43 #define OMAP2420_PRCM_IRQENABLE_MPU OMAP2420_PRM_REGADDR(OCP_MOD, 0x001c) 46 #define OMAP2420_PRCM_VOLTCTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0050) 48 #define OMAP2420_PRCM_VOLTST OMAP2420_PRM_REGADDR(OCP_MOD, 0x0054) 50 #define OMAP2420_PRCM_CLKSRC_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0060) 52 #define OMAP2420_PRCM_CLKOUT_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0070) 54 #define OMAP2420_PRCM_CLKEMUL_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0078) 56 #define OMAP2420_PRCM_CLKCFG_CTRL OMAP2420_PRM_REGADDR(OCP_MOD, 0x0080) [all …]
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D | prm3xxx.c | 102 irqstatus = omap2_prm_read_mod_reg(OCP_MOD, in omap3_prm_vp_check_txdone() 112 OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); in omap3_prm_vp_clear_txdone() 158 mask = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); in omap3xxx_prm_read_pending_irqs() 159 st = omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); in omap3xxx_prm_read_pending_irqs() 174 omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET); in omap3xxx_prm_ocp_barrier() 190 saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD, in omap3xxx_prm_save_and_clear_irqen() 192 omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); in omap3xxx_prm_save_and_clear_irqen() 195 omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET); in omap3xxx_prm_save_and_clear_irqen() 210 omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD, in omap3xxx_prm_restore_irqen() 370 omap2_prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); in omap3_prm_init_pm()
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D | prm3xxx.h | 34 #define OMAP3430_PRM_REVISION OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0004) 36 #define OMAP3430_PRM_SYSCONFIG OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0014) 39 #define OMAP3430_PRM_IRQSTATUS_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0018) 41 #define OMAP3430_PRM_IRQENABLE_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x001c)
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D | pm24xx.c | 107 omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x1); in omap2_enter_full_retention() 109 omap_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, 0x20); in omap2_enter_full_retention() 193 omap2_prm_write_mod_reg(OMAP24XX_AUTOIDLE_MASK, OCP_MOD, in prcm_setup_regs() 251 l = omap2_prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_REVISION_OFFSET); in omap2_pm_init()
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D | prcm-common.h | 22 #define OCP_MOD 0x000 macro 31 #define OMAP24XX_GR_MOD OCP_MOD
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D | cm3xxx.c | 385 omap2_cm_read_mod_reg(OCP_MOD, OMAP3430_CM_SYSCONFIG); in omap3_cm_save_context() 416 omap2_cm_read_mod_reg(OCP_MOD, OMAP3430_CM_POLCTRL); in omap3_cm_save_context() 517 omap2_cm_write_mod_reg(cm_context.cm_sysconfig, OCP_MOD, in omap3_cm_restore_context() 546 omap2_cm_write_mod_reg(cm_context.cm_polctrl, OCP_MOD, in omap3_cm_restore_context()
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