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Searched refs:RA0 (Results 1 – 3 of 3) sorted by relevance

/arch/x86/crypto/
Dsm4-aesni-avx-asm_64.S30 #define RA0 %xmm8 macro
158 vmovdqu 0*16(%rdx), RA0;
159 vmovdqa RA0, RA1;
160 vmovdqa RA0, RA2;
161 vmovdqa RA0, RA3;
174 vpshufb RTMP2, RA0, RA0;
187 transpose_4x4(RA0, RA1, RA2, RA3, RTMP0, RTMP1);
218 ROUND(0, RA0, RA1, RA2, RA3);
219 ROUND(1, RA1, RA2, RA3, RA0);
220 ROUND(2, RA2, RA3, RA0, RA1);
[all …]
Dsm4-aesni-avx2-asm_64.S31 #define RA0 %ymm8 macro
171 vpshufb RTMP2, RA0, RA0;
181 transpose_4x4(RA0, RA1, RA2, RA3, RTMP0, RTMP1);
247 ROUND(0, RA0, RA1, RA2, RA3, RB0, RB1, RB2, RB3);
248 ROUND(1, RA1, RA2, RA3, RA0, RB1, RB2, RB3, RB0);
249 ROUND(2, RA2, RA3, RA0, RA1, RB2, RB3, RB0, RB1);
250 ROUND(3, RA3, RA0, RA1, RA2, RB3, RB0, RB1, RB2);
259 transpose_4x4(RA0, RA1, RA2, RA3, RTMP0, RTMP1);
261 vpshufb RTMP2, RA0, RA0;
310 vpshufb RTMP3, RTMP0, RA0; /* +1 ; +0 */
[all …]
/arch/powerpc/xmon/
Dppc-opc.c507 #define RA0 RA + 1 macro
512 #define RAQ RA0 + 1
3853 {"addi", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, SI}},
3854 {"cal", OP(14), OP_MASK, PWRCOM, PPCVLE, {RT, D, RA0}},
3855 {"subi", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, NSI}},
3856 {"la", OP(14), OP_MASK, PPCCOM, PPCVLE, {RT, D, RA0}},
3860 {"addis", OP(15), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, SISIGNOPT}},
3861 {"cau", OP(15), OP_MASK, PWRCOM, PPCVLE, {RT, RA0, SISIGNOPT}},
3862 {"subis", OP(15), OP_MASK, PPCCOM, PPCVLE, {RT, RA0, NSISIGNOPT}},
4695 {"lvsl", X(31,6), X_MASK, PPCVEC, 0, {VD, RA0, RB}},
[all …]