Searched refs:SCTLR_EL1 (Results 1 – 10 of 10) sorted by relevance
| /arch/arm64/kvm/hyp/ |
| D | exception.c | 158 sctlr = __vcpu_read_sys_reg(vcpu, SCTLR_EL1); in enter_exception64()
195 u32 sctlr = __vcpu_read_sys_reg(vcpu, SCTLR_EL1); in get_except32_cpsr()
291 u32 sctlr = __vcpu_read_sys_reg(vcpu, SCTLR_EL1); in enter_exception32()
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| D | vgic-v2-cpuif-proxy.c | 23 return !!(read_sysreg(SCTLR_EL1) & SCTLR_ELx_EE); in __is_be()
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| /arch/arm64/include/asm/ |
| D | kvm_emulate.h | 427 u64 sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1); in kvm_vcpu_set_be()
429 vcpu_write_sys_reg(vcpu, sctlr, SCTLR_EL1); in kvm_vcpu_set_be()
439 return !!(vcpu_read_sys_reg(vcpu, SCTLR_EL1) & SCTLR_ELx_EE); in kvm_vcpu_is_be()
441 return !!(vcpu_read_sys_reg(vcpu, SCTLR_EL1) & SCTLR_EL1_E0E); in kvm_vcpu_is_be()
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| D | kvm_host.h | 250 SCTLR_EL1, /* System Control Register */ enumerator
618 case SCTLR_EL1: *val = read_sysreg_s(SYS_SCTLR_EL12); break; in __vcpu_read_sys_reg_from_cpu()
663 case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
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| D | kvm_mmu.h | 195 return (vcpu_read_sys_reg(vcpu, SCTLR_EL1) & 0b101) == 0b101; in vcpu_has_cache_enabled()
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| /arch/arm64/kvm/hyp/include/hyp/ |
| D | sysreg-sr.h | 43 ctxt_sys_reg(ctxt, SCTLR_EL1) = read_sysreg_el1(SYS_SCTLR); in __sysreg_save_el1_state()
102 write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR); in __sysreg_restore_el1_state()
149 write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR); in __sysreg_restore_el1_state()
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| /arch/arm64/kvm/hyp/nvhe/ |
| D | switch.c | 63 write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR); in __activate_traps()
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| D | sys_regs.c | 503 RESET_VAL(SCTLR_EL1, 0x00C50078),
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| D | hyp-main.c | 358 WRITE_ONCE(__vcpu_sys_reg(host_vcpu, SCTLR_EL1), in handle_pvm_exit_dabt()
359 __vcpu_sys_reg(shadow_vcpu, SCTLR_EL1) & (SCTLR_ELx_EE | SCTLR_EL1_E0E)); in handle_pvm_exit_dabt()
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| /arch/arm64/kvm/ |
| D | sys_regs.c | 1511 { SYS_DESC(SYS_SCTLR_EL1), access_vm_reg, reset_val, SCTLR_EL1, 0x00C50078 },
1959 { Op1( 0), CRn( 1), CRm( 0), Op2( 0), access_vm_reg, NULL, SCTLR_EL1 },
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